Abstract:
A method for generating production code from a block diagram in a technical computing environment on a host computer. A first block receives a first input signal that has a plurality of elements. A size of a first required signal of the external function is determined and compared to a size of the first input signal. When the size of the first required signal corresponds to the size of an element in the first input signal a production code is generated enclosing a call of the external function by a loop consecutively addressing each of the plurality of elements in the first input signal. When the size of the first required signal corresponds to the size of the first input signal a production code is generated having a call of the external function without enclosing loop over the elements in the first input signal.
Abstract:
A method for configuring a test device set up for testing an electronic control unit by a configuration system, whereby a software model of a technical system is executed in the test device and the software model communicates via an input/output interface of the test device with a device connected to the test device, whereby the configuration system has a first configuration element of a first element type and a second configuration element of a second element type, whereby the configuration elements are assigned properties of the test device with which the communication between the connected device and the software model is configured, wherein sorting of the properties occurs in the configuration system, and the sorting is switchable between the sorting types, namely, a union set sort, intersection sort, and condensing sort.
Abstract:
A simulation device for simulating a peripheral circuit arrangement that can be connected to a control device, wherein the simulation device can be electrically connected to the control device, and the simulation device has a first control element for influencing a first simulation current that can be passed from a first load terminal of the control device to a first control element output of the first control element. The first control element contains a first multistage converter that includes a first converter output, which is electrically connected to a terminal on the converter side of a first inductive component at whose terminal on the control device side the first control element output is implemented. A direction of flow of the first simulation current is reversible, and the simulation device also includes a computing unit for execution of model code.
Abstract:
A method for changing software in a memory of an electronic control unit, wherein each memory address from the overlay memory can be assigned to a memory address in the read-only memory by an assignment information item. During a run time of the control unit, at least a functional part of a bypass routine that is to at least partially replace an original program routine is stored in an address range in the overlay memory, or a jump instruction is stored in the overlay memory as the first part of a bypass routine that refers to a second part of the bypass routine that is stored in an address range accessible to the processor. To activate an overlay functionality the address and/or the address range of the overlay memory are assigned to an address or address range of the program routine to be replaced.
Abstract:
A method for accessing signals of a programmable logic device having a functional level and a configuration level at run time when the programmable logic device is executing a predefined configuration. An access to at least one signal value that has a number of bits is requested. The individual bits in the configuration are each located in an address unit with one address offset apiece such that one or more bits of a signal value are located in one address unit. A bitwise access to the requested signal values takes place, wherein the accesses to the individual bits are sorted as a function of the address unit containing the applicable bit in such a manner that the accesses to all bits located in an address unit take place in sequence as a function of the address offset, independently of the signal containing the applicable bit.
Abstract:
A method for editing a computer-aided design model for developing electronic control units in a design environment, whereby the design model comprises at least one model object with first data. The method begins with the reading of all model objects of the design model and the reading of an allocation list, which assigns a particular globally unique key to each model object. If the first data are available, the reading of the first data from a first memory location follows. Then, assignment of the first data to the model object based on the globally unique key occurs, so that the first data are available during editing of the design model. If the first data are not available, assignment of the globally unique key to the model object occurs, so that the globally unique key is available during tediting of the design model.
Abstract:
A method for connecting models of technical systems in a testing device equipped for control unit development having a connection of a first model of a first technical system to a second model of a second technical system. The first model and the second model include a model of a control unit, a model of a technical system to be controlled, or a model of an environment interacting with the control unit or with the technical system to be controlled. The first model has a first data interface and the second model has a second data interface. The method has the provision of a first model hierarchy structure and the provision of a second model hierarchy structure. The method has an automatic configuration of compatible connections so that the first model present in the testing device exchanges data with the second model present in the testing device through compatible connections.
Abstract:
An interface unit for data exchange between a first processor of a computer system and a peripheral environment. The interface unit has a number of input data channels for receiving input data from the peripheral environment and a first access management unit. The access management unit is configured to receive a request for providing the input data, stored in the number of input data channels, from a first interface processor stored in the interface unit and from a second interface processor stored in the interface unit and to provide or not to provide the input data, stored in the number of input data channels, to the first interface processor and the second interface processor. A first priority and a second priority can be stored in the first access management unit.
Abstract:
A computer-implemented method for testing an real and/or virtual automotive system through a test by a test environment interacting with the real and/or virtual part, which includes a test series with different test cases of the test for different execution conditions that are specified in test configurations. Each combination of test case and test configuration is assigned a test status value from a group of predefined test status values in accordance with an evaluation of the function of the system in the corresponding test. For further planning, execution, and/or evaluation of the test series at least once a relative test coverage of at least one of the status values is determined in the resulting test case configuration matrix and/or a relative potential for improvement of the test coverage of at least one of the status values with regard to a test case and/or with regard to a configuration is determined.
Abstract:
A method for connecting an input/output interface of a testing device equipped for testing a control unit to a model of a technical system present in the testing device. The interface connects the control unit to be tested or connects a technical system to be controlled, and the model to be connected to the input/output interface is a model of the technical system to be controlled or a model of the control unit to be tested. The testing device has a plurality of input/output functions connected to the model. The method has provides an interface hierarchy structure and a function hierarchy structure. The method has an automatic configuration of compatible connections between the interface hierarchy structure and the function hierarchy structure so that the model present in the testing device communicates through at least a part of the compatible connections with the control unit to be tested or the technical system to be controlled.