公开(公告)号：US20130307053A1

公开(公告)日：2013-11-21

申请号：US13539466

申请日：2012-07-01

Applicant: Igor POLISHCHUK ,  Sagy LEVY ,  Krishnaswamy RAMKUMAR

Inventor： Igor POLISHCHUK ,  Sagy LEVY ,  Krishnaswamy RAMKUMAR

IPC: H01L29/792

CPC classification number: H01L29/4234 ,  B82Y10/00 ,  G11C16/0466 ,  H01L21/0214 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/28282 ,  H01L27/11526 ,  H01L27/11563 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11575 ,  H01L29/0649 ,  H01L29/0676 ,  H01L29/42344 ,  H01L29/4916 ,  H01L29/511 ,  H01L29/512 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66795 ,  H01L29/66833 ,  H01L29/792 ,  H01L29/7926

Abstract: A semiconductor devices including non-volatile memories and methods of fabricating the same to improve performance thereof are provided. Generally, the device includes a memory transistor comprising a polysilicon channel region electrically connecting a source region and a drain region formed in a substrate, an oxide-nitride-nitride-oxide (ONNO) stack disposed above the channel region, and a high work function gate electrode formed over a surface of the ONNO stack. In one embodiment the ONNO stack includes a multi-layer charge-trapping region including an oxygen-rich first nitride layer and an oxygen-lean second nitride layer disposed above the first nitride layer. Other embodiments are also disclosed.

Abstract translation: 提供了包括非易失性存储器的半导体器件及其制造方法以提高其性能。 通常，器件包括存储晶体管，其包括电连接形成在衬底中的源极区域和漏极区域的多晶硅沟道区域，设置在沟道区域上方的氧化物氮化物 - 氮化物氧化物（ONNO）堆叠以及高功函数 栅电极形成在ONNO堆的表面上。 在一个实施方案中，ONNO堆叠包括多层电荷捕获区域，其包括富含氧的第一氮化物层和设置在第一氮化物层上方的无氧的第二氮化物层。 还公开了其他实施例。

公开(公告)号：US20130178031A1

公开(公告)日：2013-07-11

申请号：US13436878

申请日：2012-03-31

Applicant: Krishnaswamy Ramkumar ,  Fredrick Jenne ,  Sagy Levy

Inventor： Krishnaswamy Ramkumar ,  Fredrick Jenne ,  Sagy Levy

IPC: H01L21/336

CPC classification number: H01L29/7833 ,  B82Y10/00 ,  H01L21/28282 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823462 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11582 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66833 ,  H01L29/7836 ,  H01L29/7843 ,  H01L29/792 ,  H01L29/7926

Abstract: An embodiment of a method of integrating a non-volatile memory device into a logic MOS flow is described. Generally, the method includes: forming in a first region of a substrate a channel of a memory device from a semiconducting material overlying a surface of the substrate, the channel connecting a source and a drain of the memory device; forming a charge trapping dielectric stack over the channel adjacent to a plurality of surfaces of the channel, wherein the charge trapping dielectric stack includes a blocking layer on a charge trapping layer over a tunneling layer; and forming a MOS device over a second region of the substrate.

Abstract translation: 描述了将非易失性存储器件集成到逻辑MOS流中的方法的实施例。 通常，该方法包括：在衬底的第一区域中形成存储器件的通道，覆盖衬底表面的半导体材料，连接存储器件的源极和漏极的沟道; 在与所述通道的多个表面相邻的所述通道上形成电荷捕获电介质堆叠，其中所述电荷捕获电介质堆叠包括在隧道层上的电荷捕获层上的阻挡层; 以及在所述衬底的第二区域上形成MOS器件。

公开(公告)号：US08318608B2

公开(公告)日：2012-11-27

申请号：US12197466

申请日：2008-08-25

Applicant: Krishnaswamy Ramkumar ,  Sagy Levy ,  Jeong Byun

Inventor： Krishnaswamy Ramkumar ,  Sagy Levy ,  Jeong Byun

IPC: H01L21/31

CPC classification number: H01L21/28282 ,  H01L21/3144 ,  H01L21/3145 ,  H01L29/4234 ,  H01L29/66833

Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes providing a substrate having a charge-trapping layer disposed thereon. A portion of the charge-trapping layer is then oxidized to form a blocking dielectric layer above the charge-trapping layer by exposing the charge-trapping layer to a radical oxidation process.

Abstract translation: 描述了制造非易失性电荷陷阱存储器件的方法。 该方法包括提供其上设置有电荷捕获层的衬底。 然后通过将电荷捕获层暴露于自由基氧化过程，电荷俘获层的一部分被氧化以形成电荷俘获层上方的阻挡电介质层。

公开(公告)号：US08283261B2

公开(公告)日：2012-10-09

申请号：US12124855

申请日：2008-05-21

Applicant: Krishnaswamy Ramkumar

Inventor： Krishnaswamy Ramkumar

IPC: H01L21/31

CPC classification number: H01L21/28282 ,  H01L21/3144 ,  H01L21/3145 ,  H01L29/4234 ,  H01L29/66833

Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes providing a substrate having a charge-trapping layer disposed Thereon. A portion of the charge-trapping layer is then oxidized to form a blocking dielectric layer above the charge-trapping layer by exposing the charge-trapping layer to a radical oxidation process.

Abstract translation: 描述了制造非易失性电荷陷阱存储器件的方法。 该方法包括提供其上设置有电荷捕获层的衬底。 然后通过将电荷捕获层暴露于自由基氧化过程，电荷俘获层的一部分被氧化以形成电荷俘获层上方的阻挡电介质层。

公开(公告)号：US08222688B1

公开(公告)日：2012-07-17

申请号：US12767105

申请日：2010-04-26

Applicant: Fredrick Jenne ,  Krishnaswamy Ramkumar

Inventor： Fredrick Jenne ,  Krishnaswamy Ramkumar

IPC: H01L29/792

CPC classification number: H01L21/28282 ,  G11C16/04 ,  H01L21/022 ,  H01L21/02323 ,  H01L27/11563 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/792

Abstract: A semiconductor device includes a substrate, a first oxide layer formed on the substrate, an oxygen-rich nitride layer formed on the first oxide layer, a second oxide layer formed on the oxygen-rich nitride layer, and an oxygen-poor nitride layer formed on the second oxide layer.

Abstract translation: 半导体器件包括衬底，形成在衬底上的第一氧化物层，形成在第一氧化物层上的富氧氮化物层，形成在富氧氮化物层上的第二氧化物层和形成的不透氧氮化物层 在第二氧化物层上。

公开(公告)号：US08119538B1

公开(公告)日：2012-02-21

申请号：US11836683

申请日：2007-08-09

Applicant: Jeong Soo Byun ,  Krishnaswamy Ramkumar

Inventor： Jeong Soo Byun ,  Krishnaswamy Ramkumar

IPC: H01L21/31

CPC classification number: H01L21/28282 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02323 ,  H01L21/02326

Abstract: A method of making a semiconductor structure is provided. The method includes forming a dielectric layer using a high density plasma oxidation process. The dielectric layer is on a storage layer and the thickness of the storage layer is reduced during the high density plasma oxidation process.

Abstract translation: 提供制造半导体结构的方法。 该方法包括使用高密度等离子体氧化工艺形成介电层。 电介质层在存储层上，并且在高密度等离子体氧化过程中存储层的厚度减小。

公开(公告)号：US08071453B1

公开(公告)日：2011-12-06

申请号：US12608886

申请日：2009-10-29

Applicant: Krishnaswamy Ramkumar ,  Bo Jin ,  Fredrick B. Jenne

Inventor： Krishnaswamy Ramkumar ,  Bo Jin ,  Fredrick B. Jenne

IPC: H01L21/336

CPC classification number: H01L21/768 ,  H01L27/11568 ,  H01L29/792

Abstract: A method of ONO integration of a non-volatile memory device (e.g. EEPROM, floating gate FLASH and SONOS) into a baseline MOS device (e.g. MOSFET) is described. In an embodiment the bottom two ONO layers are formed prior to forming the channel implants into the MOS device, and the top ONO layer is formed simultaneously with the gate oxide of the MOS device.

Abstract translation: 描述了将非易失性存储器件（例如EEPROM，浮动栅极FLASH和SONOS）的ONO集成到基准MOS器件（例如MOSFET）中的方法。 在一个实施例中，在将沟道植入物形成MOS器件之前形成底部的两个ONO层，并且顶部ONO层与MOS器件的栅极氧化物同时形成。

公开(公告)号：US07799670B2

公开(公告)日：2010-09-21

申请号：US12080175

申请日：2008-03-31

Applicant: Krishnaswamy Ramkumar ,  Sagy Levy ,  Jeong Byun

Inventor： Krishnaswamy Ramkumar ,  Sagy Levy ,  Jeong Byun

IPC: H01L21/4763

CPC classification number: H01L21/28282 ,  H01L29/4234 ,  H01L29/792

Abstract: A blocking layer of a non-volatile charge trap memory device is formed by oxidizing a portion of a charge trapping layer of the memory device. In one embodiment, the blocking layer is grown by a radical oxidation process at temperature below 500° C. In accordance with one implementation, the radical oxidation process involves flowing hydrogen (H2) and oxygen (O2) gas mixture into a process chamber and exposing the substrate to a plasma. In a preferred embodiment, a high density plasma (HDP) chamber is employed to oxidize a portion of the charge trapping layer. In further embodiments, a portion of a silicon-rich silicon oxynitride charge trapping layer is consumptively oxidized to form the blocking layer and provide an increased memory window relative to oxidation of a nitrogen-rich silicon oxynitride layer.

Abstract translation: 通过氧化存储器件的电荷俘获层的一部分来形成非易失性电荷陷阱存储器件的阻挡层。 在一个实施方案中，通过自由基氧化法在低于500℃的温度下生长阻挡层。根据一个实施方案，自由基氧化过程包括将氢（H 2）和氧（O 2）气体混合物流入处理室并暴露 衬底到等离子体。 在优选实施例中，使用高密度等离子体（HDP）室来氧化电荷俘获层的一部分。 在另外的实施例中，一部分富硅氧氮化硅电荷捕获层被消耗氧化以形成阻挡层，并且相对于富氮氧氮化硅层的氧化提供增加的存储窗口。

公开(公告)号：US20090242962A1

公开(公告)日：2009-10-01

申请号：US12080175

申请日：2008-03-31

Applicant: Krishnaswamy Ramkumar ,  Sagy Levy ,  Jeong Byun

Inventor： Krishnaswamy Ramkumar ,  Sagy Levy ,  Jeong Byun

IPC: H01L21/28 ,  H01L29/423

CPC classification number: H01L21/28282 ,  H01L29/4234 ,  H01L29/792

Abstract: A blocking layer of a non-volatile charge trap memory device is formed by oxidizing a portion of a charge trapping layer of the memory device. In one embodiment, the blocking layer is grown by a radical oxidation process at temperature below 500° C. In accordance with one implementation, the radical oxidation process involves flowing hydrogen (H2) and oxygen (O2) gas mixture into a process chamber and exposing the substrate to a plasma. In a preferred embodiment, a high density plasma (HDP) chamber is employed to oxidize a portion of the charge trapping layer. In further embodiments, a portion of a silicon-rich silicon oxynitride charge trapping layer is consumptively oxidized to form the blocking layer and provide an increased memory window relative to oxidation of a nitrogen-rich silicon oxynitride layer.

Abstract translation: 通过氧化存储器件的电荷俘获层的一部分来形成非易失性电荷陷阱存储器件的阻挡层。 在一个实施方案中，通过自由基氧化法在低于500℃的温度下生长阻挡层。根据一个实施方案，自由基氧化过程包括将氢（H 2）和氧（O 2）气体混合物流入处理室并暴露 衬底到等离子体。 在优选实施例中，使用高密度等离子体（HDP）室来氧化电荷俘获层的一部分。 在另外的实施例中，一部分富硅氧氮化硅电荷捕获层被消耗氧化以形成阻挡层，并且相对于富氮氧氮化硅层的氧化提供增加的存储窗口。

公开(公告)号：US20090179253A1

公开(公告)日：2009-07-16

申请号：US11811958

申请日：2007-06-13

Applicant: Sagy Levy ,  Krishnaswamy Ramkumar ,  Fredrick Jenne ,  Sam Geha

Inventor： Sagy Levy ,  Krishnaswamy Ramkumar ,  Fredrick Jenne ,  Sam Geha

IPC: H01L29/792 ,  H01L21/336

CPC classification number: H01L21/0214 ,  C23C16/0272 ,  C23C16/308 ,  G11C16/0466 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/3145 ,  H01L27/11568 ,  H01L29/40117 ,  H01L29/518 ,  H01L29/7833 ,  H01L29/792

Abstract: A semiconductor device including an oxide-nitride-oxide (ONO) structure having a multi-layer charge storing layer and methods of forming the same are provided. Generally, the method involves: (i) forming a first oxide layer of the ONO structure; (ii) forming a multi-layer charge storing layer comprising nitride on a surface of the first oxide layer; and (iii) forming a second oxide layer of the ONO structure on a surface of the multi-layer charge storing layer. Preferably, the charge storing layer comprises at least two silicon oxynitride layers having differing stoichiometric compositions of Oxygen, Nitrogen and/or Silicon. More preferably, the ONO structure is part of a silicon-oxide-nitride-oxide-silicon (SONOS) structure and the semiconductor device is a SONOS memory transistor. Other embodiments are also disclosed.

Abstract translation: 提供了包括具有多层电荷存储层的氧化物 - 氧化物 - 氧化物（ONO）结构的半导体器件及其形成方法。 通常，该方法包括：（i）形成ONO结构的第一氧化物层; （ii）在所述第一氧化物层的表面上形成包含氮化物的多层电荷存储层; 和（iii）在多层电荷存储层的表面上形成ONO结构的第二氧化物层。 优选地，电荷存储层包括至少两个氧氮，氮和/或硅具有不同化学计量组成的氮氧化硅层。 更优选地，ONO结构是氧化硅 - 氧化物 - 氧化物 - 硅（SONOS）结构的一部分，并且半导体器件是SONOS存储晶体管。 还公开了其他实施例。