公开(公告)号：US07411216B2

公开(公告)日：2008-08-12

申请号：US10902251

申请日：2004-07-29

申请人： Sung-Man Kim ,  Young-Goo Song ,  Hyang-Shik Kong ,  Dong-Hyun Ki ,  Seong-Young Lee ,  Joo-Ae Yoon ,  Jong-Woong Chang

发明人： Sung-Man Kim ,  Young-Goo Song ,  Hyang-Shik Kong ,  Dong-Hyun Ki ,  Seong-Young Lee ,  Joo-Ae Yoon ,  Jong-Woong Chang

IPC分类号： H01L29/04

CPC分类号： H01L27/016 ,  G02F1/13458 ,  G02F1/136227 ,  H01L27/12 ,  H01L27/1244 ,  H01L27/1248 ,  H01L27/1288 ,  H01L27/3244 ,  H01L29/456 ,  H01L29/4908

摘要： A thin film array panel is provided, which includes: a plurality of signal lines including contact parts for contact with an external device; a plurality of thin film transistors connected to the signal lines; an insulating layer formed on the signal lines and the thin film transistors; and a plurality of pixel electrodes formed on the insulating layer and connected to the thin film transistors, wherein the insulating layer includes a contact portion disposed on the contact parts of the signal lines and having a thickness smaller than other portions and the contact portion of the insulating layer includes an inclined portion having an inclination angle smaller than about 45 degrees.

摘要翻译： 提供一种薄膜阵列面板，其包括：多条信号线，包括用于与外部装置接触的接触部分; 连接到信号线的多个薄膜晶体管; 形成在信号线和薄膜晶体管上的绝缘层; 以及形成在所述绝缘层上并连接到所述薄膜晶体管的多个像素电极，其中所述绝缘层包括设置在所述信号线的接触部分上并具有小于其它部分的厚度的接触部分，并且所述接触部分 绝缘层包括具有小于约45度的倾斜角度的倾斜部分。

公开(公告)号：US07396572B2

公开(公告)日：2008-07-08

申请号：US11520888

申请日：2006-09-14

申请人： Yeon-Cu Kim ,  Hyang-Shik Kong ,  Young-Kuil Joo ,  Young-Geol Song

发明人： Yeon-Cu Kim ,  Hyang-Shik Kong ,  Young-Kuil Joo ,  Young-Geol Song

IPC分类号： C09K19/56

CPC分类号： G02F1/133723 ,  G02F1/133784 ,  G02F2203/09 ,  Y10T428/1023

摘要： A liquid crystal display includes; a first and a second display panel facing each other, an alignment layer formed on at least one of the first and the second display panels and including a polyamic acid moieties and a polyimide moieties which form a block copolymer, and a liquid crystal layer interposed between the first display panel and the second display panel.

摘要翻译： 液晶显示器包括： 相互面对的第一和第二显示面板，形成在第一和第二显示面板中的至少一个上的配向层，包括聚酰胺酸部分和形成嵌段共聚物的聚酰亚胺部分，以及介于 第一显示面板和第二显示面板。

公开(公告)号：US07394099B2

公开(公告)日：2008-07-01

申请号：US10931338

申请日：2004-08-31

申请人： Myung-Jae Park ,  Hyang-Shik Kong ,  Young-Joon Rhee ,  Hyeong-Jun Park

发明人： Myung-Jae Park ,  Hyang-Shik Kong ,  Young-Joon Rhee ,  Hyeong-Jun Park

IPC分类号： H01L27/14

CPC分类号： G02F1/136286 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2201/123 ,  H01L27/12

摘要： A thin film transistor array panel is provided, which includes: a gate line; first and second data lines insulated from the gate line; a thin film transistor connected to the gate line and the first data line; a pixel electrode disposed between the first data line and the second data line, spaced apart from the first and the second data lines, and coupled to the thin film transistor; and first and second projections connected to the pixel electrode and overlapping the first and the second data lines, respectively.

摘要翻译： 提供薄膜晶体管阵列面板，其包括：栅线; 与栅极线绝缘的第一和第二数据线; 连接到栅极线和第一数据线的薄膜晶体管; 设置在第一数据线和第二数据线之间的像素电极，与第一和第二数据线间隔开并耦合到薄膜晶体管; 以及分别连接到像素电极并与第一和第二数据线重叠的第一和第二突起。

公开(公告)号：US20080012139A1

公开(公告)日：2008-01-17

申请号：US11770012

申请日：2007-06-28

申请人： Hye-Young Ryu ,  Young-Hoon Yoo ,  Jang-Soo Kim ,  Sung-Man Kim ,  Kyung-Wook Kim ,  Hyang-Shik Kong ,  Young-Goo Song

发明人： Hye-Young Ryu ,  Young-Hoon Yoo ,  Jang-Soo Kim ,  Sung-Man Kim ,  Kyung-Wook Kim ,  Hyang-Shik Kong ,  Young-Goo Song

IPC分类号： H01L23/48

CPC分类号： G02F1/136227 ,  G02F2001/136236 ,  H01L27/1244 ,  H01L27/1248

摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge, placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.

摘要翻译： 提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并且具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

公开(公告)号：US07294855B2

公开(公告)日：2007-11-13

申请号：US10653556

申请日：2003-09-02

申请人： Bum-Gee Baek ,  Kwon-Young Choi ,  Young-Joon Rhee ,  Bong-Joo Kang ,  Seung-Taek Lim ,  Hyang-Shik Kong ,  Won-Joo Kim

发明人： Bum-Gee Baek ,  Kwon-Young Choi ,  Young-Joon Rhee ,  Bong-Joo Kang ,  Seung-Taek Lim ,  Hyang-Shik Kong ,  Won-Joo Kim

IPC分类号： H01L29/04

CPC分类号： G02F1/13458 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/136236 ,  G02F2001/13629 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908

摘要： Gate lines are formed on a substrate. A gate insulating layer, an intrinsic a-Si layer, an extrinsic a-Si layer, a lower film of Cr and an upper film of Al containing metal are sequentially deposited. A photoresist having thicker first portions on wire areas and thinner second portions on channel areas is formed on the upper film. The upper film on remaining areas are wet-etched, and the lower film and the a-Si layers on the remaining areas are dry-etched along with the second portions of the photoresist. The upper film, the lower film, and the extrinsic a-Si layer on the channel areas are removed. The removal of the upper film and the lower film on the channel areas are performed by wet etching, and the first portions of the photoresist are removed after the removal of the upper film on the channel areas.

摘要翻译： 栅极线形成在基板上。 依次沉积栅极绝缘层，本征a-Si层，外部a-Si层，下部Cr膜和含Al金属的上部膜。 在上部膜上形成具有较粗的第一部分在导线区域上的光刻胶和在沟道区域上较薄的第二部分的光致抗蚀剂。 在其余区域上的上部膜被湿式蚀刻，并且其余区域上的下部膜和a-Si层与光致抗蚀剂的第二部分一起被干蚀刻。 除去沟道区上的上膜，下膜和非本征a-Si层。 通过湿蚀刻来进行通道区域上的上膜和下膜的去除，并且在去除沟道区上的上膜之后去除光致抗蚀剂的第一部分。

公开(公告)号：US07271867B2

公开(公告)日：2007-09-18

申请号：US10273073

申请日：2002-10-17

申请人： Jang-Soo Kim ,  Hyang-Shik Kong ,  Min-Wook Park ,  Sang-Jin Jeon

发明人： Jang-Soo Kim ,  Hyang-Shik Kong ,  Min-Wook Park ,  Sang-Jin Jeon

IPC分类号： G02F1/1333 ,  G02F1/136

CPC分类号： G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/136236 ,  H01L27/124 ,  H01L27/1244 ,  H01L27/1288 ,  H01L29/66765

摘要： A device and corresponding method of fabrication thereof are disclosed, where the device provides a contact for semiconductor and display devices, the device including a substrate, a first wiring line assembly formed on the substrate, an under-layer formed on the first wiring line assembly, an organic insulating layer formed on the under-layer such that the organic insulating layer covers the under-layer, a pattern on the organic insulating layer for contact holes to expose the under-layer, etched contact holes formed in the under-layer in correspondence with the pattern such that the underlying first wiring line assembly is exposed to the outside, a cured organic insulating layer formed on the under-layer, and a second wiring line assembly formed on the organic insulating layer such that the second wiring line assembly is connected to the first wiring line assembly through the etched contact holes; and the corresponding method of fabrication including forming a first wiring line assembly on a substrate, forming an under-layer on the first wiring line assembly, forming an organic insulating layer such that the organic insulating layer covers the under-layer, patterning the organic insulating layer to thereby form contact holes exposing the under-layer, etching the under-layer exposed through the contact holes such that the underlying first wiring line assembly is exposed to the outside, curing the organic insulating layer, and forming a second wiring line assembly on the organic insulating layer such that the second wiring line assembly is connected to the first wiring line assembly through the contact holes.

摘要翻译： 公开了一种器件及其相应的制造方法，其中器件为半导体和显示器件提供接触，该器件包括衬底，形成在衬底上的第一布线组件，形成在第一布线组件上的底层 形成在下层上的有机绝缘层，使得有机绝缘层覆盖下层，在有机绝缘层上形成用于接触孔的图案，以暴露下层中形成的下层的蚀刻接触孔， 与图案对应，使得下面的第一布线组件暴露于外部，形成在下层上的固化的有机绝缘层和形成在有机绝缘层上的第二布线组件，使得第二布线组件是 通过蚀刻的接触孔连接到第一布线组件; 以及相应的制造方法，包括在基板上形成第一布线线组件，在第一布线线路组件上形成底层，形成有机绝缘层，以使有机绝缘层覆盖下层，图案化有机绝缘层 从而形成暴露下层的接触孔，蚀刻通过接触孔暴露的下层，使得下面的第一布线线组件暴露于外部，固化有机绝缘层，并形成第二布线组件 所述有机绝缘层使得所述第二布线组合体通过所述接触孔连接到所述第一布线线组件。

公开(公告)号：US20070211201A1

公开(公告)日：2007-09-13

申请号：US11747719

申请日：2007-05-11

申请人： Myung-Jae PARK ,  Young-Joon Rhee ,  Hyeong-Jun Park ,  Hyang-Shik Kong

发明人： Myung-Jae PARK ,  Young-Joon Rhee ,  Hyeong-Jun Park ,  Hyang-Shik Kong

IPC分类号： G02F1/1343

CPC分类号： G02F1/136286 ,  G02F1/133707 ,  G02F2001/13625

摘要： A thin film panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line that intersects the first signal line and includes first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions; and first and second pixel electrodes disposed adjacent to the second signal line and overlapping the first and the second portions of the second signal line, respectively.

摘要翻译： 提供薄膜面板，其包括：基板; 形成在所述基板上的第一信号线; 第二信号线与第一信号线相交并且包括基本上直线的第一和第二部分，并且设置在不同的直线上，以及连接到第一和第二部分的连接; 以及与第二信号线相邻设置并与第二信号线的第一和第二部分重叠的第一和第二像素电极。

公开(公告)号：US07223997B2

公开(公告)日：2007-05-29

申请号：US11008720

申请日：2004-12-08

申请人： Kyung-Wook Kim ,  Beom-Jun Kim ,  Sung-Man Kim ,  Byeong-Jae Ahn ,  Young-Goo Song ,  Hyang-Shik Kong

发明人： Kyung-Wook Kim ,  Beom-Jun Kim ,  Sung-Man Kim ,  Byeong-Jae Ahn ,  Young-Goo Song ,  Hyang-Shik Kong

IPC分类号： H01L29/04

CPC分类号： H01L27/124 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136227 ,  G02F2001/136218 ,  G02F2001/136222 ,  H01L27/1214 ,  H01L27/1288

摘要： A thin film array panel is provided, which includes: a gate line formed on a substrate; a first insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer; a data line formed on the gate insulating layer and intersecting the gate line; a drain electrode formed at least on the semiconductor layer; a conductor arranged in parallel to the data line; a second insulating layer formed on the data line, the drain electrode, and the conductor and having a first contact hole exposing a portion of the drain electrode; and a pixel electrode formed on the second insulating layer, connected to the drain electrode through the first contact hole, fully covering the data line.

摘要翻译： 提供薄膜阵列面板，其包括：形成在基板上的栅极线; 形成在栅极线上的第一绝缘层; 形成在所述栅极绝缘层上的半导体层; 形成在栅极绝缘层上并与栅极线相交的数据线; 至少形成在所述半导体层上的漏电极; 与数据线平行布置的导体; 形成在所述数据线上的第二绝缘层，所述漏电极和所述导体，并且具有暴露所述漏电极的一部分的第一接触孔; 以及形成在第二绝缘层上的像素电极，通过第一接触孔连接到漏电极，完全覆盖数据线。

公开(公告)号：US07187003B2

公开(公告)日：2007-03-06

申请号：US10986930

申请日：2004-11-15

申请人： Hyang-Shik Kong ,  Sung-Wook Huh ,  Young-Bae Park

发明人： Hyang-Shik Kong ,  Sung-Wook Huh ,  Young-Bae Park

IPC分类号： H01L31/036 ,  H01L21/00

CPC分类号： G02F1/1362 ,  G02F1/13458 ,  G02F2001/136254 ,  H01L21/32134 ,  H01L21/32136 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

摘要： Disclosed is a thin film transistor substrate and a system for inspecting the same. The thin film transistor substrate comprises gate wiring formed on an insulation substrate and including gate lines, and gate electrodes and gate pads connected to the gate lines; a gate insulation layer covering the gate wiring; a semiconductor layer formed over the gate insulation layer; data wiring formed over the gate insulation layer and including data pads; a protection layer covering the data wiring; auxiliary pads connected to the data pads through contact holes formed in the protection layer; and a pad auxiliary layer formed protruding a predetermined height under the data pads. The inspection system for determining whether a thin film transistor substrate is defective, in which the thin film transistor substrate comprises gate wiring including gate lines, gate electrodes and gate pads, and data wiring including source electrodes and drain electrodes, includes a probe pin for contacting the gate pads or data pads and transmitting a corresponding signal, wherein a contact tip at a distal end of the probe pin for contacting the gate pads or the data pads is rounded, and a radius of the rounded contact tip is 2 μm or less, or the rounded contact tip is coated with gold (Au).

摘要翻译： 公开了一种薄膜晶体管基板及其检查系统。 薄膜晶体管基板包括形成在绝缘基板上并包括栅极线的栅极布线，以及连接到栅极线的栅电极和栅极焊盘; 覆盖栅极布线的栅极绝缘层; 形成在所述栅绝缘层上的半导体层; 数据布线形成在栅极绝缘层上并包括数据焊盘; 覆盖数据线的保护层; 辅助焊盘通过形成在保护层中的接触孔连接到数据焊盘; 以及在数据焊盘下方突出预定高度形成的焊盘辅助层。 用于确定薄膜晶体管基板是否缺陷的检查系统，其中薄膜晶体管基板包括包括栅极线，栅电极和栅极焊盘的栅极布线，以及包括源电极和漏电极的数据布线，包括用于接触的探针 栅极焊盘或数据焊盘并传输相应的信号，其中用于接触栅极焊盘或数据焊盘的探针的远端处的接触尖端是圆形的，并且圆形接触尖端的半径为2μm或更小， 或圆形接触尖端涂有金（Au）。

公开(公告)号：US20070046569A1

公开(公告)日：2007-03-01

申请号：US11551450

申请日：2006-10-20

申请人： Dong-Gyu KIM ,  Hyang-Shik Kong ,  Jang-Soo Kim

发明人： Dong-Gyu KIM ,  Hyang-Shik Kong ,  Jang-Soo Kim

IPC分类号： G09G3/04

CPC分类号： G02F1/136213 ,  G02F1/1337 ,  G02F1/133784 ,  G02F1/134336 ,  G02F1/136227 ,  G02F2201/123

摘要： A TFT array panel includes an insulating substrate, a gate line and a storage electrode line formed thereon. The gate line and the storage electrode line are covered with a gate insulating layer, and a semiconductor island is formed on the gate insulating layer. A pair of ohmic contacts are formed on the semiconductor island, and a data line and a drain electrode are formed thereon. The data line and the drain electrode are covered with a passivation layer having a contact hole exposing the drain electrode. A pixel electrode is formed on the passivation layer and connected to the drain electrode through the contact hole. The TFT array panel is covered with an alignment layer rubbed approximately in a direction from the upper left corner to the lower right corner of the TFT array panel or the pixel electrodes. The pixel electrode has approximately a rectangular shape and overlaps the gate line and the data line. The pixel electrode has an expansion located near the upper left corner of the pixel electrode to increase the width of the corresponding overlapping area between the pixel electrode and the gate line and/or the data line.

摘要翻译： TFT阵列面板包括绝缘基板，栅极线和形成在其上的存储电极线。 栅极线和存储电极线被栅极绝缘层覆盖，并且在栅极绝缘层上形成半导体岛。 在半导体岛上形成一对欧姆接触，在其上形成数据线和漏电极。 数据线和漏电极被具有暴露漏电极的接触孔的钝化层覆盖。 像素电极形成在钝化层上，并通过接触孔与漏电极连接。 TFT阵列面板被大致沿着从TFT阵列板的左上角到右下角或像素电极的方向摩擦的取向膜覆盖。 像素电极具有大致矩形形状并且与栅极线和数据线重叠。 像素电极具有位于像素电极的左上角附近的扩展部，以增加像素电极与栅极线和/或数据线之间的对应重叠区域的宽度。