公开(公告)号：US08995172B2

公开(公告)日：2015-03-31

申请号：US14186726

申请日：2014-02-21

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim

IPC: G11C11/00 ,  H01L29/02 ,  H01L45/00 ,  G11C13/00 ,  H01L27/24

CPC classification number: H01L45/1253 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/56 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/148 ,  H01L45/1616

Abstract: Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises at least one layer of resistive material that is configured to improve the switching performance and lifetime of the formed resistive switching memory element. The electrical properties of the formed current limiting layer, or resistive layer, are configured to lower the current flow through the variable resistance layer during the logic state programming steps (i.e., “set” and “reset” steps) by adding a fixed series resistance in the formed resistive switching memory element found in the nonvolatile memory device. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players.

Abstract translation: 本发明的实施例通常包括一种形成非易失性存储器件的方法，该非易失性存储器件包含由于添加限定在其中的限流部件而具有改进的器件切换性能和寿命的电阻式开关存储元件。 在一个实施例中，限流部件包括至少一层电阻材料，其被配置为提高所形成的电阻式开关存储元件的开关性能和寿命。 所形成的限流层或电阻层的电性能被配置为在逻辑状态编程步骤（即“设定”和“复位”步骤）期间通过添加固定的串联电阻来降低通过可变电阻层的电流 在形成在非易失性存储器件中的电阻式开关存储元件中。 通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。

公开(公告)号：US20150017780A1

公开(公告)日：2015-01-15

申请号：US14504620

申请日：2014-10-02

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Dipankar Pramanik

IPC: H01L45/00

CPC classification number: H01L45/16 ,  H01L27/2463 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1675

Abstract: A nonvolatile resistive memory element includes one or more novel oxygen isolation structures that protect the resistive switching material of the memory element from oxygen migration. One such oxygen isolation structure comprises an oxygen barrier layer that isolates the resistive switching material from other portions of the resistive memory device during fabrication and/or operation of the memory device. Another such oxygen isolation structure comprises a sacrificial layer that reacts with unwanted oxygen migrating toward the resistive switching material during fabrication and/or operation of the memory device.

Abstract translation: 非易失性电阻存储元件包括一个或多个新颖的氧隔离结构，其保护存储元件的电阻开关材料免于氧迁移。 一个这样的氧隔离结构包括氧阻隔层，其在制造和/或操作存储器件期间将电阻性开关材料与电阻式存储器件的其它部分隔离。 另一种这样的氧隔离结构包括牺牲层，其在存储器件的制造和/或操作期间与向电阻开关材料迁移的不想要的氧化反应。

公开(公告)号：US20150016178A1

公开(公告)日：2015-01-15

申请号：US14133057

申请日：2013-12-18

Applicant: Intermolecular Inc.

Inventor： Federico Nardi ,  Sergey Barabash ,  Yun Wang

IPC: G11C13/00 ,  H01L45/00

CPC classification number: G11C13/004 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/52 ,  H01L45/08 ,  H01L45/1206 ,  H01L45/146 ,  H01L45/1675

Abstract: A resistive switching memory device can include three or more electrodes interfacing a switching layer, including a top electrode, a bottom electrode, and a side electrode. The top and bottom electrodes can be used for forming conductive filaments and for reading the memory device. The side electrode can be used to control the resistance state of the switching layer.

Abstract translation: 电阻式开关存储器件可以包括与包括顶电极，底电极和侧电极在内的开关层接口的三个或更多个电极。 顶部和底部电极可用于形成导电细丝并用于读取存储器件。 侧电极可用于控制开关层的电阻状态。

公开(公告)号：US20140361235A1

公开(公告)日：2014-12-11

申请号：US14469282

申请日：2014-08-26

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/145 ,  B82Y10/00 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/147 ,  H01L45/1608

Abstract: A nonvolatile resistive memory element has a novel variable resistance layer that includes a metal nitride, a metal oxide-nitride, a two-metal oxide-nitride, or a multilayer stack thereof. One method of forming the novel variable resistance layer comprises an interlayer deposition procedure, in which metal oxide layers are interspersed with metal nitride layers and then converted into a substantially homogeneous layer by an anneal process. Another method of forming the novel variable resistance layer comprises an intralayer deposition procedure, in which various ALD processes are sequentially interleaved to form a metal oxide-nitride layer. Alternatively, a metal oxide is deposited, nitridized, and annealed to form the variable resistance layer or a metal nitride is deposited, oxidized, and annealed to form the variable resistance layer.

Abstract translation: 非易失性电阻存储元件具有新颖的可变电阻层，其包括金属氮化物，金属氧化物氮化物，二金属氧化物氮化物或其多层叠层。 形成新颖的可变电阻层的一种方法包括层间沉积程序，其中金属氧化物层散布有金属氮化物层，然后通过退火工艺转变成基本均匀的层。 形成新型可变电阻层的另一种方法包括层间沉积程序，其中各种ALD工艺顺序交错以形成金属氧化物 - 氮化物层。 或者，金属氧化物被沉积，氮化和退火以形成可变电阻层，或者金属氮化物被沉积，氧化和退火以形成可变电阻层。

公开(公告)号：US08883655B2

公开(公告)日：2014-11-11

申请号：US13897050

申请日：2013-05-17

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik

IPC: H01L21/31 ,  H01L21/469 ,  H01L45/00 ,  H01L21/02 ,  C23C16/455 ,  C23C16/40 ,  H01L27/24

CPC classification number: H01L45/145 ,  C23C16/40 ,  C23C16/45525 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/0228 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616

Abstract: Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies. Therefore, the metal oxide film stacks have improved switching performance and reliability during memory cell applications compared to traditional hafnium oxide based stacks of previous memory cells.

Abstract translation: 本发明的实施例一般涉及非易失性存储器件，例如ReRAM单元，以及用于制造这种存储器件的方法，其包括用于形成金属氧化物膜堆叠的优化的原子层沉积（ALD）工艺。 金属氧化物膜堆叠包含设置在金属氧化物主体层上的金属氧化物耦合层，每个层具有不同的晶粒结构/尺寸。 设置在金属氧化物层之间的界面有助于氧空位移动。 在许多示例中，与垂直于电极界面延伸的体膜中的晶粒相反，界面是不对齐的晶粒界面，其包含平行于电极界面延伸的许多晶界。 因此，氧空缺在切换期间被捕获和释放，而空位明显损失。 因此，与以前的存储单元的传统的基于氧化铪的堆叠相比，金属氧化物膜堆叠在存储单元应用中具有改进的开关性能和可靠性。

公开(公告)号：US20140322884A1

公开(公告)日：2014-10-30

申请号：US13869800

申请日：2013-04-24

Applicant: Intermolecular Inc.

Inventor： Randall J. Higuchi ,  Chien-Lan Hsueh ,  Yun Wang

IPC: H01L45/00

CPC classification number: H01L27/2463 ,  H01L21/0228 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/1616

Abstract: A nonvolatile resistive memory element includes a novel switching layer and methods of forming the same. The switching layer includes a material having bistable resistance properties and formed by bonding silicon to oxygen or nitrogen. The switching layer may include at least one of SiOx, SiOxNy, or SiNx. Advantageously, the SiOx, SiOxNy, and SiNx generally remain amorphous after thermal anneal processes are used to form the devices, such as ReRAM devices.

Abstract translation: 非易失性电阻性存储元件包括新颖的开关层及其形成方法。 开关层包括具有双稳电阻性质并通过将硅键合到氧或氮而形成的材料。 开关层可以包括SiO x，SiO x N y或SiN x中的至少一种。 有利地，在使用热退火工艺来形成诸如ReRAM器件的器件之后，SiO x，SiO x N y和SiN x通常保持非晶态。

公开(公告)号：US20140319443A1

公开(公告)日：2014-10-30

申请号：US14327774

申请日：2014-07-10

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/145 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616

Abstract: Provided are methods of forming nonvolatile memory elements using atomic layer deposition techniques, in which at least two different layers of a memory element are deposited sequentially and without breaking vacuum in a deposition chamber. This approach may be used to prevent oxidation of various materials used for electrodes without a need for separate oxygen barrier layers. A combination of signal lines and resistive switching layers may be used to cap the electrodes and to minimize their oxidation. As such, fewer layers are needed in a memory element. Furthermore, atomic layer deposition allows more precise control of electrode thicknesses. In some embodiments, a thickness of an electrode may be less than 50 Angstroms. Overall, atomic layer deposition of electrodes and resistive switching layers lead to smaller thicknesses of entire memory elements making them more suitable for low aspect ratio features of advanced nodes.

Abstract translation: 提供了使用原子层沉积技术形成非易失性存储元件的方法，其中存储元件的至少两个不同层顺次沉积并且在沉积室中不破坏真空。 该方法可以用于防止用于电极的各种材料的氧化，而不需要单独的氧阻隔层。 可以使用信号线和电阻开关层的组合来封盖电极并使其氧化最小化。 因此，存储元件中需要更少的层。 此外，原子层沉积允许更精确地控制电极厚度。 在一些实施例中，电极的厚度可以小于50埃。 总的来说，电极和电阻开关层的原子层沉积导致整个存储元件的较小厚度，使得它们更适合于高级节点的低纵横比特征。

公开(公告)号：US08871564B2

公开(公告)日：2014-10-28

申请号：US14194082

申请日：2014-02-28

Applicant: Intermolecular Inc.

Inventor： Yun Wang ,  Imran Hashim

IPC: H01L29/02 ,  H01L45/00

CPC classification number: H01L45/146 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

Abstract: Provided are resistive random access memory (ReRAM) cells having diffusion barrier layers formed from various materials, such as beryllium oxide or titanium silicon nitrides. Resistive switching layers used in ReRAM cells often need to have at least one inert interface such that substantially no materials pass through this interface. The other (reactive) interface may be used to introduce and remove defects from the resistive switching layers causing the switching. While some electrode materials, such as platinum and doped polysilicon, may form inert interfaces, these materials are often difficult to integrate. To expand electrode material options, a diffusion barrier layer is disposed between an electrode and a resistive switching layer and forms the inert interface with the resistive switching layer. In some embodiments, tantalum nitride and titanium nitride may be used for electrodes separated by such diffusion barrier layers.

公开(公告)号：US20140315369A1

公开(公告)日：2014-10-23

申请号：US14317155

申请日：2014-06-27

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Tim Minvielle ,  Dipankar Pramanik ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/56 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16

Abstract: Provided are semiconductor devices, such as resistive random access memory (ReRAM) cells, that include current limiting layers formed from alloys of transition metals. Some examples of such alloys include chromium containing alloys that may also include nickel, aluminum, and/or silicon. Other examples include tantalum and/or titanium containing alloys that may also include a combination of silicon and carbon or a combination of aluminum and nitrogen. These current limiting layers may have resistivities of at least about 1 Ohm-cm. This resistivity level is maintained even when the layers are subjected to strong electrical fields and/or high temperature processing. In some embodiments, the breakdown voltage of a current limiting layer is at least about 8V. The high resistivity of the layers allows scaling down the size of the semiconductor devices including these layers while maintaining their performance.

Abstract translation: 提供了诸如电阻随机存取存储器（ReRAM）单元的半导体器件，其包括由过渡金属的合金形成的限流层。 这种合金的一些实例包括还可以包括镍，铝和/或硅的含铬合金。 其它实例包括也可以包括硅和碳的组合或铝和氮的组合的含钽和/或钛的合金。 这些限流层可具有至少约1欧姆 - 厘米的电阻率。 即使当这些层受到强电场和/或高温处理时，也保持该电阻率水平。 在一些实施例中，限流层的击穿电压为至少约8V。 层的高电阻率允许在保持其性能的同时缩小包括这些层的半导体器件的尺寸。

公开(公告)号：US08809159B2

公开(公告)日：2014-08-19

申请号：US13722155

申请日：2012-12-20

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC: H01L21/20

CPC classification number: H01L45/1253 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/146 ,  H01L45/1641

Abstract: Provided are radiation enhanced resistive switching layers, resistive random access memory (ReRAM) cells including these layers, as well as methods of forming these layers and cells. Radiation creates defects in resistive switching materials that allow forming and breaking conductive paths in these materials thereby improving their resistive switching characteristics. For example, ionizing radiation may break chemical bonds in various materials used for such a layer, while non-ionizing radiation may form electronic traps. Radiation power, dozing, and other processing characteristics can be controlled to generate a distribution of defects within the resistive switching layer. For example, an uneven distribution of defects through the thickness of a layer may help with lowering switching voltages and/or currents. Radiation may be performed before or after thermal annealing, which may be used to control distribution of radiation created defects and other types of defects in resistive switching layers.

Abstract translation: 提供了辐射增强的电阻式开关层，包括这些层的电阻随机存取存储器（ReRAM）单元，以及形成这些层和单元的方法。 辐射在电阻开关材料中产生缺陷，允许在这些材料中形成和断开导电路径，从而提高其电阻开关特性。 例如，电离辐射可以破坏用于这种层的各种材料中的化学键，而非电离辐射可以形成电子陷阱。 可以控制辐射功率，打盹等处理特性，以产生电阻式开关层内的缺陷分布。 例如，通过层的厚度的缺陷的不均匀分布可能有助于降低开关电压和/或电流。 可以在热退火之前或之后进行辐射，其可以用于控制电阻开关层中辐射产生的缺陷和其他类型的缺陷的分布。