公开(公告)号：US08975139B2

公开(公告)日：2015-03-10

申请号：US14000901

申请日：2012-09-04

申请人： Shinichiro Miyahara ,  Toshimasa Yamamoto ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

发明人： Shinichiro Miyahara ,  Toshimasa Yamamoto ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

IPC分类号： H01L21/336 ,  H01L29/66 ,  H01L29/78 ,  H01L21/3065 ,  H01L29/34 ,  H01L29/423 ,  H01L29/16

CPC分类号： H01L29/66666 ,  H01L21/3065 ,  H01L29/1608 ,  H01L29/34 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/7813

摘要： A manufacturing method of a silicon carbide semiconductor device includes: forming a drift layer on a silicon carbide substrate; forming a base layer on or in a surface portion of the drift layer; forming a source region in a surface portion of the base layer; forming a trench to penetrate the base layer and to reach the drift layer; forming a gate electrode on a gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate. The forming of the trench includes: flattening a substrate surface; and etching to form the trench after flattening.

摘要翻译： 碳化硅半导体器件的制造方法包括：在碳化硅衬底上形成漂移层; 在漂移层的表面部分上或其中形成基底层; 在所述基底层的表面部分中形成源区; 形成沟槽以穿透基层并到达漂移层; 在沟槽中的栅极绝缘膜上形成栅电极; 形成与源极区域和基极层电连接的源电极; 以及在所述基板的背面上形成漏电极。 沟槽的形成包括：使基底表面变平; 并进行蚀刻以在平坦化之后形成沟槽。

公开(公告)号：US08618555B2

公开(公告)日：2013-12-31

申请号：US13117575

申请日：2011-05-27

申请人： Naohiro Suzuki ,  Hideo Matsuki ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Jun Morimoto ,  Tsuyoshi Ishikawa ,  Narumasa Soejima ,  Yukihiko Watanabe

发明人： Naohiro Suzuki ,  Hideo Matsuki ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Jun Morimoto ,  Tsuyoshi Ishikawa ,  Narumasa Soejima ,  Yukihiko Watanabe

IPC分类号： H01L29/66

CPC分类号： H01L29/7813 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/66068

摘要： The silicon carbide semiconductor device includes a substrate, a drift layer, a base region, a source region, a trench, a gate insulating layer, a gate electrode, a source electrode, a drain electrode, and a deep layer. The deep layer is disposed under the base region and is located to a depth deeper than the trench. The deep layer is divided into a plurality of portions in a direction that crosses a longitudinal direction of the trench. The portions include a group of portions disposed at positions corresponding to the trench and arranged at equal intervals in the longitudinal direction of the trench. The group of portions surrounds corners of a bottom of the trench.

摘要翻译： 碳化硅半导体器件包括衬底，漂移层，基极区域，源极区域，沟槽，栅极绝缘层，栅极电极，源极电极，漏极电极和深层。 深层设置在基底区域下方并且位于比沟槽更深的深度。 深层在与沟槽的纵向方向交叉的方向上分成多个部分。 这些部分包括设置在与沟槽相对应的位置处的一组部分，其在沟槽的纵向方向上以相等的间隔布置。 该组部分围绕沟槽的底部的角落。

公开(公告)号：US08575689B2

公开(公告)日：2013-11-05

申请号：US13330835

申请日：2011-12-20

申请人： Tomohiro Mimura ,  Shinichiro Miyahara ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Narumasa Soejima ,  Tsuyoshi Ishikawa ,  Yukihiko Watanabe

发明人： Tomohiro Mimura ,  Shinichiro Miyahara ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Narumasa Soejima ,  Tsuyoshi Ishikawa ,  Yukihiko Watanabe

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/7813 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66068 ,  H01L29/7397

摘要： An SiC semiconductor device includes a substrate, a drift layer, a base region, a source region, a trench, a gate oxide film, a gate electrode, a source electrode and a drain electrode. The substrate has a Si-face as a main surface. The source region has the Si-face. The trench is provided from a surface of the source region to a portion deeper than the base region and extends longitudinally in one direction and has a Si-face bottom. The trench has an inverse tapered shape, which has a smaller width at an entrance portion than at a bottom, at least at a portion that is in contact with the base region.

摘要翻译： SiC半导体器件包括衬底，漂移层，基极区域，源极区域，沟槽，栅极氧化膜，栅电极，源电极和漏电极。 基板具有作为主表面的Si面。 源区具有Si面。 沟槽从源极区域的表面提供到比基部区域更深的部分并且在一个方向上纵向延伸并且具有Si面底部。 沟槽具有倒锥形形状，至少在与基部区域接触的部分处，入口部分处的宽度比底部宽。

公开(公告)号：US08492867B2

公开(公告)日：2013-07-23

申请号：US13164246

申请日：2011-06-20

申请人： Kensaku Yamamoto ,  Naohiro Suzuki ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Jun Morimoto ,  Narumasa Soejima ,  Tsuyoshi Ishikawa ,  Yukihiko Watanabe

发明人： Kensaku Yamamoto ,  Naohiro Suzuki ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Jun Morimoto ,  Narumasa Soejima ,  Tsuyoshi Ishikawa ,  Yukihiko Watanabe

IPC分类号： H01L21/20

CPC分类号： H01L29/7813 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/407 ,  H01L29/66068 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/8613

摘要： A semiconductor device includes a semiconductor substrate and an electric field terminal part. The semiconductor substrate includes a substrate, a drift layer disposed on a surface of the substrate, and a base layer disposed on a surface of the drift layer. The semiconductor substrate is divided into a cell region in which a semiconductor element is disposed and a peripheral region that surrounds the cell region. The base region has a bottom face located on a same plane throughout the cell region and the peripheral region and provides an electric field relaxing layer located in the peripheral region. The electric field terminal part surrounds the cell region and a portion of the electric field relaxing layer and penetrates the electric field relaxing layer from a surface of the electric field relaxing layer to the drift layer.

摘要翻译： 半导体器件包括半导体衬底和电场端子部分。 半导体衬底包括衬底，设置在衬底的表面上的漂移层和设置在漂移层的表面上的基底层。 半导体衬底被分成其中设置半导体元件的单元区域和围绕单元区域的外围区域。 基底区域具有位于整个电池区域和外围区域的同一平面上的底面，并且提供位于周边区域中的电场弛豫层。 电场端子部围绕电池区域和电场缓和层的一部分，从电场缓和层的表面向漂移层贯通电场缓和层。

公开(公告)号：US08436365B2

公开(公告)日：2013-05-07

申请号：US13031280

申请日：2011-02-21

申请人： Takeo Yamamoto ,  Takeshi Endo ,  Jun Morimoto ,  Hirokazu Fujiwara ,  Yukihiko Watanabe ,  Takashi Katsuno ,  Tsuyoshi Ishikawa

发明人： Takeo Yamamoto ,  Takeshi Endo ,  Jun Morimoto ,  Hirokazu Fujiwara ,  Yukihiko Watanabe ,  Takashi Katsuno ,  Tsuyoshi Ishikawa

IPC分类号： H01L29/16 ,  H01L29/47 ,  H01L29/872

CPC分类号： H01L29/47 ,  H01L21/0495 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/1608 ,  H01L29/402 ,  H01L29/6606 ,  H01L29/872

摘要： A SiC semiconductor device having a Schottky barrier diode includes: a substrate made of SiC and having a first conductive type, wherein the substrate includes a main surface and a rear surface; a drift layer made of SiC and having the first conductive type, wherein the drift layer is disposed on the main surface of the substrate and has an impurity concentration lower than the substrate; a Schottky electrode disposed on the drift layer and has a Schottky contact with a surface of the drift layer; and an ohmic electrode disposed on the rear surface of the substrate. The Schottky electrode directly contacts the drift layer in such a manner that a lattice of the Schottky electrode is matched with a lattice of the drift layer.

摘要翻译： 具有肖特基势垒二极管的SiC半导体器件包括：由SiC制成并具有第一导电类型的衬底，其中所述衬底包括主表面和后表面; 由SiC制成并具有第一导电类型的漂移层，其中所述漂移层设置在所述衬底的主表面上并且具有低于所述衬底的杂质浓度; 肖特基电极，设置在漂移层上并与漂移层的表面具有肖特基接触; 以及设置在基板的后表面上的欧姆电极。 肖特基电极以使得肖特基电极的晶格与漂移层的晶格匹配的方式直接接触漂移层。

公开(公告)号：US20120297328A1

公开(公告)日：2012-11-22

申请号：US13448715

申请日：2012-04-17

申请人： Tomohisa TANAKA ,  Tsuyoshi Ishikawa ,  Qihong Wang ,  Akihiro Komori

发明人： Tomohisa TANAKA ,  Tsuyoshi Ishikawa ,  Qihong Wang ,  Akihiro Komori

IPC分类号： G06F3/048

CPC分类号： G06F3/048 ,  G06F3/04817 ,  G06F3/0486 ,  G06F3/0488 ,  G06F21/00

摘要： An electronic apparatus includes an input unit and a controller. The input unit is configured to detect a user operation and output a signal corresponding to the user operation. The controller is configured to cause a data icon to be displayed on a screen of a display unit, judge a drag operation with respect to the data icon based on the signal from the input unit, and cause an icon to be displayed on the screen according to the drag operation, the icon indicating a state of an access authority of data related to the data icon.

摘要翻译： 电子设备包括输入单元和控制器。 输入单元被配置为检测用户操作并输出与用户操作相对应的信号。 控制器被配置为使数据图标显示在显示单元的屏幕上，基于来自输入单元的信号来判断相对于数据图标的拖动操作，并且使图标显示在屏幕上 拖动操作，该图标指示与数据图标相关的数据的访问权限的状态。

公开(公告)号：US20120291093A1

公开(公告)日：2012-11-15

申请号：US13456488

申请日：2012-04-26

申请人： Qihong Wang ,  Akihiro Komori ,  Tomohisa Tanaka ,  Tsuyoshi Ishikawa

发明人： Qihong Wang ,  Akihiro Komori ,  Tomohisa Tanaka ,  Tsuyoshi Ishikawa

IPC分类号： G06F21/00

CPC分类号： H04L9/3215 ,  G06F21/36 ,  H04W12/06

摘要： There is provided a communication device including a determination unit for determining whether authentication information presented to a user of another communication device is consistent with comparison information transmitted from the other communication device capable of obtaining and transmitting the authentication information, and an authentication unit, when it is determined that the authentication information is consistent with the comparison information, for authenticating the other communication device as an opposite communication party.

摘要翻译： 提供了一种通信设备，包括：确定单元，用于确定呈现给另一通信设备的用户的认证信息是否与能够获得和发送认证信息的另一通信设备发送的比较信息一致;以及认证单元，当 确定认证信息与比较信息一致，用于认证另一通信设备作为相对的通信方。

公开(公告)号：US20110204383A1

公开(公告)日：2011-08-25

申请号：US13031280

申请日：2011-02-21

申请人： Takeo YAMAMOTO ,  Takeshi Endo ,  Jun Morimoto ,  Hirokazu Fujiwara ,  Yukihiko Watanabe ,  Takashi Katsuno ,  Tsuyoshi Ishikawa

发明人： Takeo YAMAMOTO ,  Takeshi Endo ,  Jun Morimoto ,  Hirokazu Fujiwara ,  Yukihiko Watanabe ,  Takashi Katsuno ,  Tsuyoshi Ishikawa

IPC分类号： H01L29/24 ,  H01L21/329 ,  B82Y99/00 ,  B82Y40/00

CPC分类号： H01L29/47 ,  H01L21/0495 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/1608 ,  H01L29/402 ,  H01L29/6606 ,  H01L29/872

摘要： A SiC semiconductor device having a Schottky barrier diode includes: a substrate made of SiC and having a first conductive type, wherein the substrate includes a main surface and a rear surface; a drift layer made of SiC and having the first conductive type, wherein the drift layer is disposed on the main surface of the substrate and has an impurity concentration lower than the substrate; a Schottky electrode disposed on the drift layer and has a Schottky contact with a surface of the drift layer; and an ohmic electrode disposed on the rear surface of the substrate. The Schottky electrode directly contacts the drift layer in such a manner that a lattice of the Schottky electrode is matched with a lattice of the drift layer.

摘要翻译： 具有肖特基势垒二极管的SiC半导体器件包括：由SiC制成并具有第一导电类型的衬底，其中所述衬底包括主表面和后表面; 由SiC制成并具有第一导电类型的漂移层，其中所述漂移层设置在所述衬底的主表面上并且具有低于所述衬底的杂质浓度; 肖特基电极，设置在漂移层上并与漂移层的表面具有肖特基接触; 以及设置在基板的后表面上的欧姆电极。 肖特基电极以使得肖特基电极的晶格与漂移层的晶格匹配的方式直接接触漂移层。

公开(公告)号：US20070113611A1

公开(公告)日：2007-05-24

申请号：US11650465

申请日：2007-01-08

申请人： Tsuyoshi Ishikawa ,  Yoshiya Tsukada ,  Ryoichi Suzuki ,  Akihiro Ishikawa ,  Motoyoshi Ishikawa ,  Jun Ishikawa

发明人： Tsuyoshi Ishikawa ,  Yoshiya Tsukada ,  Ryoichi Suzuki ,  Akihiro Ishikawa ,  Motoyoshi Ishikawa ,  Jun Ishikawa

IPC分类号： B21B13/08

CPC分类号： B21C1/27 ,  B21B13/10 ,  B21B17/00 ,  B21C1/22 ,  B21C3/08 ,  B21C37/202 ,  B21D15/02 ,  B21H1/20 ,  B21H7/187 ,  F16L9/02

摘要： A cold roll forming method for reducing a diameter of a metal pipe and a metal pipe product having a diameter reduced by such a method are disclosed, wherein the method includes: passing a raw metal pipe through a set of pre-forming rolls so that it can be pre-formed into an intermediate metal pipe having an elliptical, elongated circular or rectangular cross-sectional shape; and then passing the intermediate metal pipe through a set of diameter-reducing rolls disposed on a downstream side of the set of pre-forming rolls so that it can have its outer circumferential length reduced to be smaller than an outer peripheral length of the raw metal pipe, while at the same time being re-formed into a circular cross-sectional shape or any other cross-sectional shape different from the cross-sectional shape of the intermediate metal pipe.

摘要翻译： 公开了一种用于减小金属管的直径的冷轧成形方法和通过这种方法减小直径的金属管制品，其中，该方法包括：使原料金属管通过一组预成型辊，使得 可以预先形成具有椭圆形，细长圆形或矩形横截面形状的中间金属管; 然后使中间金属管通过设置在该组预成形辊的下游侧的一组直径减小辊，使得其外周长度可以缩小成小于原料金属的外周长度 同时被重新形成为与中间金属管的横截面形状不同的圆形横截面形状或任何其它横截面形状。

公开(公告)号：US20060024823A1

公开(公告)日：2006-02-02

申请号：US11190868

申请日：2005-07-28

申请人： Tsuyoshi Ishikawa ,  Ken Sugo

发明人： Tsuyoshi Ishikawa ,  Ken Sugo

IPC分类号： C12M1/00 ,  C12N5/00

CPC分类号： C12N5/0068 ,  C12N2533/18

摘要： Cell culture carriers that allow cells to efficiently adhere thereto and sufficiently grow thereon and from which the grown cells can be easily removed or detached, a method for manufacturing cell culture carriers that enables to easily and reliably manufacture such cell culture carriers and a method for culturing cells using such cell culture carriers are disclosed. The cell culture carrier includes a base material having a granular shape and a coating layer that is provided so as to cover the surface of the base material, the coating layer is mainly made of calcium phosphate-based apatite in which a part of calcium is deficient. Such cell culture carriers are utilized in cell culture in which cells adhere to and grow on the surface of cell culture carriers, particularly in three-dimensional high-density culture (suspension culture). The Ca deficiency rate in the calcium phosphate-based apatite in which a part of calcium is deficient is preferably in the range of 1 to 30 mol %.

摘要翻译： 细胞培养载体，其允许细胞有效地附着于其上并在其上充分生长，并且可以从其中容易地去除或分离生长的细胞;制造能够容易且可靠地制造这种细胞培养载体的细胞培养载体的方法和培养方法 公开了使用这种细胞培养载体的细胞。 细胞培养载体包括具有颗粒形状的基材和设置成覆盖基材表面的涂层，涂层主要由磷酸钙基磷灰石制成，其中钙的一部分不足 。 这种细胞培养载体用于细胞培养，其中细胞粘附并生长在细胞培养载体的表面上，特别是在三维高密度培养（悬浮培养）中。 一部分钙缺乏的磷酸钙磷灰石中的Ca缺乏率优选为1〜30摩尔％。