公开(公告)号：US08946702B2

公开(公告)日：2015-02-03

申请号：US13860792

申请日：2013-04-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Daisuke Matsubayashi ,  Keisuke Murayama

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/7831

Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.

Abstract translation: 晶体管包括通过介于第一栅极电极层和氧化物半导体层叠层之间的绝缘层在第一栅极电极层和第二栅极电极层之间的氧化物半导体堆叠层和介于第二栅极电极层和氧化物之间的绝缘层 半导体堆叠层。 沟道形成区域的厚度小于氧化物半导体堆叠层中的其它区域。 此外，在该晶体管中，栅电极层之一被设置为所谓的用于控制阈值电压的背栅。 控制施加到背栅的电位使得能够控制晶体管的阈值电压，这使得容易维持晶体管的常关特性。

公开(公告)号：US20140284673A1

公开(公告)日：2014-09-25

申请号：US14297668

申请日：2014-06-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daisuke Matsubayashi

IPC: H01L27/105

CPC classification number: H01L27/1052 ,  G11C8/10 ,  G11C11/404 ,  G11C11/405 ,  H01L23/528 ,  H01L27/0629 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/1156 ,  H01L27/1225 ,  H01L29/7869

Abstract: A selection operation is performed for individual memory cells. A device includes a first memory cell and a second memory cell provided in the same row as the first memory cell, each of which includes a field-effect transistor having a first gate and a second gate. The field-effect transistor controls at least data writing and data holding in the memory cell by being turned on or off. The device further includes a row selection line electrically connected to the first gates of the field-effect transistors included in the first memory cell and the second memory cell, a first column selection line electrically connected to the second gate of the field-effect transistor included in the first memory cell, and a second column selection line electrically connected to the second gate of the field-effect transistor included in the second memory cell.

Abstract translation: 对各个存储单元执行选择操作。 一种器件包括与第一存储器单元相同的行中提供的第一存储单元和第二存储单元，每个存储单元包括具有第一栅极和第二栅极的场效应晶体管。 场效应晶体管通过导通或截止来控制存储单元中的至少数据写入和数据保持。 该装置还包括电连接到包括在第一存储单元和第二存储单元中的场效应晶体管的第一栅极的行选择线，电连接到场效应晶体管的第二栅极的第一列选择线 以及与第二存储单元中包含的场效应晶体管的第二栅极电连接的第二列选择线。

公开(公告)号：US20140231799A1

公开(公告)日：2014-08-21

申请号：US14179892

申请日：2014-02-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daisuke Matsubayashi

IPC: H01L29/786 ,  H01L29/24 ,  H01L27/06

CPC classification number: H01L27/105 ,  H01L27/0629 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/16 ,  H01L29/78 ,  H01L29/7869

Abstract: The semiconductor device of the present invention comprises first and second transistors and first and second capacitors. One of source and drain electrodes of the first transistor is electrically connected to a first wiring, the other is electrically connected to a second wiring, and a gate electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor and one of electrodes of the first capacitor. The other of the source and drain electrodes of the second transistor is electrically connected to the first wiring, and a gate electrode of the second transistor is electrically connected to one of electrodes of a second capacitor and a fifth wiring. The other electrode of the first capacitor is electrically connected to a third wiring, and the other electrode of the second capacitor is eclectically connected to a fourth wiring.

Abstract translation: 本发明的半导体器件包括第一和第二晶体管以及第一和第二电容器。 第一晶体管的源极和漏极之一电连接到第一布线，另一个电连接到第二布线，并且第一晶体管的栅电极电连接到源电极和漏电极中的一个 第二晶体管和第一电容器的电极中的一个。 第二晶体管的源极和漏极中的另一个电连接到第一布线，并且第二晶体管的栅电极电连接到第二电容器的电极和第五布线之一。 第一电容器的另一个电极电连接到第三布线，第二电容器的另一个电极折叠地连接到第四布线。

公开(公告)号：US20140225105A1

公开(公告)日：2014-08-14

申请号：US14176472

申请日：2014-02-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro Tanaka ,  Yasumasa Yamane ,  Hideomi Suzawa ,  Daisuke Matsubayashi ,  Shunpei Yamazaki

IPC: H01L29/786

CPC classification number: H01L29/78696 ,  H01L29/7869

Abstract: A transistor or the like having excellent electrical characteristics is provided. A semiconductor device includes a gate electrode; a gate insulating film in contact with the gate electrode; and a multilayer film which is in contact with the gate insulating film and includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer in the order from a side farthest from the gate insulating film. The first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer each contain indium, an element M (aluminum, gallium, yttrium, or tin), and zinc. The first oxide semiconductor layer has a thickness greater than or equal to 20 nm and less than or equal to 200 nm. The third oxide semiconductor layer has a thickness greater than or equal to 0.3 nm and less than 10 nm.

Abstract translation: 提供具有优异电特性的晶体管等。 半导体器件包括栅电极; 与栅电极接触的栅极绝缘膜; 以及与所述栅极绝缘膜接触并且从距离所述栅极绝缘膜最远的一侧依次包括第一氧化物半导体层，第二氧化物半导体层和第三氧化物半导体层的多层膜。 第一氧化物半导体层，第二氧化物半导体层和第三氧化物半导体层各自含有铟，元素M（铝，镓，钇或锡）和锌。 第一氧化物半导体层具有大于或等于20nm且小于或等于200nm的厚度。 第三氧化物半导体层的厚度大于或等于0.3nm且小于10nm。

公开(公告)号：US20140175435A1

公开(公告)日：2014-06-26

申请号：US14137476

申请日：2013-12-20

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Tetsuhiro Tanaka ,  Hirokazu Watanabe ,  Yuhei Sato ,  Yasumasa Yamane ,  Daisuke Matsubayashi

IPC: H01L29/786

CPC classification number: H01L29/78618 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.

Abstract translation: 提供了在氧化物半导体的沟道形成区域中具有减少的氧空位量的半导体器件。 此外，提供了包括氧化物半导体并具有改善的电特性的半导体器件。 此外，提供了制造半导体器件的方法。 形成氧化物半导体膜; 在氧化物半导体膜和导电膜之间形成低电阻区域的同时，在氧化物半导体膜上形成导电膜; 处理导电膜以形成源电极和漏电极; 并且在源电极和漏极之间的低电阻区域添加氧，使得形成具有比低电阻区域更高的电阻的沟道形成区域，并且形成第一低电阻区域和第二低电阻 形成沟道形成区域所在的区域。

公开(公告)号：US20140110707A1

公开(公告)日：2014-04-24

申请号：US14061510

申请日：2013-10-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Yukinori Shima ,  Hajime Tokunaga ,  Toshinari Sasaki ,  Keisuke Murayama ,  Daisuke Matsubayashi

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L29/51

CPC classification number: H01L29/78696 ,  H01L21/022 ,  H01L21/02263 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/0262 ,  H01L29/24 ,  H01L29/513 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693

Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

Abstract translation: 在包括晶体管的半导体器件中，所述晶体管包括形成在衬底上的栅电极，覆盖栅电极的栅极绝缘膜，与栅电极重叠的多层膜，栅极绝缘膜设置在其间;以及一对电极， 多层膜，覆盖晶体管的第一氧化物绝缘膜和形成在第一氧化物绝缘膜上的第二氧化物绝缘膜，所述多层膜包括氧化物半导体膜和含有In或Ga的氧化物膜，所述氧化物半导体膜具有无定形 结构或微晶结构，所述第一氧化物绝缘膜是透过氧的氧化物绝缘膜，所述第二氧化物绝缘膜是比所述化学计量组成中含有氧更多的氧化物绝缘膜。

公开(公告)号：US20140110705A1

公开(公告)日：2014-04-24

申请号：US14060925

申请日：2013-10-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Yukinori Shima ,  Hajime Tokunaga ,  Toshinari Sasaki ,  Keisuke Murayama ,  Daisuke Matsubayashi

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L29/51

CPC classification number: H01L29/66969 ,  H01L21/022 ,  H01L21/02263 ,  H01L27/1225 ,  H01L29/513 ,  H01L29/78609 ,  H01L29/7869

Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve the electrical characteristics and the reliability of a semiconductor device including an oxide semiconductor film. In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

Abstract translation: 为了减少半导体器件中的氧化物半导体膜的缺陷。 为了改善包括氧化物半导体膜的半导体器件的电特性和可靠性。 在包括晶体管的半导体器件中，所述晶体管包括形成在衬底上的栅电极，覆盖栅电极的栅极绝缘膜，与栅电极重叠的多层膜，栅极绝缘膜设置在其间;以及一对电极， 多层膜，覆盖晶体管的第一氧化物绝缘膜和形成在第一氧化物绝缘膜上的第二氧化物绝缘膜，多层膜包括氧化物半导体膜和含有In或Ga的氧化物膜，第一氧化物绝缘膜为 氧透过氧化物绝缘膜，第二氧化物绝缘膜是比化学计量组合物含有氧更多的氧化物绝缘膜。

公开(公告)号：US12300484B2

公开(公告)日：2025-05-13

申请号：US17436752

申请日：2020-03-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuichi Yanagisawa ,  Hiromi Sawai ,  Daisuke Matsubayashi

IPC: H10B43/27 ,  H01L21/02 ,  H01L21/3213

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first oxide, an insulator over the first oxide, a first conductor over the insulator, a second conductor electrically connected to the first oxide, and a second oxide provided between the first oxide and the second conductor, and the contact area between the second oxide and the second conductor is larger than the contact area between the second oxide and the first oxide.

公开(公告)号：US12068417B2

公开(公告)日：2024-08-20

申请号：US18368630

申请日：2023-09-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daisuke Matsubayashi ,  Yuichi Yanagisawa ,  Masahiro Takahashi

IPC: H01L29/786 ,  H01L29/10

CPC classification number: H01L29/7869 ,  H01L29/1095 ,  H01L29/78696

Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device in which first to third conductors are placed over a first oxide; first and second oxide insulators are placed respectively over the second and third conductors; a second oxide is placed in contact with a side surface of the first oxide insulator, a side surface of the second oxide insulator, and a top surface of the first oxide; a first insulator is placed between the first conductor and the second oxide; and the first oxide insulator and the second oxide insulator are not in contact with the first to third conductors, the first insulator, and the first oxide.

公开(公告)号：US11581439B2

公开(公告)日：2023-02-14

申请号：US16693482

申请日：2019-11-25

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Yoshiyuki Kobayashi ,  Daisuke Matsubayashi ,  Akihisa Shimomura ,  Daigo Ito

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/66

Abstract: To provide a semiconductor device in which a large current can flow. To provide a semiconductor device which can be driven stably at a high driving voltage. The semiconductor device includes a semiconductor layer, a first electrode and a second electrode electrically connected to the semiconductor layer and apart from each other in a region overlapping with the semiconductor layer, a first gate electrode and a second gate electrode with the semiconductor layer therebetween, a first gate insulating layer between the semiconductor layer and the first gate electrode, and a second gate insulating layer between the semiconductor layer and the second gate electrode. The first gate electrode overlaps with part of the first electrode, the semiconductor layer, and part of the second electrode. The second gate electrode overlaps with the semiconductor layer and part of the first electrode, and does not overlap with the second electrode.