公开(公告)号：US20070229447A1

公开(公告)日：2007-10-04

申请号：US11689222

申请日：2007-03-21

Applicant: Hiroshi Takahara ,  Kenji Nakao ,  Kazuhiro Nishiyama ,  Yukio Tanaka ,  Shigesumi Araki ,  Mitsutaka Okita ,  Tetsuo Fukami

Inventor： Hiroshi Takahara ,  Kenji Nakao ,  Kazuhiro Nishiyama ,  Yukio Tanaka ,  Shigesumi Araki ,  Mitsutaka Okita ,  Tetsuo Fukami

IPC: G09G3/36

CPC classification number: G09G3/3655 ,  G09G3/3406 ,  G09G3/3614 ,  G09G3/3696 ,  G09G2310/061 ,  G09G2320/0247 ,  G09G2320/0261 ,  G09G2320/041 ,  G09G2340/0435

Abstract: Common signals VCOM during a black voltage writing period are set to be larger than common signals VCOM during a video writing period. The common voltage signals VCOM is VmH or VmL during the black voltage writing periods. The common voltage signals VCOM is VcH or VcL during video writing periods and video holding periods. The polarity of the common voltage signals VCOM is inverted alternately from frame to frame. A backlight is extinguished in the black voltage writing period.

Abstract translation: 黑电压写入期间的公共信号VCOM在视频写入期间被设定为大于公共信号VCOM。 在黑电压写入期间，公共电压信号VCOM为VmH或VmL。 在视频写入期间和视频保持期间，公共电压信号VCOM为VcH或VcL。 公共电压信号VCOM的极性从帧到帧交替地反转。 在黑电压写入期间背光熄灭。

公开(公告)号：US20070103425A1

公开(公告)日：2007-05-10

申请号：US11526733

申请日：2006-09-26

Applicant: Yukio Tanaka ,  Kenji Nakao ,  Tetsuo Fukami ,  Kazuhiro Nishiyama

Inventor： Yukio Tanaka ,  Kenji Nakao ,  Tetsuo Fukami ,  Kazuhiro Nishiyama

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3406 ,  G09G3/3607 ,  G09G3/3614 ,  G09G2310/0218 ,  G09G2310/0237 ,  G09G2310/0283 ,  G09G2310/063 ,  G09G2320/0247 ,  G09G2330/021

Abstract: A liquid crystal display device which includes a plurality of OCB liquid crystal pixels arrayed substantially in a matrix, and a driver circuit which cyclically writes a non-video signal and a video signal as a pixel voltage in each of the liquid crystal pixels. The liquid crystal display device further includes a control circuit which sets a first period and a second period different in length from the first period such that a total time length of the first period and the second period does not exceed one frame period, and controls the driver circuit to execute write of the non-video signal for the liquid crystal pixels in the first period and to execute write of the video signal for the liquid crystal pixels PX in the second period.

Abstract translation: 一种液晶显示装置，其包括基本上排列成矩阵的多个OCB液晶像素，以及在每个液晶像素中循环写入非视频信号和视频信号作为像素电压的驱动电路。 液晶显示装置还包括控制电路，其设定与第一期间不同长度的第一期间和第二期间，使得第一期间和第二期间的总时间长度不超过一个帧周期，并且控制 驱动电路，以在第一时段内执行用于液晶像素的非视频信号的写入，并且在第二周期中执行用于液晶像素PX的视频信号的写入。

公开(公告)号：US07184017B2

公开(公告)日：2007-02-27

申请号：US11128333

申请日：2005-05-13

Applicant: Jun Koyama ,  Mitsuaki Osame ,  Yukio Tanaka ,  Munehiro Azami ,  Naoko Yano ,  Shou Nagao

Inventor： Jun Koyama ,  Mitsuaki Osame ,  Yukio Tanaka ,  Munehiro Azami ,  Naoko Yano ,  Shou Nagao

IPC: G09G3/36

CPC classification number: H01L27/1214 ,  G09G3/20 ,  G09G3/2011 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2310/0218 ,  G09G2310/027 ,  G09G2310/0297 ,  H01L21/84 ,  H01L29/04 ,  H03K17/6872 ,  H03K17/693 ,  H03M1/682 ,  H03M1/765

Abstract: A D/A conversion circuit with a small area is provided. In the D/A conversion circuit, according to a digital signal transmitted from address lines of an address decoder, one of four gradation voltage lines is selected. A circuit including two N-channel TFTs is connected in series to a circuit including two P-channel TFT, and a circuit including the circuits connected in series to each other is connected in parallel to each of the gradation voltage lines. Further, an arrangement of the circuit including the two N-channel TFTs and the circuit including the two P-channel TFTs is reversed for every gradation voltage line. By this, the crossings of wiring lines in the D/A conversion circuit becomes small and the area can be made small.

Abstract translation: 提供具有小面积的D / A转换电路。 在D / A转换电路中，根据从地址解码器的地址线发送的数字信号，选择四个灰度电压线中的一个。 包括两个N沟道TFT的电路串联连接到包括两个P沟道TFT的电路，并且包括彼此串联连接的电路的电路并联连接到每个灰度电压线。 此外，包括两个N沟道TFT的电路和包括两个P沟道TFT的电路的布置对于每个灰度电压线都是反向的。 由此，D / A转换电路中的布线的交叉变小，可以使面积变小。

公开(公告)号：US20060169124A1

公开(公告)日：2006-08-03

申请号：US11048713

申请日：2005-02-03

Applicant: Yukio Tanaka

Inventor： Yukio Tanaka

IPC: G10D13/02

CPC classification number: G10D13/065

Abstract: A hi-hat stand includes an operating rod having first and second rod parts, and a connector assembly coupling the first and second rod parts. The first rod part has a first end portion facing the second rod part and a second end portion connected to a movable cymbal, while the second rod part has a first end portion facing the first rod part and a second end portion operatively connected to a foot pedal of the hi-hat stand. The connector assembly comprises a first connector member for securing to the first end portion of the first rod part, and a second connector member for securing to the first end portion of the second rod part. The first connector member is coupled to the second connector member so as to allow relative rotation therebetween for reducing the stress on an operating member of the hi-hat stand.

Abstract translation: hi hat架包括具有第一和第二杆部分的操作杆和联接第一和第二杆部分的连接器组件。 第一杆部分具有面向第二杆部的第一端部和连接到可动钹的第二端部，而第二杆部分具有面向第一杆部分的第一端部部分和可操作地连接到脚部的第二端部部分 踩hat hat。 连接器组件包括用于固定到第一杆部分的第一端部的第一连接器部件和用于固定到第二杆部分的第一端部的第二连接器部件。 第一连接器构件联接到第二连接器构件，以便允许它们之间的相对旋转，以减小踩踏架的操作构件上的应力。

公开(公告)号：US06967633B1

公开(公告)日：2005-11-22

申请号：US09684568

申请日：2000-10-06

Applicant: Yukio Tanaka

Inventor： Yukio Tanaka

IPC: G09G3/20 ,  G09G3/36 ,  G09G5/00 ,  G03F1/1343

CPC classification number: G09G3/2092 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2310/0218

Abstract: To provide a liquid crystal panel employing a circuit layout that makes it possible to obtain a small size liquid crystal panel when the area a source driver occupies is large. A liquid crystal display device of the present invention comprises: a pixel portion including m×n pixels (m and n are both natural numbers and satisfy the relation m

Abstract translation: 提供一种采用电路布局的液晶面板，当电源驱动器占据的面积大时，可以获得小尺寸液晶面板。 本发明的液晶显示装置包括：包括m×n个像素（m和n都是自然数并满足关系m

公开(公告)号：US06967129B2

公开(公告)日：2005-11-22

申请号：US10456633

申请日：2003-06-09

Applicant: Shunpei Yamazaki ,  Satoshi Murakami ,  Jun Koyama ,  Yukio Tanaka ,  Hidehito Kitakado ,  Hideto Ohnuma

Inventor： Shunpei Yamazaki ,  Satoshi Murakami ,  Jun Koyama ,  Yukio Tanaka ,  Hidehito Kitakado ,  Hideto Ohnuma

IPC: G09F9/30 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/32 ,  H01L29/786 ,  H01L51/50 ,  H01L21/00

CPC classification number: G02F1/1368 ,  G02F1/133345 ,  G02F1/13454 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2201/123 ,  G02F2202/104 ,  H01L27/12 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/3248 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3272 ,  H01L27/3276 ,  H01L29/458 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78675 ,  H01L2029/7863 ,  H01L2227/323

Abstract: This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720.

Abstract translation: 本发明提供一种具有高操作性能和高可靠性的半导体器件。 在形成驱动电路的n沟道TFT 802中配置与栅极配线重叠的LDD区域707，能够实现高耐热载流子注入的TFT结构。 不与栅极布线重叠的LDD区域717,718,719和720被布置在形成像素单元的n沟道TFT 804中。 结果，实现了具有小的截止电流值的TFT结构。 在这种情况下，属于周期表第15族的元素在LDD区707中比在LDD区717,718,719和720中的浓度更高。

公开(公告)号：US06911926B2

公开(公告)日：2005-06-28

申请号：US10810573

申请日：2004-03-29

Applicant: Jun Koyama ,  Mitsuaki Osame ,  Yukio Tanaka ,  Munehiro Azami ,  Naoko Yano ,  Shou Nagao

Inventor： Jun Koyama ,  Mitsuaki Osame ,  Yukio Tanaka ,  Munehiro Azami ,  Naoko Yano ,  Shou Nagao

IPC: G09G3/36 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04 ,  H03K17/687 ,  H03K17/693 ,  H03M1/66 ,  H03M1/68 ,  H03M1/76 ,  H03M1/00

CPC classification number: H01L27/1214 ,  G09G3/20 ,  G09G3/2011 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2310/0218 ,  G09G2310/027 ,  G09G2310/0297 ,  H01L21/84 ,  H01L29/04 ,  H03K17/6872 ,  H03K17/693 ,  H03M1/682 ,  H03M1/765

Abstract: A D/A conversion circuit with a small area is provided. In the D/A conversion circuit, according to a digital signal transmitted from address lines of an address decoder, one of four gradation voltage lines is selected. A circuit including two N-channel TFTs is connected in series to a circuit including two P-channel TFT, and a circuit including the circuits connected in series to each other is connected in parallel to each of the gradation voltage lines. Further, an arrangement of the circuit including the two N-channel TFTs and the circuit including the two P-channel TFTs is reversed for every gradation voltage line. By this, the crossings of wiring lines in the D/A conversion circuit becomes small and the area can be made small.

Abstract translation: 提供具有小面积的D / A转换电路。 在D / A转换电路中，根据从地址解码器的地址线发送的数字信号，选择四个灰度电压线中的一个。 包括两个N沟道TFT的电路串联连接到包括两个P沟道TFT的电路，并且包括彼此串联连接的电路的电路并联连接到每个灰度电压线。 此外，包括两个N沟道TFT的电路和包括两个P沟道TFT的电路的布置对于每个灰度电压线都是反向的。 由此，D / A转换电路中的布线的交叉变小，可以使面积变小。

公开(公告)号：US06856307B2

公开(公告)日：2005-02-15

申请号：US09772725

申请日：2001-01-30

Applicant: Mitsuaki Osame ,  Yukio Tanaka

Inventor： Mitsuaki Osame ,  Yukio Tanaka

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3655 ,  G09G2320/0214

Abstract: In executing the opposing common inverse drive in an active matrix-type semiconductor display device, a gate bias is suppressed to be comparable with that of the conventional inverse drive to avoid a range in which the off current jumps up and, hence, to suppress the leakage of the stored electric charge, thereby to maintain an ON/OFF margin of the pixel TFTs. The gate bias applied to the pixel TFT is maintained to be near the customarily employed voltage to maintain a gate breakdown voltage, and the electric power is consumed in a decreased amount by the drive circuit as a whole, thereby to provide a novel drive circuit. In the semiconductor display device, a tristate buffer is used for a gate signal line drive circuit, and different buffer potentials are applied depending upon a frame in which the opposing common potential assumes a positive sign and a frame in which the opposing common potential assumes a negative sign, thereby to maintain an ON/OFF margin of the pixel TFTs. The voltage amplitude is decreased during the opposing common inverse drive.

Abstract translation: 在有源矩阵型半导体显示装置中执行相对的公共反向驱动时，抑制栅极偏压与传统的反向驱动相当，以避免关断电流跳跃的范围，从而抑制 存储电荷的泄漏，从而保持像素TFT的ON / OFF边缘。 施加到像素TFT的栅极偏置保持接近通常采用的电压以保持栅极击穿电压，并且通过驱动电路作为整体以降低的量消耗电力，从而提供新颖的驱动电路。 在半导体显示装置中，三态缓冲器用于栅极信号线驱动电路，并且根据相对的公共电位呈现正号的帧和相对的共同电位呈现为的帧，施加不同的缓冲电位 从而保持像素TFT的ON / OFF边缘。 在相反的公共反向驱动期间，电压幅度减小。

公开(公告)号：US20050001753A1

公开(公告)日：2005-01-06

申请号：US10900921

申请日：2004-07-28

Applicant: Yukio Tanaka

Inventor： Yukio Tanaka

IPC: G02F1/133 ,  G09G3/20 ,  G09G3/36 ,  H01L29/786 ,  H03M1/66 ,  H03M1/68 ,  H03M1/76

CPC classification number: H03M1/66 ,  G09G3/2011 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0289 ,  H03M1/662 ,  H03M1/682 ,  H03M1/765

Abstract: A D/A conversion circuit in accordance with the present invention, which is provided with a switch swD, allows a writing operation of a voltage (a true gradation voltage) to be performed at a higher speed by first applying a first voltage (a voltage close to the true gradation voltage), which is supplied without passing through a resistor element, to an output line and then applying a second voltage (the true gradation voltage), which is supplied via the resistor element, to the output line. Thus, the present invention can provide a D/A conversion circuit capable of writing display data to liquid crystal cells with higher precision at higher speed, and a semiconductor device utilizing such a D/A conversion circuit.

Abstract translation: 根据本发明的具有开关swD的AD / A转换电路允许通过首先施加第一电压（电压近似）来以更高速度执行电压（真正灰度电压）的写入操作 到没有通过电阻器元件而提供的真实灰度电压）输出到输出线，然后将经由电阻器元件提供的第二电压（真实灰度电压）施加到输出线。 因此，本发明可以提供一种能够以更高的速度以更高的精度将显示数据写入液晶单元的D / A转换电路，以及利用这种D / A转换电路的半导体器件。

公开(公告)号：US06801293B1

公开(公告)日：2004-10-05

申请号：US10089888

申请日：2002-04-05

Applicant: Kazuhiro Nishiyama ,  Junko Asayama ,  Kazunori Komori ,  Yukio Tanaka ,  Akio Takimoto ,  Kazuo Inoue ,  Katsuhiko Kumagawa ,  Ichiro Sato ,  Hirofumi Wakemoto ,  Noriyuki Kizu ,  Masanori Kimura ,  Keisuke Tsuda

Inventor： Kazuhiro Nishiyama ,  Junko Asayama ,  Kazunori Komori ,  Yukio Tanaka ,  Akio Takimoto ,  Kazuo Inoue ,  Katsuhiko Kumagawa ,  Ichiro Sato ,  Hirofumi Wakemoto ,  Noriyuki Kizu ,  Masanori Kimura ,  Keisuke Tsuda

IPC: G02F113

CPC classification number: G02F1/133512 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/1341 ,  G02F1/134363

Abstract: The curing, by UV-light irradiation, of a sealing resin after injecting liquid crystal is made reliable. The display characteristics and the like of an in-plane electric field mode liquid crystal element are improved. To resolve these problems, the viscosity of the sealing resin is lowered, while bubbles mixed in the sealing resin are eliminated by ultrasonic waves, for example. Also, a means for eliminating ions and charges in the liquid crystal layer is devised.

Abstract translation: 通过UV光照射固化注射液晶后的密封树脂是可靠的。提高了面内电场模式液晶元件的显示特性等。为了解决这些问题， 密封树脂被降低，而例如通过超声波消除混入密封树脂中的气泡。另外，设计了用于消除液晶层中的离子和电荷的装置。