公开(公告)号：US5306521A

公开(公告)日：1994-04-26

申请号：US840343

申请日：1992-02-24

申请人： Nobuhiro Shimizu ,  Kazuo Chinone ,  Norio Chiba

发明人： Nobuhiro Shimizu ,  Kazuo Chinone ,  Norio Chiba

IPC分类号： G01R33/035 ,  H01L39/22 ,  H01L39/24

CPC分类号： H01L39/2493 ,  Y10S505/817 ,  Y10S505/832 ,  Y10S505/846

摘要： A method of manufacturing a DC superconducting quantum interference device comprises forming an insulating film over a portion of a resistance film. A lower electrode superconducting film is formed over the resistance film and the insulating film. A barrier layer is formed on a portion of the lower electrode superconducting film. An upper electrode is formed sandwiching the barrier layer between the lower electrode superconducting film and the upper electrode, so as to form a Josephson junction. To reduce the number of manufacturing steps, the lower electrode superconducting film is photolithographically patterned and/or etched to simultaneously form an input coil, a feedback coil and the Josephson junction. In another embodiment, after forming the upper electrode, an insulating film is formed over at least a portion of the lower electrode superconducting film. A superconducting film is formed over the insulating film in contact with the upper electrode. To reduce the number of manufacturing steps, the superconducting film is photolithographically patterned and/or etched to simultaneously form a counter electrode, the input coil and the feedback coil.

摘要翻译： 制造DC超导量子干涉器件的方法包括在电阻膜的一部分上形成绝缘膜。 在电阻膜和绝缘膜上形成下电极超导膜。 在下电极超导膜的一部分上形成阻挡层。 形成在下电极超导膜和上电极之间夹持阻挡层的上电极，以形成约瑟夫逊结。 为了减少制造步骤的数量，下电极超导膜被光刻图案化和/或蚀刻以同时形成输入线圈，反馈线圈和约瑟夫逊结。 在另一实施例中，在形成上电极之后，在下电极超导膜的至少一部分上形成绝缘膜。 在与上电极接触的绝缘膜上形成超导膜。 为了减少制造步骤的数量，超导薄膜被光刻图案化和/或蚀刻以同时形成对电极，输入线圈和反馈线圈。

公开(公告)号：US4837604A

公开(公告)日：1989-06-06

申请号：US853738

申请日：1986-04-18

申请人： Sadeg M. Faris

发明人： Sadeg M. Faris

IPC分类号： H01L39/22 ,  H01L39/24 ,  H03K17/92 ,  H03K19/195

CPC分类号： H03K19/1956 ,  H01L39/228 ,  H01L39/2493 ,  H03K17/92

摘要： A circuit element for a superconducting integrated circuit is disclosed which comprises a plurality of Josephson junctions stacked vertically atop one another. Such a circuit element is capable of replacing single junctions and lateral arrays of junctions in many analog and digital applications. When operated digitally, the close proximity of the junctions to one another creates a "tight coupling" effect which permits the entire stack to switch as a single junction. Input (control) currents and output (bias) currents can be injected or taken out at any level or levels in the stack, thereby permitting excellent isolation, voltage gain, and the use of a single stack as a combination logic element. The use of tight coupling is extendable to lateral arrays as well. A method by which a circuit including vertical tunnel junctions may be fabricated is also disclosed.

公开(公告)号：US4586062A

公开(公告)日：1986-04-29

申请号：US468673

申请日：1983-02-22

申请人： Serge J. H. Bouffard ,  Libero Zuppiroli ,  Denis Jerome ,  Klaus Bechgaard

发明人： Serge J. H. Bouffard ,  Libero Zuppiroli ,  Denis Jerome ,  Klaus Bechgaard

IPC分类号： H01L39/22 ,  H01L39/12 ,  H01L39/24 ,  H01L29/161 ,  H01L29/28 ,  H01L39/02

CPC分类号： H01L39/249 ,  H01L39/121 ,  H01L39/2493 ,  Y10S505/802 ,  Y10S505/873 ,  Y10S505/874

摘要： Microcircuits composed of a plurality of alternating conducting and insulating regions are formed in a substrate of an organic quasi-unidimensional conductor such as .DELTA..sup.2,2 bi-4,5-dimethyl-1,3-diselenolylidene upon irradiation of the substrate with a precise beam of electrons having an energy of at least 1 keV, preferably at least 8 keV, which forms the insulating regions. When exposed to cryogenic temperatures the non-irradated conducting regions become super conducting. Using electron beam irradiations, sub-micronic resolution as low as 100 .ANG. can be achieved. Microcircuits having Josephson junctions and superconducting quantum interference devices are described.

摘要翻译： 由多个交替的导电绝缘区域构成的微电路形成在有机准一维导体的基板中，例如DELTA 2,2双-4,5-二甲基-1,3-亚硒基亚基，在基板上照射精确 电子束具有形成绝缘区域的至少1keV，优选至少8keV的能量。 当暴露于低温时，非辐射导电区域变得超导。 使用电子束照射，可以实现低至100安培的亚微米分辨率。 描述了具有约瑟夫逊结和超导量子干涉装置的微电路。

公开(公告)号：US4514254A

公开(公告)日：1985-04-30

申请号：US536141

申请日：1983-09-26

申请人： Stephen P. Klepner

发明人： Stephen P. Klepner

IPC分类号： H01L21/316 ,  H01L39/24 ,  C23F1/02 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06

CPC分类号： H01L21/31687 ,  H01L39/2493 ,  Y10S505/82 ,  Y10T428/12618

摘要： Pinholes opened though insulating layers in Josephson integrated circuits are sealed by this post-etch anodization process. Josephson junction integrated circuits, in part, contain patterned metal films on an insulated groundplane. The patterns of conductors are created by adding a complete metal film over the insulating layers and subtractively etching to leave the desired conductor pattern. Pinholes in the underlying etch-stop insulating layer, in areas not covered by the remaining metal pattern, can be created during the subtractive etching process. Such pinholes may occur at sites made susceptible by contaminants, including flakes of process materials, which are present despite efforts to eliminate contaminants. Such pinholes provide unwanted conductive paths between the groundplane and subsequent metallization. Failures resulting from the effects of such unwanted conductive paths occur in a fashion not easily subject to identification, much less prevention. Process yields and circuit reliability are reduced. Once the integrated circuit is completed, repair is virtually impossible. This process creates seals in pinholes opened during the subtractive etching step for M2 metallization patterning, by growing niobium pentoxide specific to exposed groundplane niobium metal specific to the pinholes. The circuit wafer, after early process steps have resulted in a groundplane, insulating/spacing etch-stop layer and etched metallization pattern M2 (with possible pinholes in areas where M2 was etched away), is anodized in a medium of ammonium pentaborate dissolved in ethylene glycol for ten minutes, removed from the anodization medium, rinsed in deionized water, spun-dry and returned to the process as a pinhole-sealed intermediate process wafer at the M2 stage.

摘要翻译： 通过这种后蚀刻阳极氧化工艺密封约瑟夫逊集成电路中的绝缘层开放的针孔。 约瑟夫逊结集成电路部分地在绝缘接地面上包含图案化的金属膜。 通过在绝缘层上添加完整的金属膜并减去蚀刻以留下所需的导体图案来产生导体图案。 在凹陷蚀刻工艺期间，可以在未被其余金属图案覆盖的区域内的底层蚀刻停止绝缘层中形成针孔。 这样的针孔可能发生在易受污染物影响的位置，包括工艺材料的薄片，尽管努力消除污染物，但仍然存在。 这种针孔在接地平面和随后的金属化之间提供不需要的导电路径。 由于这种不希望的导电路径的影响导致的故障以不容易识别的方式发生，预防程度更少。 工艺产量和电路可靠性降低。 一旦集成电路完成，修理几乎是不可能的。 该过程通过生长特定于针孔的特定于暴露的接地面铌金属的五氧化二铌，在用于M2金属化图案化的减去蚀刻步骤期间打开的针孔中产生密封。 在早期工艺步骤之后，电路晶片在溶解在乙烯中的五硼酸铵的介质中阳极氧化接地面，绝缘/间隔蚀刻停止层和蚀刻金属化图案M2（在M2被蚀刻掉的区域中具有可能的针孔） 乙二醇10分钟，从阳极氧化介质中除去，在去离子水中漂洗，旋转干燥，并在M2阶段返回到作为针孔密封的中间工艺晶片的工艺。

公开(公告)号：US4454522A

公开(公告)日：1984-06-12

申请号：US318451

申请日：1981-11-05

申请人： Alejandro L. de Lozanne

发明人： Alejandro L. de Lozanne

IPC分类号： H01L39/24 ,  H01L27/12 ,  H01L29/06 ,  H01L39/22

CPC分类号： H01L39/2493 ,  Y10S505/874

摘要： An SNS microbridge superconductive device includes a substrate having first and second generally parallel surfaces which are separated by a generally perpendicular step. A first layer of superconductive material is formed on the first surface, and a second layer of superconductive material is formed on the second surface. A normal or non-superconductive material is formed over the two layers of superconductive material and the step. In fabricating the device, the step functions as a shadow mask during deposition of the superconductive material. The dimensions of the step can be accurately controlled, and the process utilizes conventional technology which is readily and uniformly reproducible.

摘要翻译： SNS微桥超导装置包括具有第一和第二大体上平行的表面的基板，所述第一和第二大致平行的表面通过大致垂直的步骤分开。 在第一表面上形成第一层超导材料，在第二表面上形成第二层超导材料。 在两层超导材料和该步骤上形成正常或非超导材料。 在制造该器件时，该步骤在沉积超导材料期间用作荫罩。 步骤的尺寸可以被精确地控制，并且该方法利用易于且均匀可再生的常规技术。

公开(公告)号：US4437227A

公开(公告)日：1984-03-20

申请号：US437386

申请日：1982-10-28

申请人： William E. Flannery ,  Richard M. Josephs ,  Barry F. Stein ,  Tsing-Chow Wang ,  Peter L. Young

发明人： William E. Flannery ,  Richard M. Josephs ,  Barry F. Stein ,  Tsing-Chow Wang ,  Peter L. Young

IPC分类号： H01L39/22 ,  H01L39/24

CPC分类号： H01L39/2493 ,  H01L39/223 ,  Y10S438/951 ,  Y10S505/922

摘要： During the manufacture of Josephson superconducting devices, it is necessary to provide on a substrate a base electrode, a counter electrode and a small tunnel barrier area therebetween. A novel method of making all three of these active elements in the same vacuum chamber without having to remove the substrate from the vacuum chamber is provided so that the tunnel barrier area is accurately made to a predetermined size and without the danger of contamination. The novel structure is made as a substantially planarized laminate in the vacuum chamber and the tunnel barrier area is defined in a supplemental step.

摘要翻译： 在制造约瑟夫森超导装置期间，需要在基板上设置基极，对电极和它们之间的小隧道阻挡区域。 提供了使这些有源元件全部三个在同一真空室中而不必从真空室中移出基板的新颖方法，使得隧道屏障区域精确地制成预定尺寸并且没有污染的危险。 该新型结构在真空室中形成为基本平坦化的层压体，并且在补充步骤中限定隧道屏障区域。

公开(公告)号：US4414738A

公开(公告)日：1983-11-15

申请号：US230246

申请日：1981-02-02

申请人： Edward C. Jelks ,  George L. Kerber ,  Howard A. Wilcox

发明人： Edward C. Jelks ,  George L. Kerber ,  Howard A. Wilcox

IPC分类号： H01L21/027 ,  H01L39/24 ,  H01L39/22

CPC分类号： H01L21/0272 ,  H01L39/2493 ,  Y10S438/944 ,  Y10S505/922

摘要： Planar superconducting-normal-superconducting (SNS) Josephson microbridgesnd superconducting quantum interference devices (SQUIDs) with bridge widths of about 0.2 microns and lengths of about 0.1 micron or less are fabricated with the aid of a technique referred to as "shadow evaporation". The procedure permits the submicron dimensions to be set by edge film thickness and slant evaporation angle, both of which can be accurately measured. Microbridges have been constructed with vanadium banks or electrodes and gold-titanium bridges, although other materials can be used including superconducting metals for the bridge. It is expected that a refined version of this technique would be suitable for repeated batch fabrication of single and multiple Josephson microbridges.

摘要翻译： 借助于称为“阴影蒸发”的技术，制造具有约0.2微米的桥宽度和约0.1微米或更小的长度的平面超导正常超导（SNS）约瑟夫逊微桥和超导量子干涉装置（SQUID）。 该过程允许通过边缘膜厚度和倾斜蒸发角设置亚微米尺寸，这两者都可以被精确测量。 虽然可以使用其他材料，包括用于桥梁的超导金属，但是已经用钒堤或电极和金 - 钛桥构建了微桥。 预计这种技术的精简版本将适用于单个和多个约瑟夫逊微桥的重复批量制造。

公开(公告)号：US4405658A

公开(公告)日：1983-09-20

申请号：US362577

申请日：1982-03-26

申请人： Peter L. Young

发明人： Peter L. Young

IPC分类号： C23C14/04 ,  H01L21/033 ,  H01L21/28 ,  H01L21/285 ,  H01L21/302 ,  H01L21/3065 ,  H01L39/24 ,  H05K3/14 ,  B05D5/12

CPC分类号： H01L21/033 ,  H01L39/2493 ,  H05K3/143

摘要： During the process of vacuum deposition, metals and materials are evaporated at a point source so as to create a vapor which is dispersed isotropically. Layers of the evaporating material are deposited as built-up layers which have sharp vertical edges or steps at the areas defined by the photoresist stencil. When the line of sight of the depositing material is from an oblique angle, the layer being deposited can have a negative slope which appears as an undercut edge. The present invention employs a lift-off overhang photoresist stencil in conjunction with a relatively high pressure of inert gas in the vacuum chamber so as to promote collision of the evaporated atoms and molecules with the inert gas. The colliding atoms and molecules of the evaporating material no longer appear to be originating from a point source but appear to originate from an extended area in the end of the vacuum chamber and deposit under the overhang photoresist stencil so as to provide symmetrical positive slope step changes at the edges of the material being deposited.

摘要翻译： 在真空沉积过程中，金属和材料在点源蒸发，以产生各向同性地分散的蒸气。 蒸发材料的层被沉积成在由光刻胶模板限定的区域上具有尖锐的垂直边缘或台阶的堆积层。 当沉积材料的视线是倾斜的角度时，沉积的层可以具有作为底切边缘出现的负斜率。 本发明在真空室中结合较高压力的惰性气体采用剥离悬垂光刻胶模版，以促进蒸发的原子和分子与惰性气体的碰撞。 蒸发材料的碰撞原子和分子不再似乎源于点源，而是起源于真空室末端的延伸区域，并沉积在悬垂光刻胶模板下方，以提供对称的正斜率阶跃变化 在正在沉积的材料的边缘。

公开(公告)号：US4351712A

公开(公告)日：1982-09-28

申请号：US214929

申请日：1980-12-10

申请人： Jerome J. Cuomo ,  James M. E. Harper

发明人： Jerome J. Cuomo ,  James M. E. Harper

IPC分类号： C23F4/00 ,  C23C14/48 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/316 ,  H01L39/24 ,  H01L49/00 ,  C23C15/00 ,  H01L39/22

CPC分类号： H01L21/31683 ,  H01L39/2493 ,  H01L45/00 ,  Y10S505/817 ,  Y10T29/49014

摘要： A surface reaction process for controlled oxide growth is disclosed using a directed, low energy ion beam for compound or oxide formation. The technique is evaluated by fabricating Ni-oxide-Ni and Cr-oxide-Ni tunneling junctions, using directed oxygen ion beams with energies ranging from about 30 to 180 eV. In one embodiment, high ion current densities are achieved at these low energies by replacing the conventional dual grid extraction system of the ion source with a single fine mesh grid. Junction resistance decreases with increasing ion energy, and oxidation time dependence shows a characteristic saturation, both consistent with a process of simultaneous oxidation and sputter etching, as in the conventional r.f. oxidation process. In contrast with r.f. oxidized junctions, however, ion beam oxidized junctions contain less contamination by backsputtering, and the quantitative nature of ion beam techniques allows greater control over the growth process.

摘要翻译： 公开了一种用于受控氧化物生长的表面反应方法，该方法使用用于化合物或氧化物形成的定向低能量离子束。 通过使用约30至180eV的能量的定向氧离子束，通过制备Ni氧化物-Ni和Cr-氧化物-NN隧穿结来评估该技术。 在一个实施例中，通过用单个细网格网代替离子源的常规双栅格提取系统，在这些低能量下实现高离子电流密度。 结电阻随着离子能量的增加而降低，而氧化时间依赖性显示出特征饱和度，这与常规的r.f.中同时氧化和溅射蚀刻的过程一致。 氧化过程。 与r.f.相反。 氧化结，然而，离子束氧化连接通过反溅射含有较少的污染，并且离子束技术的定量性质允许更好地控制生长过程。

公开(公告)号：US4256816A

公开(公告)日：1981-03-17

申请号：US119415

申请日：1980-02-07

申请人： La Rue N. Dunkleberger

发明人： La Rue N. Dunkleberger

IPC分类号： G03F7/09 ,  G03F7/26 ,  H01L21/027 ,  H01L39/24 ,  H05K3/14 ,  G03C5/00

CPC分类号： H01L39/2493 ,  G03C11/00 ,  G03C5/00 ,  G03F7/094 ,  G03F7/26 ,  H01L21/0272 ,  H05K3/143

摘要： A lift-off mask for the patterned deposition of thin films comprises a three layer sandwich of photoresist-aluminum-photoresist on a substrate. Deposition occurs through an opening in the top photoresist layer and through larger size (i.e., undercut) openings in the aluminum and bottom photoresist layers. The top layer of photoresist remains on the mask during deposition and defines the pattern, the bottom photoresist is fully exposed and in the openings provides an undercut which prevents edge tearing during lift-off, and the aluminum layer (typically 50-200 Angstroms thick) protects the bottom layer of photoresist from dissolving during formation of the top photoresist layer. Also described is a technique in which the edges of thin films are tapered by depositing them from a direction oblique to the substrate surface and by rotating the substrate during deposition. These techniques are specifically discussed in the context of fabricating Josephson junction devices.

摘要翻译： 用于薄膜的图案化沉积的剥离掩模包括在衬底上的光致抗蚀剂 - 铝 - 光致抗蚀剂的三层夹层。 沉积通过顶部光致抗蚀剂层中的开口并通过铝和底部光致抗蚀剂层中的较大尺寸（即底切）开口而发生。 光致抗蚀剂的顶层在沉积期间保留在掩模上并且限定图案，底部光致抗蚀剂被完全暴露，并且在开口中提供了防止在剥离期间边缘撕裂的底切，以及铝层（通常为50-200埃厚） 在形成顶部光致抗蚀剂层期间保护光致抗蚀剂的底层不被溶解。 还描述了一种技术，其中薄膜的边缘通过从倾斜于衬底表面的方向沉积而通过在沉积期间旋转衬底而成锥形。 这些技术在制造约瑟夫逊结器件的上下文中具体讨论。