公开(公告)号：US20090280654A1

公开(公告)日：2009-11-12

申请号：US12149906

申请日：2008-05-09

Applicant: Cheng-Ta Wu ,  Da-Yu Chuang ,  Yen-Da Chen ,  Lihan Lin

Inventor： Cheng-Ta Wu ,  Da-Yu Chuang ,  Yen-Da Chen ,  Lihan Lin

IPC: H01L21/31

CPC classification number: H01L21/28202 ,  H01L21/28185

Abstract: A process for forming a silicon nitride layer on a gate oxide film as part of formation of a gate structure in a semiconductor device includes: forming a layer of silicon nitride on top of a gate oxide film on a semiconductor substrate by a nitridation process, heating the semiconductor substrate in an annealing chamber, exposing the semiconductor substrate to N2 in the annealing chamber, and exposing the semiconductor substrate to a mixture of N2 and N2O in the annealing chamber.

Abstract translation: 在半导体器件中形成栅极结构的一部分，在栅极氧化膜上形成氮化硅层的工艺包括：通过氮化工艺在半导体衬底上的栅极氧化膜的顶部上形成氮化硅层，加热 在退火室中的半导体衬底，将半导体衬底暴露于退火室中的N2，并将半导体衬底暴露于退火室中的N 2和N 2 O的混合物。

公开(公告)号：US07595467B2

公开(公告)日：2009-09-29

申请号：US11290608

申请日：2005-12-01

Applicant: Cheng Jer Yang ,  Wen Ti Lin ,  Hung Wen Chiou

Inventor： Cheng Jer Yang ,  Wen Ti Lin ,  Hung Wen Chiou

IPC: H05B1/02

CPC classification number: G05B19/4184 ,  G05B2219/31205 ,  G05B2219/31483 ,  G05B2219/45031 ,  Y02P90/14 ,  Y02P90/18

Abstract: A fault detection system comprises a data server configured to collect parameters incoming from at least one apparatus, at least one fault-sensing module configured to generate an alarm signal if the parameter exceeds a predetermined specification, a monitoring module configured to restart the fault-sensing module if the fault-sensing module operates abnormally, and a remote controller configured to control the data server, the fault-sensing module, and the monitoring module. The method for managing the fault detection system comprises steps of storing parameters incoming from at least one apparatus in the data server; checking whether the parameter exceeds a predetermined specification by the fault-sensing module in a last-in first-out manner; generating an alarm signal if the parameter exceeds a predetermined specification by the fault-sensing module; checking whether the fault-sensing module operates abnormally by the monitoring module; and restarting the fault-sensing module by the monitoring module if the fault-sensing module operates abnormally.

Abstract translation: 故障检测系统包括：数据服务器，被配置为收集从至少一个装置输入的参数;至少一个故障检测模块，被配置为如果所述参数超过预定规格则产生报警信号;监控模块，被配置为重启故障感测 模块，如果故障检测模块运行异常，以及配置为控制数据服务器，故障检测模块和监控模块的远程控制器。 用于管理故障检测系统的方法包括以下步骤：将从至少​​一个装置输入的参数存储在数据服务器中; 通过故障检测模块以先进先出的方式检查参数是否超过预定的规格; 如果所述参数超过所述故障检测模块的预定规格，则产生报警信号; 检查故障检测模块是否由监控模块异常运行; 如果故障检测模块异常运行，则由监控模块重新启动故障检测模块。

公开(公告)号：US20090224787A1

公开(公告)日：2009-09-10

申请号：US12043111

申请日：2008-03-05

Applicant: LI PENG CHANG ,  KUO YIN HUANG ,  JUNG CHUN LIN

Inventor： LI PENG CHANG ,  KUO YIN HUANG ,  JUNG CHUN LIN

IPC: G01R31/02

CPC classification number: G01R31/2891

Abstract: A probing apparatus comprises a wafer chuck configured to receive a semiconductor wafer having a plurality of integrated circuit devices and test keys configured to monitor the fabrication quality of the integrated circuit devices, a carrier configured to receive a probe card having a plurality of probe needles configured to contact the test keys of the semiconductor wafer and collect electrical information of the integrated circuit devices, and an angular adjusting module configured to adjust the angle between the probe card and the semiconductor wafer by rotating the semiconductor wafer.

Abstract translation: 探测装置包括晶片卡盘，其被配置为接收具有多个集成电路器件的半导体晶片和被配置为监视集成电路器件的制造质量的测试键，被配置为接收具有配置的多个探针的探针卡的载体 接触半导体晶片的测试键并收集集成电路器件的电子信息;以及角度调节模块，其经配置以通过旋转半导体晶片来调节探针卡与半导体晶片之间的角度。

公开(公告)号：US20090191367A1

公开(公告)日：2009-07-30

申请号：US12205804

申请日：2008-09-05

Applicant: Wei-Su Chen

Inventor： Wei-Su Chen

IPC: B29D22/00 ,  B32B1/08 ,  H01L45/00 ,  H01J1/62 ,  G21K5/00 ,  G02B6/10 ,  G11B5/187 ,  G03B27/54

CPC classification number: G03B27/54 ,  B82Y10/00 ,  B82Y20/00 ,  G02B6/1225 ,  G11B9/1409 ,  G11C13/0004 ,  H01L43/08 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/1293 ,  H01L45/144 ,  H01L45/146 ,  H01L45/1675 ,  H01L45/1691 ,  H01L2924/0002 ,  Y10T428/13 ,  H01L2924/00

Abstract: An exemplary hollow stylus-shaped structure is disclosed, including a hollow column spacer formed over a base layer and a hollow cone spacer stacked over the hollow column spacer, wherein the hollow cone spacer, the hollow column spacer, and the base layer form a space, and sidewalls of the hollow cone spacer and the hollow column spacer are made of silicon-containing organic or inorganic materials.

Abstract translation: 公开了一种示例性的中空触针结构，其包括在基层上形成的中空柱间隔件和堆叠在中空柱间隔件上的中空锥形间隔件，其中中空圆锥间隔件，中空柱间隔件和基层形成空间 ，中空圆锥间隔件和中空柱间隔件的侧壁由含硅有机或无机材料制成。

公开(公告)号：US20090148980A1

公开(公告)日：2009-06-11

申请号：US12189090

申请日：2008-08-08

Applicant: Tu-Hao Yu

Inventor： Tu-Hao Yu

IPC: H01L45/00

CPC classification number: H01L45/1691 ,  H01L45/06 ,  H01L45/124 ,  H01L45/144

Abstract: A method for forming a phase-change memory element. The method includes providing a substrate with an electrode formed thereon; sequentially forming a conductive layer and a first dielectric layer on the substrate; forming a patterned photoresist layer on the first dielectric layer; subjecting the patterned photoresist layer to a trimming process, remaining a photoresist pillar; etching the first dielectric layer with the photoresist pillar as etching mask, remaining a dielectric pillar; comformally forming a first phase-change material layer on the conductive layer and the dielectric pillar to cover the top surface and side walls of the dielectric pillar; forming a second dielectric layer to cover the first phase-change material layer; subjecting to the second dielectric layer and the first phase-change material layer to a planarization until exposing the top surface of the dielectric pillar; and forming a second phase-change material layer on the second dielectric layer.

Abstract translation: 一种形成相变存储元件的方法。 该方法包括提供其上形成有电极的基板; 在基板上依次形成导电层和第一介质层; 在所述第一介电层上形成图案化的光致抗蚀剂层; 对图案化的光致抗蚀剂层进行修整工艺，保留光刻胶柱; 用光致抗蚀剂柱蚀刻第一介电层作为蚀刻掩模，保留介电柱; 在所述导电层和所述电介质柱上形成第一相变材料层以覆盖所述介电柱的顶表面和侧壁; 形成第二介电层以覆盖所述第一相变材料层; 对第二介电层和第一相变材料层进行平面化，直到暴露介电柱的顶表面; 以及在所述第二介电层上形成第二相变材料层。

公开(公告)号：US20090135645A1

公开(公告)日：2009-05-28

申请号：US12275223

申请日：2008-11-21

Applicant: Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Pei-Chia Chiang ,  Wen-Pin Lin

Inventor： Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Pei-Chia Chiang ,  Wen-Pin Lin

IPC: G11C7/00 ,  G11C11/56

CPC classification number: G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2013/0092

Abstract: A data programming circuit for storing a writing data into a memory cell is provided. The data programming circuit includes a control circuit and a current generating circuit. The control circuit generates a control signal according to the writing data. The current generating circuit provides a writing current to the memory cell to change a crystalline state of the memory cell. The writing current has a pulse width corresponding to the writing data, and the crystalline state corresponds to the writing data.

Abstract translation: 提供了一种用于将写入数据存储到存储单元中的数据编程电路。 数据编程电路包括控制电路和电流产生电路。 控制电路根据写入数据生成控制信号。 电流产生电路向存储单元提供写入电流以改变存储单元的结晶状态。 写入电流具有对应于写入数据的脉冲宽度，并且结晶状态对应于写入数据。

公开(公告)号：US20090127618A1

公开(公告)日：2009-05-21

申请号：US12357410

申请日：2009-01-22

Applicant: Hsiao-Che Wu

Inventor： Hsiao-Che Wu

IPC: H01L29/78

CPC classification number: H01L29/7851 ,  H01L29/66795

Abstract: A multi-fin field effect transistor includes a substrate, an oxide layer, a conductive layer, a gate oxide layer, and a doped region. The substrate is surrounded by a trench, and there are at least two fin-type silicon layers formed in the substrate in a region prepared to form a gate thereon. The oxide layer is disposed in the trench and the top surface of the oxide layer is lower than that of the fin-type silicon layers. The conductive layer is disposed in the region prepared to form a gate. The top surface of the conductive layer is higher than that of the fin-type silicon layers. The gate oxide layer is disposed between the conductive layer and the fin-type silicon layers and disposed between the conductive layer and the substrate. The doped region is disposed in the substrate on both sides of the conductive layer.

Abstract translation: 多鳍场效应晶体管包括衬底，氧化物层，导电层，栅极氧化物层和掺杂区域。 衬底被沟槽包围，并且在准备在其上形成栅极的区域中在衬底中形成有至少两个鳍型硅层。 氧化物层设置在沟槽中，氧化物层的上表面比翅片型硅层低。 导电层设置在准备形成栅极的区域中。 导电层的顶表面高于翅片型硅层的表面。 栅氧化层设置在导电层和翅片型硅层之间，并且设置在导电层和衬底之间。 掺杂区域设置在导电层两侧的衬底中。

公开(公告)号：US20090101884A1

公开(公告)日：2009-04-23

申请号：US12016093

申请日：2008-01-17

Applicant: Li-Shu Tu

Inventor： Li-Shu Tu

IPC: H01L45/00

CPC classification number: H01L45/06 ,  H01L45/1233 ,  H01L45/1293 ,  H01L45/144 ,  H01L45/1675

Abstract: Phase change memory devices and methods for fabricating the same are provided. A phase change memory device includes a first conductive electrode disposed in a first dielectric layer. A second dielectric layer is disposed over the first dielectric layer. A phase change material layer is disposed in the second dielectric layer and electrically connected to the first conductive electrode. A space is disposed in the second dielectric layer to at least isolate a sidewall of the phase change material layer and the second dielectric layer adjacent thereto. A second conductive electrode is disposed in the second dielectric layer and electrically connected to the phase change material layer.

Abstract translation: 提供了相变存储器件及其制造方法。 相变存储器件包括设置在第一介电层中的第一导电电极。 第二介电层设置在第一介电层上。 相变材料层设置在第二电介质层中并与第一导电电极电连接。 在第二电介质层中设置空间以至少隔离相变材料层和与其相邻的第二电介质层的侧壁。 第二导电电极设置在第二电介质层中并电连接到相变材料层。

公开(公告)号：US20090080243A1

公开(公告)日：2009-03-26

申请号：US12142724

申请日：2008-06-19

Applicant: Pei-Chia Chiang ,  Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Wen-Pin Lin

Inventor： Pei-Chia Chiang ,  Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Wen-Pin Lin

IPC: G11C11/00

CPC classification number: G11C5/14 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2013/0078

Abstract: Devices controlling a phase change storage element and methods for increasing reliability of a phase change storage element. The invention introduces a first operation mode and a second operation mode. A reference phase change storage element is forced a write current for an ideal conduction period in the first operation mode. In the second operation mode, the invention generates a proper conduction period based on the resistance of the reference phase change storage element, and forces the write current into the controlled phase change storage element for the proper conduction period.

Abstract translation: 控制相变存储元件的装置和增加相变存储元件的可靠性的方法。 本发明引入了第一操作模式和第二操作模式。 参考相变存储元件在第一操作模式中强制写入电流以达到理想的导通时段。 在第二操作模式中，本发明基于参考相变存储元件的电阻产生适当的导通周期，并将写入电流强制到受控相变存储元件中以达到适当的导通周期。

公开(公告)号：US20090057643A1

公开(公告)日：2009-03-05

申请号：US11850019

申请日：2007-09-04

Applicant: Frederick T. Chen

Inventor： Frederick T. Chen

IPC: H01L45/00

CPC classification number: G11C11/5678 ,  G11C13/0004 ,  H01L45/06 ,  H01L45/122 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1691

Abstract: A phase change memory device is disclosed. A second conductive spacer is under a first conductive spacer. A phase change layer comprises a first portion substantially parallel to the first and second conductive spacers and a second portion on top of the second conductive spacer, wherein the second conductive spacer is electrically connected to the first conductive spacer through the second portion of the phase change layer.

Abstract translation: 公开了一种相变存储器件。 第二导电间隔物位于第一导电间隔物下方。 相变层包括基本上平行于第一和第二导电间隔物的第一部分和位于第二导电间隔物的顶部上的第二部分，其中第二导电间隔物通过相变的第二部分电连接到第一导电间隔物 层。