公开(公告)号：US07577820B1

公开(公告)日：2009-08-18

申请号：US11404958

申请日：2006-04-14

申请人： David Wentzlaff ,  Anant Agarwal

发明人： David Wentzlaff ,  Anant Agarwal

IPC分类号： G06F15/76

CPC分类号： G06F15/16

摘要： An integrated circuit comprises a plurality of tiles. Each tile comprises a processor including a storage module, wherein the processor is configured to process multiple streams of instructions, a switch including switching circuitry to forward data received over data paths from other tiles to the processor and to switches of other tiles, and to forward data received from the processor to switches of other tiles, and coupling circuitry configured to couple data resulting from processing an instruction from at least one of the streams of instructions to the storage module and to the switch.

摘要翻译： 集成电路包括多个瓦片。 每个瓦片包括包括存储模块的处理器，其中所述处理器被配置为处理多个指令流，开关包括切换电路，以将从其他瓦片到数据路径接收的数据转发到处理器，以及转发其他瓦片 从处理器接收的数据到其他瓦片的切换器，以及耦合电路，其被配置为将从指令流中的至少一个处理指令得到的数据耦合到存储模块和交换机。

公开(公告)号：US20090189228A1

公开(公告)日：2009-07-30

申请号：US12019690

申请日：2008-01-25

申请人： QINGCHUN ZHANG ,  SARAH HANEY ,  ANANT AGARWAL

发明人： QINGCHUN ZHANG ,  SARAH HANEY ,  ANANT AGARWAL

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7802 ,  H01L29/0653 ,  H01L29/086 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/365 ,  H01L29/41766 ,  H01L29/66068 ,  H01L29/66712 ,  H01L29/7396

摘要： The invention is a device for controlling conduction across a semiconductor body with a P type channel layer between active semiconductor regions of the device and the controlling gate contact. The device, often a MOSFET or an IGBT, includes at least one source, well, and drift region. The P type channel layer may be divided into sections, or divided regions, that have been doped to exhibit N type conductivity. By dividing the channel layer into regions of different conductivity, the channel layer allows better control over the threshold voltage that regulates current through the device. Accordingly, one of the divided regions in the channel layer is a threshold voltage regulating region. The threshold-voltage regulating region maintains its original P type conductivity and is available in the transistor for a gate voltage to invert a conductive zone therein. The conductive zone becomes the voltage regulated conductive channel within the device.

摘要翻译： 本发明是一种用于通过在器件的有源半导体区域和控制栅极接触之间的P型沟道层来控制半导体本体导通的装置。 该器件通常是MOSFET或IGBT，包括至少一个源极，阱和漂移区。 P型沟道层可以被分成已被掺杂以显示N型导电性的部分或分割区域。 通过将沟道层分成不同导电率的区域，通道层可以更好地控制调节通过器件的电流的阈值电压。 因此，沟道层中的一个分割区域是阈值电压调节区域。 阈值电压调节区域保持其原始P型电导率，并且在晶体管中可用于栅极电压以反转其中的导电区域。 导电区域成为设备内的电压调节导电通道。

公开(公告)号：US07547578B2

公开(公告)日：2009-06-16

申请号：US11531975

申请日：2006-09-14

申请人： Anant Agarwal ,  Sei-Hyung Ryu ,  Matthew Donofrio

发明人： Anant Agarwal ,  Sei-Hyung Ryu ,  Matthew Donofrio

IPC分类号： H01L21/00 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/44

CPC分类号： H01L21/0485 ,  H01L21/0495 ,  H01L21/268 ,  H01L29/6606 ,  Y10S438/931

摘要： Methods of forming a silicon carbide semiconductor device are disclosed. The methods include forming a semiconductor device at a first surface of a silicon carbide substrate having a first thickness, and mounting a carrier substrate to the first surface of the silicon carbide substrate. The carrier substrate provides mechanical support to the silicon carbide substrate. The methods further include thinning the silicon carbide substrate to a thickness less the first thickness, forming a metal layer on the thinned silicon carbide substrate opposite the first surface of the silicon carbide substrate, and locally annealing the metal layer to form an ohmic contact on the thinned silicon carbide substrate opposite the first surface of the silicon carbide substrate. The silicon carbide substrate is singulated to provide a singulated semiconductor device.

摘要翻译： 公开了形成碳化硅半导体器件的方法。 所述方法包括在具有第一厚度的碳化硅衬底的第一表面上形成半导体器件，以及将载体衬底安装到碳化硅衬底的第一表面上。 载体衬底为碳化硅衬底提供机械支撑。 所述方法还包括将碳化硅衬底减薄至小于第一厚度的厚度，在与碳化硅衬底的第一表面相对的稀薄的碳化硅衬底上形成金属层，并局部退火金属层以在其上形成欧姆接触 薄碳化硅衬底与碳化硅衬底的第一表面相对。 将碳化硅衬底分离以提供单片半导体器件。

公开(公告)号：US07394288B1

公开(公告)日：2008-07-01

申请号：US11302984

申请日：2005-12-13

申请人： Anant Agarwal

发明人： Anant Agarwal

IPC分类号： G06F7/38 ,  H03K19/177

CPC分类号： G06F15/8007 ,  G06F9/30123 ,  G06F9/30189 ,  G06F9/3851 ,  G06F15/17381 ,  G06F15/7867 ,  H03K19/177 ,  H03K19/17704 ,  Y02D10/12 ,  Y02D10/13

摘要： An integrated circuit includes a plurality of tiles. Each tile includes a processor, a switch including switching circuitry to forward data over data paths from other tiles to the processor and to switches of other tiles, and a switch memory that stores instruction streams that are able to operate independently for respective output ports of the switch.

摘要翻译： 集成电路包括多个瓦片。 每个瓦片包括处理器，开关，其包括用于将数据从其他瓦片转发到处理器的数据路径以及其他瓦片的切换的切换电路;以及存储指令流的开关存储器，所述指令流能够独立地对于相应输出端口 开关。

公开(公告)号：US20060261347A1

公开(公告)日：2006-11-23

申请号：US11132355

申请日：2005-05-18

申请人： Sei-Hyung Ryu ,  Jason Jenny ,  Mrinal Das ,  Hudson Hobgood ,  Anant Agarwal ,  John Palmour

发明人： Sei-Hyung Ryu ,  Jason Jenny ,  Mrinal Das ,  Hudson Hobgood ,  Anant Agarwal ,  John Palmour

IPC分类号： H01L29/15

CPC分类号： H01L29/7395 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66333

摘要： Silicon carbide high voltage semiconductor devices and methods of fabricating such devices are provided. The devices include a voltage blocking substrate. Insulated gate bipolar transistors are provided that have a voltage blocking substrate. Planar and beveled edge termination may be provided.

摘要翻译： 提供了碳化硅高压半导体器件及其制造方法。 这些器件包括电压阻挡衬底。 提供具有电压阻挡衬底的绝缘栅双极晶体管。 可以提供平面和斜边缘终止。

公开(公告)号：US20060255423A1

公开(公告)日：2006-11-16

申请号：US11126816

申请日：2005-05-11

申请人： Sei-Hyung Ryu ,  Anant Agarwal

发明人： Sei-Hyung Ryu ,  Anant Agarwal

IPC分类号： H01L29/15

CPC分类号： H01L29/6606 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/872

摘要： Integral structures that block the current conduction of the built-in PiN diode in a junction barrier Schottky (JBS) structure are provided. A Schottky diode may be incorporated in series with the PiN diode, where the Schottky diode is of opposite direction to that of the PiN diode. A series resistance or and insulating layer may be provided between the PiN diode and a Schottky contact. Silicon carbide Schottky diodes and methods of fabricating silicon carbide Schottky diodes that include a silicon carbide junction barrier region disposed within a drift region of the diode are also provided. The junction barrier region includes a first region of silicon carbide having a first doping concentration in the drift region of the diode and a second region of silicon carbide in the drift region and disposed between the first region of silicon carbide and a Schottky contact of the Schottky diode. The second region is in contact with the first region of silicon carbide and the Schottky contact. The second region of silicon carbide has a second doping concentration that is less than the first doping concentration.

摘要翻译： 提供阻塞内部PiN二极管在结屏障肖特基（JBS）结构中的电流传导的积分结构。 肖特基二极管可以与PiN二极管串联，其中肖特基二极管与PiN二极管的方向相反。 可以在PiN二极管和肖特基接触之间提供串联电阻或绝缘层。 还提供了碳化硅肖特基二极管和制造碳化硅肖特基二极管的方法，其包括设置在二极管的漂移区域内的碳化硅结壁垒区域。 结阻挡区域包括在二极管的漂移区域中具有第一掺杂浓度的碳化硅的第一区域和漂移区域中的第二碳化硅区域，并且设置在碳化硅的第一区域与肖特基的肖特基接触之间 二极管。 第二区域与碳化硅的第一区域和肖特基接触部接触。 碳化硅的第二区域具有小于第一掺杂浓度的第二掺杂浓度。

公开(公告)号：US06804814B1

公开(公告)日：2004-10-12

申请号：US09474680

申请日：1999-12-29

申请人： Andrew E. Ayers ,  Richard Schooler ,  Anant Agarwal

发明人： Andrew E. Ayers ,  Richard Schooler ,  Anant Agarwal

IPC分类号： G06F944

CPC分类号： G06F11/3636 ,  G06F11/3624 ,  G06F11/3644

摘要： A program execution data trace is created by instrumenting a program to record value sets during execution and an instruction trace. By simulating instructions either backward or forward from a first instruction associated with a recorded value set to a second instruction according to the instruction trace, a value set is determined for the second instruction. Backward and forward simulation can be combined to complement each other. For backward simulation, a table of simulation instructions is preferably maintained, which associates program instructions encountered in the instruction trace with simulation instructions which reverse the operation of the of the associated program instructions. Preferably, one or more probes is inserted into the program to save values of particular variables whose value may be difficult to determine. Preferably, the instruction trace is displayed alongside and correlated with the data trace. In one embodiment, the instruction trace is displayed and a value set is determined for an instruction upon a request by the user indicating the instruction for which the value set is desired.

摘要翻译： 程序执行数据跟踪是通过在程序执行过程中记录数值集和指令跟踪进行测量而创建的。 通过根据指令轨迹从与从设定到第二指令的记录值相关联的第一指令向后或向前模拟指令，为第二指令确定值集合。 后向和前向模拟可以相互补充。 为了进行反向仿真，优选地保持模拟指令表，其将在指令轨迹中遇到的程序指令与反转相关程序指令的操作的模拟指令相关联。 优选地，将一个或多个探针插入到程序中以保存其值可能难以确定的特定变量的值。 优选地，指示轨迹显示在数据轨迹旁边并与之相关联。 在一个实施例中，显示指令轨迹，并且在用户请求时指示针对期望值设置的指令的指令确定值集合。

公开(公告)号：US06770911B2

公开(公告)日：2004-08-03

申请号：US09952064

申请日：2001-09-12

申请人： Anant Agarwal ,  Sei-Hyung Ryu ,  John W. Palmour

发明人： Anant Agarwal ,  Sei-Hyung Ryu ,  John W. Palmour

IPC分类号： H01L29417

CPC分类号： H01L31/1113 ,  Y10S438/931

摘要： Large area silicon carbide devices, such as light-activated silicon carbide thyristors, having only two terminals are provided. The silicon carbide devices are selectively connected in parallel by a connecting plate. Silicon carbide thyristors are also provided having a portion of the gate region of the silicon carbide thyristors exposed so as to allow light of an energy greater than about 3.25 eV to activate the gate of the thyristor. The silicon carbide thyristors may be symmetric or asymmetrical. A plurality of the silicon carbide thyristors may be formed on a wafer, a portion of a wafer or multiple wafers. Bad cells may be determined and the good cells selectively connected by a connecting plate.

摘要翻译： 提供仅具有两个端子的大面积碳化硅器件，例如光激活碳化硅晶闸管。 碳化硅器件通过连接板选择性地并联连接。 还提供了碳化硅晶闸管，其具有暴露的碳化硅晶闸管的栅极区域的一部分，以允许大于约3.25eV的能量的光来激活晶闸管的栅极。 碳化硅晶闸管可以是对称的或不对称的。 多个碳化硅晶闸管可以形成在晶片，晶片的一部分或多个晶片上。 可以确定坏细胞，并且通过连接板选择性地连接良好的细胞。

公开(公告)号：US06745383B1

公开(公告)日：2004-06-01

申请号：US09474679

申请日：1999-12-29

申请人： Anant Agarwal ,  Andrew E. Ayers ,  Richard Schooler

发明人： Anant Agarwal ,  Andrew E. Ayers ,  Richard Schooler

IPC分类号： G06F944

CPC分类号： G06F11/3676 ,  G06F11/3495

摘要： A computer method for issuing an early warning includes determining, using change and test coverage and control flow and data flow analyses of a program, locations in the program at which to insert early warning (EW) code to monitor for an event. The program is instrumented with EW code which monitors for the event, by inserting EW code at the determined locations. Upon detecting the event, EW code performs an early action warning, or issues an early action. Early warnings are issued when an EW-instrumented block is reached. Issuance of an early warning action can be conditional upon execution of the program in a particular environment, such as a production environment. Issuance of an EW can also be conditional upon executing an untested block of code that was recently modified. The issuing of an early warning can include sending an email, writing into a log file, sending a message to a console, where the message causes the change of a human-perceptible characteristic, placing the program into a wait state, halting the program, sending an alarm to an operator, or triggering a failover. In some embodiments, EW code can be deactivated upon certain conditions. Issuance of an early warning can also occur upon an event such as the execution of a user-inserted assert or warning statement, or before a file is opened, wherein the EW issues if a null pointer about to be passed to a system function. In some embodiments, an EW will issue if the value of an argument to some function exceeds a predetermined range. In various embodiments, the EW code is placed in a loop, and issues an EW if the loop is executed more than a predetermined number of times, or the EW code issues an EW upon the execution of user-marked code, or the EW code issues an EW when the time duration between execution of two points in the program exceeds a predetermined value, or upon the detection of an untested configuration.

摘要翻译： 用于发布早期警告的计算机方法包括：确定，使用改变和测试覆盖，以及控制程序的流程和数据流分析，以便插入预警（EW）代码来监视事件的程序中的位置。 该程序用EW代码进行测试，EW代码通过在确定的位置插入EW代码来监视事件。 在检测到事件时，EW代码执行早期的动作警告，或发出早期的动作。 当到达EW仪表盘块时，会发出预警。 发布预警措施可以在特定环境（如生产环境）中执行程序的前提。 EW的颁发也可以是执行最近修改的未经验证的代码块的条件。 发出预警可以包括发送电子邮件，写入日志文件，向控制台发送消息，其中消息导致人感知特征的改变，将程序置于等待状态，停止程序， 向操作员发送警报，或触发故障切换。 在一些实施例中，可以在某些条件下停用EW代码。 发生预警也可能发生在诸如执行用户插入的断言或警告声明的事件之后，或者在文件被打开之前，其中如果空指针被传递给系统功能，EW将发出预警。 在一些实施例中，如果某个功能的参数的值超过预定范围，则将发出EW。 在各种实施例中，将EW代码置于循环中，并且如果循环执行多于预定次数则发出EW，或者EW代码在执行用户标记的代码时发出EW，或EW代码 当程序中的两点执行之间的持续时间超过预定值时，或者在检测到未经测试的配置之后发出EW。

公开(公告)号：US09396946B2

公开(公告)日：2016-07-19

申请号：US13229266

申请日：2011-09-09

申请人： Sarit Dhar ,  Lin Cheng ,  Sei-Hyung Ryu ,  Anant Agarwal ,  John Williams Palmour ,  Erik Maki ,  Jason Gurganus ,  Daniel Jenner Lichtenwalner

发明人： Sarit Dhar ,  Lin Cheng ,  Sei-Hyung Ryu ,  Anant Agarwal ,  John Williams Palmour ,  Erik Maki ,  Jason Gurganus ,  Daniel Jenner Lichtenwalner

IPC分类号： H01L21/3205 ,  H01L21/04 ,  H01L21/02 ,  H01L29/51 ,  H01L29/739 ,  H01L29/78 ,  H01L29/06 ,  H01L29/16

CPC分类号： H01L29/7802 ,  H01L21/02142 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02175 ,  H01L21/022 ,  H01L21/02282 ,  H01L21/02288 ,  H01L21/02378 ,  H01L21/045 ,  H01L21/049 ,  H01L29/0619 ,  H01L29/1606 ,  H01L29/1608 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/7395 ,  H01L29/78 ,  H01L29/7813

摘要： Embodiments of a semiconductor device having increased channel mobility and methods of manufacturing thereof are disclosed. In one embodiment, the semiconductor device includes a substrate including a channel region and a gate stack on the substrate over the channel region. The gate stack includes an alkaline earth metal. In one embodiment, the alkaline earth metal is Barium (Ba). In another embodiment, the alkaline earth metal is Strontium (Sr). The alkaline earth metal results in a substantial improvement of the channel mobility of the semiconductor device.

摘要翻译： 公开了具有增加的信道移动性的半导体器件及其制造方法的实施例。 在一个实施例中，半导体器件包括在沟道区上的衬底上包括沟道区和栅叠层的衬底。 栅极堆叠包括碱土金属。 在一个实施方案中，碱土金属是钡（Ba）。 在另一个实施方案中，碱土金属是锶（Sr）。 碱土金属导致半导体器件的沟道迁移率的显着改善。