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    WAFER PLACEMENT TABLE
    101.
    发明公开
    WAFER PLACEMENT TABLE 审中-公开

    公开(公告)号：US20230420230A1

    公开(公告)日：2023-12-28

    申请号：US18166611

    申请日：2023-02-09

    Applicant: NGK Insulators, Ltd.

    Inventor： Tatsuya Kuno ,  Masaki Ishikawa ,  Seiya Inoue

    IPC: H01J37/32 ,  F28F3/08

    CPC classification number: H01J37/32724 ,  F28F3/083 ,  F28F3/086 ,  F28F2230/00 ,  H01J2237/002 ,  H01J2237/2007

    Abstract: A wafer placement table includes an upper substrate including a ceramic substrate and having a wafer placement surface, a lower substrate disposed on a lower surface of the upper substrate including a refrigerant flow path or a refrigerant flow-path groove, a through hole extending through the lower substrate in an up-down direction to intersect with the refrigerant flow path or the refrigerant flow-path groove, a screw hole provided in the lower surface of the upper substrate, at a position facing the through hole, a screw member inserted from a lower surface of the lower substrate into the through hole and screwed into the screw hole, and a refrigerant-leakage prevention member that prevents the refrigerant from leaking out to the lower surface of the lower substrate through the through hole into which the screw member is inserted.

    Package with heat dissipating substrate
    102.
    发明授权
    Package with heat dissipating substrate 有权

    公开(公告)号：US11854934B2

    公开(公告)日：2023-12-26

    申请号：US17700720

    申请日：2022-03-22

    Applicant: NGK ELECTRONICS DEVICES, INC. ,  NGK INSULATORS, LTD.

    Inventor： Noriyasu Yamamoto ,  Yoshikazu Mihara ,  Naoya Shirai

    IPC: H01L23/373 ,  H01L23/367

    CPC classification number: H01L23/3735 ,  H01L23/367

    Abstract: A heat sink includes first to fifth layers. The first layer supports a frame made of ceramics, is made of copper, and has a thickness t1. The second layer is laminated to the first layer, is made of molybdenum, and has a thickness t2. The third layer is laminated to the second layer, is made of copper, and has a thickness t3. The fourth layer is laminated to the third layer, is made of molybdenum, and has a thickness t4. The fifth layer is laminated to the fourth layer, is made of copper, and has a thickness t5. A formula 3≤t1/t5≤5 is satisfied. A formula 3≤t3/t5≤5 is satisfied.

    WAFER PLACEMENT TABLE
    104.
    发明公开
    WAFER PLACEMENT TABLE 审中-公开

    公开(公告)号：US20230402306A1

    公开(公告)日：2023-12-14

    申请号：US18298404

    申请日：2023-04-11

    Applicant: NGK INSULATORS, LTD.

    Inventor： Reo WATANABE ,  Daisuke TSUNEKAWA ,  Kanto WATANABE

    IPC: H01L21/677 ,  H01L21/683

    CPC classification number: H01L21/67778 ,  H01L21/683

    Abstract: A wafer placement table includes: a ceramic substrate having a wafer placement surface and incorporating an electrode; a conductive embedded member electrically connected to the electrode; a conductive terminal with a female thread, the conductive terminal being electrically connected to the conductive embedded member, having a projection projecting from a surface, on an opposite side to the wafer placement surface, of the ceramic substrate, having the female thread at an end face of the projection; a conductive adapter that is mounted on the end face of the projection of the conductive terminal with the female thread, has a communication hole that communicates with the female thread, and is non-rotatable relative to the conductive terminal with the female thread; and a conductive connection member with a male thread, the conductive connection member having the male thread screwed into the female thread through the communication hole, and being integrated with the adapter.

    Gas sensor
    106.
    发明授权
    Gas sensor 有权

    公开(公告)号：US11815485B2

    公开(公告)日：2023-11-14

    申请号：US17022194

    申请日：2020-09-16

    Applicant: NGK INSULATORS, LTD.

    Inventor： Shotaro Niizuma ,  Yusuke Watanabe ,  Toshihiro Hirakawa ,  Hayami Aota

    IPC: G01N27/407

    CPC classification number: G01N27/4073

    Abstract: A gas sensor includes: a sensor element; a plurality of element pads formed on a rear end portion of the sensor element; and a plurality of contact members holding the rear end portion of the sensor element and electrically connected respectively to the plurality of element pads. The plurality of contact members include contact members that each have an outer end surface protruding out from a corresponding one of end surfaces of the sensor element.

    MEMBRANE HEAT TREATMENT METHOD
    107.
    发明公开
    MEMBRANE HEAT TREATMENT METHOD 审中-公开

    公开(公告)号：US20230356153A1

    公开(公告)日：2023-11-09

    申请号：US18352377

    申请日：2023-07-14

    Applicant: NGK INSULATORS, LTD.

    Inventor： Aya MIURA ,  Narumi TOMOKAGE ,  Azumi OTA ,  Katsuya SHIMIZU

    IPC: B01D65/02 ,  B01D71/02 ,  B01D69/02

    CPC classification number: B01D65/02 ,  B01D71/0281 ,  B01D69/02 ,  B01D2325/12 ,  B01D2323/081 ,  B01D2321/32

    Abstract: A membrane heat treatment method includes a process of raising the temperature of a membrane to an intermediate heating temperature (step S21), a process of heating and keeping the membrane at the intermediate heating temperature (step S22), a process of raising the temperature of the membrane to a main heating temperature higher than the intermediate heating temperature (step S23), and the process of heating and keeping the membrane at the main heating temperature (step S24). A first recovery amount R1 that is a difference in permeability of the membrane between after step S22 and before step S21 is 50% or more and 95% or less of a second recovery amount R2 that is a difference in permeability of the membrane between after step S24 and before step S21.

    Wafer placement device
    108.
    发明授权
    Wafer placement device 有权

    公开(公告)号：US11810767B2

    公开(公告)日：2023-11-07

    申请号：US17000711

    申请日：2020-08-24

    Applicant: NGK INSULATORS, LTD.

    Inventor： Hiroshi Takebayashi

    IPC: H01J37/32 ,  H01L21/67 ,  H01L21/683 ,  H01L21/687

    CPC classification number: H01J37/32642 ,  H01J37/32724 ,  H01L21/67103 ,  H01L21/6833 ,  H01L21/68721 ,  H01L21/68735 ,  H01J2237/002 ,  H01J2237/2007

    Abstract: A wafer placement device includes a wafer placement stage including a wafer electrostatic chuck and a wafer cooling plate, a focus-ring placement stage including a focus-ring electrostatic chuck and a focus-ring cooling plate, and a clamping member arranged around the focus-ring placement stage. The wafer placement stage, the focus-ring placement stage, and the clamping member are separate from one another. A pressing portion of the focus-ring cooling plate presses a wafer cooling plate flange against a mounting plate. The clamping member is fastened to the mounting plate with bolts in a state of pressing a flange against the mounting plate at its flange, thus fixing the wafer placement stage and the focus-ring placement stage to the mounting plate without directly fastening them to the mounting plate.

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