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公开(公告)号：US09678867B2
公开(公告)日：2017-06-13
申请号：US14564958
申请日：2014-12-09
Inventor： Marc Dressler , Thorsten Hufnagel , Bastian Kellers
CPC classification number: G06F12/0638 , G06F8/65 , G06F8/66 , G06F13/24 , G06F2212/202
Abstract: A method for changing software in a memory of an electronic control unit, wherein each memory address from the overlay memory can be assigned to a memory address in the read-only memory by an assignment information item. During a run time of the control unit, at least a functional part of a bypass routine that is to at least partially replace an original program routine is stored in an address range in the overlay memory, or a jump instruction is stored in the overlay memory as the first part of a bypass routine that refers to a second part of the bypass routine that is stored in an address range accessible to the processor. To activate an overlay functionality the address and/or the address range of the overlay memory are assigned to an address or address range of the program routine to be replaced.
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公开(公告)号：US09628085B1
公开(公告)日：2017-04-18
申请号：US15334659
申请日：2016-10-26
Inventor： Heiko Kalte , Dominik Lubeley , Lukas Funke
IPC: G11C7/10 , H03K19/177 , G11C7/22
CPC classification number: H03K19/1776 , G11C7/10 , G11C7/222 , H03K19/17776
Abstract: A method for accessing signals of a programmable logic device having a functional level and a configuration level at run time when the programmable logic device is executing a predefined configuration. An access to at least one signal value that has a number of bits is requested. The individual bits in the configuration are each located in an address unit with one address offset apiece such that one or more bits of a signal value are located in one address unit. A bitwise access to the requested signal values takes place, wherein the accesses to the individual bits are sorted as a function of the address unit containing the applicable bit in such a manner that the accesses to all bits located in an address unit take place in sequence as a function of the address offset, independently of the signal containing the applicable bit.
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公开(公告)号：US09600606B2
公开(公告)日：2017-03-21
申请号：US14035270
申请日：2013-09-24
Inventor： Torsten Pietzsch
IPC: G06F17/50 , G06F9/44 , G05B19/042
CPC classification number: G06F17/50 , G05B19/0428 , G05B2219/24163 , G06F8/24 , G06F8/35 , Y02P90/265
Abstract: A method for editing a computer-aided design model for developing electronic control units in a design environment, whereby the design model comprises at least one model object with first data. The method begins with the reading of all model objects of the design model and the reading of an allocation list, which assigns a particular globally unique key to each model object. If the first data are available, the reading of the first data from a first memory location follows. Then, assignment of the first data to the model object based on the globally unique key occurs, so that the first data are available during editing of the design model. If the first data are not available, assignment of the globally unique key to the model object occurs, so that the globally unique key is available during tediting of the design model.
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公开(公告)号：US20170070229A1
公开(公告)日：2017-03-09
申请号：US15258059
申请日：2016-09-07
Inventor： Frank Mertens , Marc Dressler
IPC: H03K19/177
CPC classification number: H03K19/17756 , H03K19/1776
Abstract: In a method for changing the configuration of a programmable logic module, an initial configuration of the programmable logic module is read in, with the result that a logic description, in particular a mapped netlist, of the initial configuration is at least partially available. One or more logic elements and/or connection elements from the logic description of the initial configuration of the programmable logic module are replaced or reconfigured and a logic description of a target configuration having one or more additional logic elements is created, none or a plurality of elements of the initial configuration being missing in the target configuration. Assignment information is used to determine transfer points, that is to say logic elements present in the target and initial configurations, in particular registers, and/or connection elements, to which a changed logic function is applied in the target configuration, at least the logic elements of the programmable logic module which are already unused in the initial configuration being marked as free, and the additional logic elements of the target configuration being placed on the logic elements marked as free and being connected to the transfer points via unused connection elements. A changed bit stream is created from the logic description of the target configuration, and the changed bit stream is written to the programmable logic module.
Abstract translation: 在用于改变可编程逻辑模块的配置的方法中，读入可编程逻辑模块的初始配置，结果是初始配置的逻辑描述，特别是映射网表至少部分可用。 来自可编程逻辑模块的初始配置的逻辑描述的一个或多个逻辑元件和/或连接元件被替换或重新配置，并且创建具有一个或多个附加逻辑元件的目标配置的逻辑描述，没有或多个 目标配置中缺少初始配置的元素。 分配信息用于确定转移点，也就是说目标中存在的逻辑元素和初始配置，特别是寄存器和/或连接元件，其中在目标配置中应用改变的逻辑功能，至少逻辑 在初始配置中已经未使用的可编程逻辑模块的元件被标记为空闲，并且目标配置的附加逻辑元件被放置在标记为空闲的逻辑元件上，并且经由未使用的连接元件连接到传输点。 从目标配置的逻辑描述创建改变的比特流，并且改变的比特流被写入可编程逻辑模块。
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105.发明申请METHOD FOR CONNECTING MODELS OF TECHNICAL SYSTEMS IN A TESTING DEVICE EQUIPPED FOR CONTROL UNIT DEVELOPMENT 审中-公开用于连接控制单元开发的测试设备中的技术系统模型的方法公开(公告)号：US20170060111A1
公开(公告)日：2017-03-02
申请号：US14842152
申请日：2015-09-01
Inventor： Marc TEGETHOFF
IPC: G05B17/02
CPC classification number: G05B17/02
Abstract: A method for connecting models of technical systems in a testing device equipped for control unit development having a connection of a first model of a first technical system to a second model of a second technical system. The first model and the second model include a model of a control unit, a model of a technical system to be controlled, or a model of an environment interacting with the control unit or with the technical system to be controlled. The first model has a first data interface and the second model has a second data interface. The method has the provision of a first model hierarchy structure and the provision of a second model hierarchy structure. The method has an automatic configuration of compatible connections so that the first model present in the testing device exchanges data with the second model present in the testing device through compatible connections.
Abstract translation: 一种连接具有第一技术系统的第一模型与第二技术系统的第二模型的连接的控制单元开发的测试装置中的技术系统的模型的方法。 第一模型和第二模型包括控制单元的模型，要控制的技术系统的模型或与控制单元或与要控制的技术系统相互作用的环境的模型。 第一个模型具有第一个数据接口，第二个模型具有第二个数据接口。 该方法具有提供第一模型层次结构和提供第二模型层次结构。 该方法具有自动配置兼容连接，使得测试设备中存在的第一模型通过兼容连接与测试设备中存在的第二模型交换数据。
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Patent Agency Ranking
106.发明申请公开(公告)号：US20160335203A1
公开(公告)日：2016-11-17
申请号：US15151767
申请日：2016-05-11
Inventor： Jochen SAUER , Robert LEINFELLNER , Matthias KLEMM , Thorsten BREHM , Robert POLNAU , Matthias SCHMITZ
CPC classification number: G06F13/102 , G06F9/4411 , G06F9/44505 , G06F13/126 , G06F13/20 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4072 , G06F15/7885 , G11C8/18
Abstract: An interface unit for data exchange between a first processor of a computer system and a peripheral environment. The interface unit has a number of input data channels for receiving input data from the peripheral environment and a first access management unit. The access management unit is configured to receive a request for providing the input data, stored in the number of input data channels, from a first interface processor stored in the interface unit and from a second interface processor stored in the interface unit and to provide or not to provide the input data, stored in the number of input data channels, to the first interface processor and the second interface processor. A first priority and a second priority can be stored in the first access management unit.
Abstract translation: 一种用于在计算机系统的第一处理器和外围环境之间进行数据交换的接口单元。 接口单元具有用于从外围环境接收输入数据的多个输入数据通道和第一访问管理单元。 访问管理单元被配置为从存储在接口单元中的第一接口处理器和存储在接口单元中的第二接口处理器接收提供存储在输入数据通道数量中的输入数据的请求，并且提供或 不将存储在输入数据通道中的输入数据提供给第一接口处理器和第二接口处理器。 第一优先级和第二优先级可以存储在第一访问管理单元中。
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公开(公告)号：US20160306900A1
公开(公告)日：2016-10-20
申请号：US15097318
申请日：2016-04-13
Inventor： Andreas Himmler , Matthias Klemm
Abstract: A system for testing at least a first automatic control device via a plant model includes: a first subsystem; and a second subsystem which is spatially separated from the first subsystem. The plant model comprises an executable first model code and an executable second model code. The first subsystem comprises a first time-signal processing component configured to electronically assign a first time signal (Ts1) from a global time source to a first event. The first model code is configured to provide a first calculation result based on the first event. The second subsystem comprises a second time-signal processing component configured to electronically assign a second time signal (Ts2) from the global time source to a second event. The second model code is configured to provide a second calculation result based on the second event.
Abstract translation: 一种用于经由植物模型测试至少第一自动控制装置的系统包括：第一子系统; 以及与第一子系统在空间上分离的第二子系统。 植物模型包括可执行的第一模型代码和可执行的第二模型代码。 第一子系统包括第一时间信号处理部件，其被配置为将来自全局时间源的第一时间信号（Ts1）电子地分配给第一事件。 第一模型代码被配置为基于第一事件提供第一计算结果。 第二子系统包括第二时间信号处理部件，其被配置为将第二时间信号（Ts2）从全局时间源电子分配到第二事件。 第二模型代码被配置为基于第二事件提供第二计算结果。
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公开(公告)号：US20160305853A1
公开(公告)日：2016-10-20
申请号：US15099635
申请日：2016-04-15
Inventor： Matthias SENF
IPC: G01M99/00
CPC classification number: G01M99/005 , G05B17/02 , G05B19/042 , G05B2219/23446 , G05B2219/24038 , G05B2219/2628 , G05B2219/2637 , G06F17/5009 , G06F17/5095
Abstract: A computer-implemented method for testing an real and/or virtual automotive system through a test by a test environment interacting with the real and/or virtual part, which includes a test series with different test cases of the test for different execution conditions that are specified in test configurations. Each combination of test case and test configuration is assigned a test status value from a group of predefined test status values in accordance with an evaluation of the function of the system in the corresponding test. For further planning, execution, and/or evaluation of the test series at least once a relative test coverage of at least one of the status values is determined in the resulting test case configuration matrix and/or a relative potential for improvement of the test coverage of at least one of the status values with regard to a test case and/or with regard to a configuration is determined.
Abstract translation: 一种用于通过与真实和/或虚拟部分交互的测试环境的测试来测试真实和/或虚拟汽车系统的计算机实现的方法，其包括具有针对不同执行条件的测试的不同测试用例的测试系列 在测试配置中指定。 根据相应测试中系统功能的评估，将测试用例和测试配置的每个组合从一组预定义的测试状态值分配给测试状态值。 对于测试系列的进一步规划，执行和/或评估至少一次，在所得到的测试用例配置矩阵中确定至少一个状态值的相对测试覆盖和/或用于改进测试覆盖的相对潜力 确定关于测试用例和/或关于配置的状态值中的至少一个。
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109.发明申请METHOD FOR CONNECTING AN INPUT/OUTPUT INTERFACE OF A TESTING DEVICE EQUIPPED FOR TESTING A CONTROL UNIT 有权连接用于测试控制单元的测试设备的输入/输出接口的方法公开(公告)号：US20160062861A1
公开(公告)日：2016-03-03
申请号：US14842123
申请日：2015-09-01
Inventor： Marc TEGETHOFF
CPC classification number: G06F11/261 , G05B17/02 , G05B2219/23445 , G05B2219/23446 , G05B2219/23451 , G06F11/221
Abstract: A method for connecting an input/output interface of a testing device equipped for testing a control unit to a model of a technical system present in the testing device. The interface connects the control unit to be tested or connects a technical system to be controlled, and the model to be connected to the input/output interface is a model of the technical system to be controlled or a model of the control unit to be tested. The testing device has a plurality of input/output functions connected to the model. The method has provides an interface hierarchy structure and a function hierarchy structure. The method has an automatic configuration of compatible connections between the interface hierarchy structure and the function hierarchy structure so that the model present in the testing device communicates through at least a part of the compatible connections with the control unit to be tested or the technical system to be controlled.
Abstract translation: 一种用于将配备有用于测试控制单元的测试装置的输入/输出接口连接到存在于测试装置中的技术系统的模型的方法。 接口连接要测试的控制单元或连接要控制的技术系统，要连接到输入/输出接口的型号是要控制的技术系统的型号或要测试的控制单元的型号 。 测试装置具有连接到模型的多个输入/输出功能。 该方法提供了接口层次结构和功能层次结构。 该方法具有在接口层次结构和功能层次结构之间的兼容连接的自动配置，使得测试设备中存在的模型通过至少一部分与要测试的控制单元或技术系统的兼容连接进行通信 被控制。
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110.发明申请COMPUTER-IMPLEMENTED METHOD FOR GENERATING CONTROL UNIT PROGRAM CODE AND MESSAGE MANAGEMENT ENVIRONMENT RELATING THERETO 有权用于生成控制单元程序代码和消息管理环境的计算机实现方法公开(公告)号：US20160062744A1
公开(公告)日：2016-03-03
申请号：US14836453
申请日：2015-08-26
Inventor： Michael MAIR
IPC: G06F9/44
Abstract: A computer-implemented method for generating control unit program code. The control unit program code or an intermediate representation in the generation of the control unit program code is generated from at least one first data object with at least one first software tool. The first software tool outputs at least one message about the generation process during the generation of the control unit program code or the intermediate representation, and a computer-implemented message management environment acquires the message output by the software tool. The evaluation of the messages output by the software tools during the generation process is achieved in a more effective manner in that a qualification for the acquired message at least as open or approved is acquired by the message management environment and in that a qualification precondition for a message qualified as approved is also acquired by the message management environment.
Abstract translation: 一种用于产生控制单元程序代码的计算机实现的方法。 控制单元程序代码或生成控制单元程序代码中的中间表示是从具有至少一个第一软件工具的至少一个第一数据对象生成的。 第一软件工具在生成控制单元程序代码或中间表示期间输出关于生成过程的至少一个消息，并且计算机实现的消息管理环境获取由软件工具输出的消息。 在生成过程中由软件工具输出的消息的评估以更有效的方式实现，因为获取的消息的资格至少被打开或者被批准是由消息管理环境获取的，并且其中的资格前提条件是 消息管理环境也获得了批准的消息。
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