公开(公告)号：US20140001430A1

公开(公告)日：2014-01-02

申请号：US13896955

申请日：2013-05-17

Applicant: Intermolecular Inc.

Inventor： Michael Miller ,  Tony P. Chiang ,  Xiying Costa ,  Tanmay Kumar ,  Prashant B. Phatak ,  April Schricker

IPC: H01L45/00

CPC classification number: H01L45/16 ,  H01L21/265 ,  H01L21/31155 ,  H01L27/2463 ,  H01L29/8615 ,  H01L45/08 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/165

Abstract: This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution.

公开(公告)号：US20130313509A1

公开(公告)日：2013-11-28

申请号：US13953296

申请日：2013-07-29

Applicant: Intermolecular Inc. ,  SanDisk 3D LLC ,  Kabushiki Kaisha Toshiba

Inventor： Tony P. Chiang

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1616

Abstract: Embodiments generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching capacity by using multiple layers of variable resistance layers. In one embodiment, the resistive switching element comprises at least three layers of variable resistance materials to increase the number of logic states. Each variable resistance layer may have an associated high resistance state and an associated low resistance state. As the resistance of each variable resistance layer determines the digital data bit that is stored, the multiple variable resistance layers per memory element allows for additional data storage without the need to further increase the density of nonvolatile memory devices. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players.

公开(公告)号：US08592282B2

公开(公告)日：2013-11-26

申请号：US13656585

申请日：2012-10-19

Applicant: Intermolecular, Inc.

Inventor： Sandra G. Malhotra ,  Sean Barstow ,  Tony P. Chiang ,  Pragati Kumar ,  Prashant B. Phatak ,  Sunil Shanker ,  Wen Wu

IPC: H01L21/02

CPC classification number: H01L45/1608 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641

Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.

公开(公告)号：US20130292632A1

公开(公告)日：2013-11-07

申请号：US13935388

申请日：2013-07-03

Applicant: Intermolecular, Inc.

Inventor： Prashant B. Phatak ,  Tony P. Chiang ,  Michael Miller ,  Wen Wu

IPC: H01L45/00

CPC classification number: H01L45/1616 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146

Abstract: A resistive switching memory is described, including a first electrode comprising doped silicon having a first work function, a second electrode having a second work function that is different from the first work function by between 0.1 and 1.0 electron volts (eV), a metal oxide layer between the first electrode and the second electrode, the metal oxide layer switches using bulk-mediated switching using unipolar or bipolar switching voltages for switching from a low resistance state to a high resistance state and vice versa.

Abstract translation: 描述了一种电阻式开关存储器，其包括包括具有第一功函数的掺杂硅的第一电极，具有与第一功函数不同的第二功函数的第二电极在0.1和1.0电子伏特（eV）之间的金属氧化物 在第一电极和第二电极之间，金属氧化物层使用单极或双极开关电压进行大量介导的开关，用于从低电阻状态切换到高电阻状态，反之亦然。

公开(公告)号：US20130221314A1

公开(公告)日：2013-08-29

申请号：US13675191

申请日：2012-11-13

Applicant: Intermolecular, Inc.

Inventor： Dipankar Pramanik ,  Tony P. Chiang ,  Mankoo Lee

IPC: H01L45/00

CPC classification number: H01L45/14 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0045 ,  G11C2013/0073 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16

Abstract: A resistor structure incorporated into a resistive switching memory cell or device to form memory devices with improved device performance and lifetime is provided. The resistor structure may be a two-terminal structure designed to reduce the maximum current flowing through a memory device. A method is also provided for making such memory device. The method includes depositing a resistor structure and depositing a variable resistance layer of a resistive switching memory cell of the memory device, where the resistor structure is disposed in series with the variable resistance layer to limit the switching current of the memory device. The incorporation of the resistor structure is very useful in obtaining desirable levels of device switching currents that meet the switching specification of various types of memory devices. The memory devices may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices.

Abstract translation: 提供了并入电阻式开关存储单元或装置中以形成具有改进的器件性能和寿命的存储器件的电阻器结构。 电阻器结构可以是设计成减小流过存储器件的最大电流的两端结构。 还提供了一种用于制造这种存储器件的方法。 该方法包括沉积电阻器结构并沉积存储器件的电阻式开关存储单元的可变电阻层，其中电阻器结构与可变电阻层串联设置以限制存储器件的开关电流。 电阻器结构的结合对于获得满足各种类型的存储器件的开关规范的期望的器件开关电流水平是非常有用的。 存储器件可以形成为可用于各种电子器件的大容量非易失性存储器集成电路的一部分。

公开(公告)号：US20130217238A1

公开(公告)日：2013-08-22

申请号：US13829290

申请日：2013-03-14

Applicant: Intermolecular, Inc.

Inventor： Thomas R. Boussie ,  Tony P. Chiang ,  Anh Duong ,  Zachary Fresco ,  Nitin Kumar ,  Chi-I Lang ,  Sandra G. Malhotra ,  Jinhong Tong

IPC: H01L21/02

CPC classification number: H01L21/02112 ,  H01L21/02123 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/76834 ,  H01L21/7685

Abstract: Methods for substrate processing are described. The methods include forming a material layer on a substrate. The methods include selecting constituents of a molecular masking layer (MML) to remove an effect of variations in the material layer as a result of substrate processing. The methods include normalizing the surface characteristics of the material layer by selectively depositing the MML on the material layer.

Abstract translation: 描述基板处理方法。 所述方法包括在基底上形成材料层。 所述方法包括选择分子屏蔽层（MML）的成分以消除作为衬底处理的结果的材料层中的变化的影响。 所述方法包括通过在材料层上选择性地沉积MML来使材料层的表面特性归一化。

公开(公告)号：US20130214808A1

公开(公告)日：2013-08-22

申请号：US13849749

申请日：2013-03-25

Applicant: Intermolecular, Inc.

Inventor： Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

IPC: G01R31/26

CPC classification number: G01R31/26 ,  G01N21/55 ,  G01R31/2607 ,  H02S50/10

Abstract: Measuring current-voltage (I-V) characteristics of a solar cell using a lamp that emits light, a substrate that includes a plurality of solar cells, a positive electrode attached to the solar cells, and a negative electrode peripherally deposited around each of the solar cells and connected to a common ground, an articulation platform coupled to the substrate, a multi-probe switching matrix or a Z-stage device, a programmable switch box coupled to the multi-probe switching matrix or Z-stage device and selectively articulating the probes by raising the probes until in contact with at least one of the positive electrode and the negative electrode and lowering the probes until contact is lost with at least one of the positive electrode and the negative electrode, a source meter coupled to the programmable switch box and measuring the I-V characteristics of the substrate.

Abstract translation: 使用发光灯的太阳能电池测量电流 - 电压（IV）特性，包括多个太阳能电池的基板，附着到太阳能电池的正电极和周围沉积在每个太阳能电池周围的负电极 并且连接到公共接地，耦合到衬底的关节式平台，多探针开关矩阵或Z级装置，耦合到多探针开关矩阵或Z级装置的可编程开关盒，并且选择性地将探针 通过将探针升高直到与正电极和负电极中的至少一个接触并且降低探针，直到与正电极和负电极中的至少一个接触而丢失，源计量器耦合到可编程开关盒和 测量衬底的IV特性。

公开(公告)号：US20130109149A1

公开(公告)日：2013-05-02

申请号：US13725574

申请日：2012-12-21

Applicant: Intermolecular Inc.

Inventor： Sean Barstow ,  Tony P. Chiang ,  Pragati KUMAR ,  Sandra G. Malhotra

IPC: H01L45/00

CPC classification number: H01L45/1625 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1641

Abstract: Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed from resistive-switching metal oxide layers. Metal oxide layers may be formed using sputter deposition at relatively low sputtering powers, relatively low duty cycles, and relatively high sputtering gas pressures. Dopants may be incorporated into a base oxide layer at an atomic concentration that is less than the solubility limit of the dopant in the base oxide. At least one oxidation state of the metal in the base oxide is preferably different than at least one oxidation sate of the dopant. The ionic radius of the dopant and the ionic radius of the metal may be selected to be close to each other. Annealing and oxidation operations may be performed on the resistive switching metal oxides. Bistable metal oxides with relatively large resistivities and large high-state-to-low state resistivity ratios may be produced.

Abstract translation: 提供具有电阻开关金属氧化物的非易失性存储元件。 非易失性存储元件可以由电阻式开关金属氧化物层形成。 金属氧化物层可以使用相对低的溅射功率，相对低的占空比和较高的溅射气体压力的溅射沉积形成。 掺杂剂可以以小于基底氧化物中的掺杂剂的溶解度极限的原子浓度结合到基底氧化物层中。 基底氧化物中金属的至少一种氧化态优选不同于掺杂剂的至少一种氧化态。 可以选择掺杂剂的离子半径和金属的离子半径彼此接近。 可以对电阻式开关金属氧化物进行退火和氧化操作。 可以制造具有相对较大的电阻率和大的高 - 低 - 电阻率比的双稳态金属氧化物。

公开(公告)号：US09397292B2

公开(公告)日：2016-07-19

申请号：US14505128

申请日：2014-10-02

Applicant: Intermolecular Inc.

Inventor： Pragati Kumar ,  Sean Barstow ,  Tony P. Chiang ,  Sunil Shanker

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1633 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

Abstract: Resistive switching nonvolatile memory elements are provided. A metal-containing layer and an oxide layer for a memory element can be heated using rapid thermal annealing techniques. During heating, the oxide layer may decompose and react with the metal-containing layer. Oxygen from the decomposing oxide layer may form a metal oxide with metal from the metal-containing layer. The resulting metal oxide may exhibit resistive switching for the resistive switching memory elements.

Abstract translation: 提供电阻式开关非易失性存储元件。 可以使用快速热退火技术来加热含金属层和用于存储元件的氧化物层。 在加热期间，氧化物层可能分解并与含金属层反应。 来自分解氧化物层的氧可以从含金属的层与金属形成金属氧化物。 所得到的金属氧化物可以表现出用于电阻式开关存储元件的电阻式开关。

公开(公告)号：US09362497B2

公开(公告)日：2016-06-07

申请号：US14595421

申请日：2015-01-13

Applicant: Intermolecular Inc.

Inventor： Pragati Kumar ,  Tony P. Chiang ,  Prashant B Phatak ,  Yun Wang

IPC: H01L45/00 ,  G11C13/00 ,  H01L27/24

CPC classification number: H01L45/146 ,  G11C13/0002 ,  G11C2013/0083 ,  G11C2213/51 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/1625 ,  H01L45/1641

Abstract: This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (ReRAM) approaches to provide a memory device with more predictable operation. In particular, the forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or an anneal in a reducing environment. One or more of these techniques may be applied, depending on the desired application and results.