Abstract:
The invention can provide apparatus and methods of processing a substrate in real-time using a Quasi-Neutral Beam (Q-NB) curing system to improve the etch resistance of photoresist layer. In addition, the improved photoresist layer can be used to more accurately control gate and/or spacer critical dimensions (CDs), to control gate and/or spacer CD uniformity, and to eliminate line edge roughness (LER) and line width roughness (LWR).
Abstract:
The invention provides a method of processing a wafer using Ion Energy (IE)-related multilayer process sequences and Ion Energy Controlled Multi-Input/Multi-Output (IEC-MIMO) models and libraries that can include one or more measurement procedures, one or more IEC-etch sequences, and one or more Ion Energy Optimized (IEO) etch procedures. The IEC-MIMO process control uses dynamically interacting behavioral modeling between multiple layers and/or multiple IEC etch sequences. The multiple layers and/or the multiple IEC etch sequence can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created using IEO etch procedures.
Abstract:
A plasma processing system includes a processing chamber, a substrate holder configured to hold a substrate for plasma processing, and a gas injection assembly. The gas injection assembly includes a first evacuation port located substantially in a center of the gas injection assembly and configured to evacuate gases from a central region of the substrate, and a gas injection system configured to inject gases in the process chamber. The plasma processing system also includes a second evacuation port configured to evacuate gases from a peripheral region surrounding the central region of the substrate.
Abstract:
The invention can provide apparatus and methods for processing substrates and/or wafers in real-time using at least one Direct Current (DC)/Radio Frequency (RF) Hybrid (DC/RFH) processing system and associated Direct Current/Radio Frequency Hybrid (DC/RFH) procedures and DC/RFH process parameters and/or DC/RFH models.
Abstract:
The invention provides a method of processing a substrate using multilayer processing sequences and Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models and libraries that can include one or more masking layer creation procedures, one or more pre-processing measurement procedures, one or more Partial-Etch (P-E) procedures, one or more Final-Etch (F-E) procedures, and one or more post-processing measurement procedures.
Abstract:
The invention can provide a method of etch processing a wafer using a Real-Time Parameter Tuning (RTPT) procedure to receive an input message that can include a pass-through message, a real-time feedforward message, or a real-time optimization message, or any combination thereof. The RTPT procedures can use real-time wafer data to create, modify, and/or use etch recipe data, etch profile data, and/or etch model data. In addition, RTPT procedures can use real-time wafer data to create, modify, and/or use process recipe data, process profile data, and/or process model data.
Abstract:
Method and system for producing a neutral beam source is described. The neutral beam source comprises a plasma generation system for forming a first plasma in a first plasma region, a plasma heating system for heating electrons from the first plasma region in a second plasma region to form a second plasma, and a neutralizer grid for neutralizing ion species from the second plasma in the second plasma region. Furthermore, the neutral beam source comprises an electron acceleration member configured to accelerate the electrons from the first plasma region into the second plasma region. Further yet, the neutral beam source comprises a pumping system that enables use of the neutral beam source for semiconductor processing applications, such as etching processes.
Abstract:
The invention can provide a method of processing a substrate using Gate-Optimization processing sequences and evaluation libraries that can include gate-etch procedures, COR-etch procedures, and evaluation procedures.
Abstract:
The invention provides a method of processing a substrate using multilayer processing sequences and Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models and libraries that can include one or more masking layer creation procedures, one or more pre-processing measurement procedures, one or more Partial-Etch (P-E) procedures, one or more Final-Etch (F-E) procedures, and one or more post-processing measurement procedures.
Abstract:
A method for facilitating an ODP (optical digital profile) measurement of a semiconductor wafer. The method includes obtaining real time wafer characteristic data for a measurement site on the wafer and detecting a measured diffraction signal from a structure within the measurement site of the wafer. The measured diffraction signal is matched with a simulated diffraction signal stored in a wafer characteristic dependent profile library. A hypothetical profile structure associated with the simulated diffraction signal in the wafer characteristic dependent profile library is then identified. The real time wafer characteristic data is used to facilitate at least one of the matching and identifying. The real time wafer characteristic data may be real time wafer thickness data.