URSP RULE REUSING PDN LEGGED MA PDU SESSION HANDLING

    公开(公告)号:US20240154871A1

    公开(公告)日:2024-05-09

    申请号:US18496903

    申请日:2023-10-29

    Applicant: MEDIATEK INC.

    CPC classification number: H04L41/0893 H04L67/147 H04W28/18

    Abstract: A method for UE route selection policy (URSP) rule matching enhancement for MA PDU session with 4G PDN leg is proposed. When an application is executed, the upper layer of a UE sends the application information to URSP entity for matching a URSP rule. The UE selects and evaluates a route selection descriptor (RSD) from a list of RSDs of a selected URSP rule to be matched with a PDU session. In one example, the PDU session is an MA PDU session with a 3GPP EPS/PDN leg (PDN connection established as user plane resources of the MA PDU session). The UE finds the traffic descriptor in a selected URSP rule matching the application and an existing MA PDU session/PDN connection matching an RSD of the selected URSP rule, when the UE-requested PDN parameters of the PDN connection matches with the RSD of the selected URSP rule.

    SMART THERMAL THROTTLING IN MILLIMETER WAVE (MMW)

    公开(公告)号:US20240147376A1

    公开(公告)日:2024-05-02

    申请号:US18473023

    申请日:2023-09-22

    Applicant: MEDIATEK INC.

    CPC classification number: H04W52/0245 H04W24/02 H04W52/0274

    Abstract: Apparatus and methods are provided for thermal throttling for UE configured with multi-panel transceiving on FR2. In one novel aspect, the UE prioritizes throttling actions based on signal qualities of each transceiving panel. In one embodiment, the switching to the target panel from the active panel is selected as the highest priority throttling action when the signal quality of the target panel is similar to the active panel. In another embodiment, the UE further determines if the quality of the target panel is sufficient to support mmW transceiving before switching to the target panel. In one embodiment, the UE reduces one or more antennae of an active panel when the signal quality difference between the active panel and the target panel is bigger than a predefined gap threshold.

    CHO AND HO TIMING COLLISION
    118.
    发明公开

    公开(公告)号:US20240137831A1

    公开(公告)日:2024-04-25

    申请号:US18376463

    申请日:2023-10-03

    Applicant: MEDIATEK INC.

    Inventor: TSUNG-MING LEE

    CPC classification number: H04W36/362 H04W36/06

    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The UE receives, from a source cell, a conditional handover (CHO) command configuring the UE to perform a CHO procedure to handover to a target cell in response to satisfying a CHO condition. The UE receives, from the source cell after receiving the CHO command, a handover (HO) command configuring the UE to perform a HO procedure to handover to the target cell. The UE determines whether the UE has started the CHO procedure prior to receiving the HO command. The UE, in response to determining that the UE has started the CHO procedure prior to receiving the HO command, discards the HO command and continues with the CHO procedure.

    BIPOLAR JUNCTION TRANSISTOR (BJT) STRUCTURE
    120.
    发明公开

    公开(公告)号:US20240128262A1

    公开(公告)日:2024-04-18

    申请号:US18460839

    申请日:2023-09-05

    Applicant: MEDIATEK INC.

    CPC classification number: H01L27/082 H01L27/0823

    Abstract: Bipolar junction transistor (BJT) structures are provided. First and second well regions are formed over a dielectric layer. A plurality of first and second gate-all-around (GAA) field-effect transistors are formed over a first well region. A plurality of third GAA field-effect transistors are formed over the second well region. Source/drain features of the first and third GAA field-effect transistors and the second well region have a first conductivity type. Source/drain features of the second GAA field-effect transistors and the first well region have a second conductivity type that is different from the first conductivity type. A first PN junction of a first BJT device is formed between the source/drain features of the first GAA field-effect transistors and the first well region, and a second PN junction of the first BJT device is formed between the first well region and the second well region.

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