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    Light-weight cache coherence for data processors with limited data sharing
    111.
    发明授权
    Light-weight cache coherence for data processors with limited data sharing 有权

    公开(公告)号：US10042762B2

    公开(公告)日：2018-08-07

    申请号：US15264804

    申请日：2016-09-14

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Nuwan Jayasena ,  Michael Boyer

    IPC: G06F12/08 ,  G06F12/0811 ,  G06F12/0815

    Abstract: A data processing system includes a plurality of processors, local memories associated with a corresponding processor, and at least one inter-processor link. In response to a first processor performing a load or store operation on an address of a corresponding local memory that is not currently in the local cache, a local cache allocates a first cache line and encodes a local state with the first cache line. In response to a load operation from an address of a remote memory that is not currently in the local cache, the local cache allocates a second cache line and encodes a remote state with the second cache line. The first processor performs subsequent loads and stores on the first cache line in the local cache in response to the local state, and subsequent loads from the second cache line in the local cache in response to the remote state.

    Controlling sprinting for thermal capacity boosted systems
    114.
    发明授权
    Controlling sprinting for thermal capacity boosted systems 有权
    控制用于热容量提升系统的冲刺

    公开(公告)号：US09213585B2

    公开(公告)日：2015-12-15

    申请号：US13925269

    申请日：2013-06-24

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Manish Arora ,  Nuwan Jayasena ,  Michael Schulte

    IPC: G06F9/46 ,  G06F15/00 ,  G06F9/50 ,  G06F1/20 ,  G06F1/32 ,  G06F9/30

    CPC classification number: G06F9/5094 ,  G06F1/206 ,  G06F1/324 ,  G06F9/30189 ,  G06F9/5011 ,  Y02D10/126 ,  Y02D10/22

    Abstract: A method and apparatus are described for performing sprinting in a processor. An analyzer in the processor may monitor thermal capacity remaining in the processor while not sprinting. When the remaining thermal capacity is sufficient to support sprinting, the analyzer may perform sprinting of a new workload when a benefit derived by sprinting the new workload exceeds a threshold and does not cause the remaining thermal capacity in the processor to be exhausted. The analyzer may perform sprinting of the new workload in accordance with sprinting parameters determined for the new workload. The analyzer may continue to monitor the remaining thermal capacity while not sprinting when the benefit derived by sprinting the new workload does not exceed the threshold.

    Abstract translation: 描述了用于在处理器中执行冲刺的方法和装置。 处理器中的分析仪可以监控处理器中剩余的热量，而不会冲击。 当剩余的热容量足以支持冲刺时，当通过冲击新工作负载导致的好处超过阈值并且不会导致处理器中的剩余热容量被耗尽时，分析器可以执行新工作负载的冲刺。 分析器可以根据为新工作负载确定的冲刺参数执行新工作负载的冲刺。 当通过冲击新工作负载得到的好处不超过阈值时，分析仪可以继续监视剩余热容量而不冲刺。

    CONTROLLING SPRINTING FOR THERMAL CAPACITY BOOSTED SYSTEMS
    115.
    发明申请
    CONTROLLING SPRINTING FOR THERMAL CAPACITY BOOSTED SYSTEMS 有权
    控制用于热能增强系统的弹簧

    公开(公告)号：US20140380329A1

    公开(公告)日：2014-12-25

    申请号：US13925269

    申请日：2013-06-24

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Manish Arora ,  Nuwan Jayasena ,  Michael Schulte

    IPC: G06F9/50

    CPC classification number: G06F9/5094 ,  G06F1/206 ,  G06F1/324 ,  G06F9/30189 ,  G06F9/5011 ,  Y02D10/126 ,  Y02D10/22

    Abstract: A method and apparatus are described for performing sprinting in a processor. An analyzer in the processor may monitor thermal capacity remaining in the processor while not sprinting. When the remaining thermal capacity is sufficient to support sprinting, the analyzer may perform sprinting of a new workload when a benefit derived by sprinting the new workload exceeds a threshold and does not cause the remaining thermal capacity in the processor to be exhausted. The analyzer may perform sprinting of the new workload in accordance with sprinting parameters determined for the new workload. The analyzer may continue to monitor the remaining thermal capacity while not sprinting when the benefit derived by sprinting the new workload does not exceed the threshold.

    Abstract translation: 描述了用于在处理器中执行冲刺的方法和装置。 处理器中的分析仪可以监控处理器中剩余的热量，而不会冲击。 当剩余的热容量足以支持冲刺时，当通过冲击新工作负载导致的好处超过阈值并且不会导致处理器中的剩余热容量被耗尽时，分析器可以执行新工作负载的冲刺。 分析器可以根据为新工作负载确定的冲刺参数执行新工作负载的冲刺。 当通过冲击新工作负载得到的好处不超过阈值时，分析仪可以继续监视剩余热容量而不冲刺。

    REDUCING MEMORY ACCESS TIME IN PARALLEL PROCESSORS
    116.
    发明申请
    REDUCING MEMORY ACCESS TIME IN PARALLEL PROCESSORS 审中-公开
    减少平行处理程序中的存储访问时间

    公开(公告)号：US20140173225A1

    公开(公告)日：2014-06-19

    申请号：US13719710

    申请日：2012-12-19

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Niladrish Chatterjee ,  James O'Connor ,  Gabriel Loh ,  Nuwan Jayasena

    IPC: G06F12/00

    CPC classification number: G06F9/3887 ,  G06F9/3824

    Abstract: Apparatus, computer readable medium, and method of servicing memory requests are presented. A first plurality of memory requests are associated together, wherein each of the first plurality of memory requests is generated by a corresponding one of a first plurality of processors, and wherein each of the first plurality of processors is executing a first same instruction. A second plurality of memory requests are associated together, wherein each of the second plurality of memory requests is generated by a corresponding one of a second plurality of processors, and wherein each of the second plurality of processors is executing a second same instruction. A determination is made to service the first plurality of memory requests before the second plurality of memory requests and the first plurality of memory requests is serviced before the second plurality of memory requests.

    Abstract translation: 提供了设备，计算机可读介质和服务存储器请求的方法。 第一多个存储器请求被关联在一起，其中第一多个存储器请求中的每一个由第一多个处理器中的对应的一个处理器生成，并且其中第一多个处理器中的每一个正在执行第一个相同的指令。 第二多个存储器请求被关联在一起，其中第二多个存储器请求中的每一个由第二多个处理器中的对应的一个处理器生成，并且其中第二多个处理器中的每一个正在执行第二个相同的指令。 确定在第二多个存储器请求之前服务第一多个存储器请求，并且在第二多个存储器请求之前服务第一多个存储器请求。

    Tracking Non-Native Content in Caches
    117.
    发明申请
    Tracking Non-Native Content in Caches 审中-公开
    跟踪缓存中的非本地内容

    公开(公告)号：US20140156941A1

    公开(公告)日：2014-06-05

    申请号：US13691375

    申请日：2012-11-30

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Gabriel H. Loh ,  Mithuna S. Thottehodi ,  Yasuko Eckert ,  James M. O'Connor ,  Mauricio Breternitz ,  Bradford M. Beckmann ,  Nuwan Jayasena

    IPC: G06F12/08

    CPC classification number: G06F12/0895 ,  G06F1/3275 ,  G06F12/0811 ,  G06F12/0846 ,  G06F12/126 ,  G06F2212/1016 ,  G06F2212/1028 ,  G06F2212/502 ,  Y02D10/124 ,  Y02D10/13 ,  Y02D10/14

    Abstract: The described embodiments include a cache with a plurality of banks that includes a cache controller. In these embodiments, the cache controller determines a value representing non-native cache blocks stored in at least one bank in the cache, wherein a cache block is non-native to a bank when a home for the cache block is in a predetermined location relative to the bank. Then, based on the value representing non-native cache blocks stored in the at least one bank, the cache controller determines at least one bank in the cache to be transitioned from a first power mode to a second power mode. Next, the cache controller transitions the determined at least one bank in the cache from the first power mode to the second power mode.

    Abstract translation: 所描述的实施例包括具有包括高速缓存控制器的多个存储体的高速缓存。 在这些实施例中，高速缓存控制器确定表示存储在高速缓存中的至少一个存储区中的非本机高速缓存块的值，其中当高速缓存块的归属位于相对于预定位置时，高速缓存块对于存储体是非本地的 去银行。 然后，高速缓存控制器基于代表存储在至少一个存储体中的非本地高速缓存块的值，确定高速缓存中的至少一个存储体将从第一功率模式转换到第二功率模式。 接下来，高速缓存控制器将所确定的高速缓存中的至少一个存储体从第一功率模式转换到第二功率模式。

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