Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof
    113.
    发明授权
    Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof 有权
    亚光刻接触结构,具有优化的加热器形状的相变存储单元及其制造方法

    公开(公告)号:US06972430B2

    公开(公告)日:2005-12-06

    申请号:US10371154

    申请日:2003-02-20

    IPC分类号: G11C11/56 H01L27/24 H01L45/00

    摘要: An electronic semiconductor device has a sublithographic contact area between a first conductive region and a second conductive region. The first conductive region is cup-shaped and has vertical walls which extend, in top plan view, along a closed line of elongated shape. One of the walls of the first conductive region forms a first thin portion and has a first dimension in a first direction. The second conductive region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first and the second conductive regions are in direct electrical contact at their thin portions and form the sublithographic contact area. The elongated shape is chosen between rectangular and oval elongated in the first direction. Thereby, the dimensions of the contact area remain approximately constant even in presence of a small misalignment between the masks defining the conductive regions.

    摘要翻译: 电子半导体器件具有在第一导电区域和第二导电区域之间的亚光刻接触面积。 第一导电区域是杯状的并且具有垂直壁,其在顶部平面图中沿着细长形状的封闭线延伸。 第一导电区域的一个壁形成第一薄部分并且具有在第一方向上的第一尺寸。 第二导电区域具有第二薄部分,该第二薄部分具有横向于第一尺寸的第二方向的第二亚光刻尺寸。 第一和第二导电区域在其薄部分处直接电接触并形成亚光刻接触区域。 细长形状选择在第一方向上伸长的矩形和椭圆形之间。 因此,即使在限定导电区域的掩模之间存在小的不对准的情况下,接触区域的尺寸也保持近似恒定。

    Phase change memory cell and manufacturing method thereof using minitrenches
    114.
    发明授权
    Phase change memory cell and manufacturing method thereof using minitrenches 有权
    相变存储单元及其制造方法

    公开(公告)号:US06891747B2

    公开(公告)日:2005-05-10

    申请号:US10372761

    申请日:2003-02-20

    摘要: The phase change memory cell is formed by a resistive element and by a memory region of a phase change material. The resistive element has a first thin portion having a first sublithographic dimension in a first direction; and the memory region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first thin portion and the second thin portion are in direct electrical contact and define a contact area of sublithographic extension. The second thin portion is delimited laterally by oxide spacer portions surrounded by a mold layer which defines a lithographic opening. The spacer portions are formed after forming the lithographic opening, by a spacer formation technique.

    摘要翻译: 相变存储单元由电阻元件和相变材料的存储区形成。 电阻元件具有在第一方向上具有第一亚光刻尺寸的第一薄部分; 并且所述存储区域具有第二薄部分,所述第二薄部分具有横向于所述第一尺寸的第二方向的第二亚光刻尺寸。 第一薄部分和第二薄部分直接电接触并限定亚光刻延伸部分的接触面积。 第二薄部分被由限定光刻开口的模具层围绕的氧化物间隔部分侧向限定。 通过间隔物形成技术在形成光刻开口之后形成间隔部分。

    Array Of Cross Point Memory Cells And Methods Of Forming An Array Of Cross Point Memory Cells
    117.
    发明申请
    Array Of Cross Point Memory Cells And Methods Of Forming An Array Of Cross Point Memory Cells 有权
    交叉点存储单元阵列和形成数组交叉点存储单元的方法

    公开(公告)号:US20150349255A1

    公开(公告)日:2015-12-03

    申请号:US14293577

    申请日:2014-06-02

    IPC分类号: H01L45/00 H01L27/24

    摘要: An array of cross point memory cells comprises spaced elevationally inner first lines, spaced elevationally outer second lines which cross the first lines, and a multi-resistive state region elevationally between the first and second lines where such cross. Individual of the multi-resistive state regions comprise elevationally outer multi-resistive state material and elevationally inner multi-resistive state material that are electrically coupled to one another. The inner multi-resistive state material has opposing edges in a vertical cross-section. The outer multi-resistive state material has opposing edges in the vertical cross-section that are laterally offset relative to the opposing edges of the inner multi-resistive state material in the vertical cross-section. Methods are also disclosed.

    摘要翻译: 交叉点存储单元的阵列包括间隔开的内部第一线,与第一线交叉的间隔开的外部第二直线,以及在第一和第二线之间的高阻状态区域,这样的交叉。 多电阻状态区域的个体包括彼此电耦合的高度外部的多重电阻状态材料和正向内部多电阻状态材料。 内部多阻态材料具有垂直横截面中的相对边缘。 外部多阻态材料在垂直横截面中具有相对于内部多阻态材料的相对边缘在垂直横截面中横向偏移的相对边缘。 还公开了方法。

    Semiconductor constructions, memory cells, memory arrays and methods of forming memory cells
    119.
    发明授权
    Semiconductor constructions, memory cells, memory arrays and methods of forming memory cells 有权
    半导体结构,存储器单元,存储器阵列和形成存储器单元的方法

    公开(公告)号:US08853665B2

    公开(公告)日:2014-10-07

    申请号:US13551975

    申请日:2012-07-18

    IPC分类号: H01L47/00

    摘要: Some embodiments include a construction having oxygen-sensitive structures directly over spaced-apart nodes. Each oxygen-sensitive structure includes an angled plate having a horizontal portion along a top surface of a node and a non-horizontal portion extending upwardly from the horizontal portion. Each angled plate has an interior sidewall where an inside corner is formed between the non-horizontal portion and the horizontal portion, an exterior sidewall in opposing relation to the interior sidewall, and lateral edges. Bitlines are over the oxygen-sensitive structures, and have sidewalls extending upwardly from the lateral edges of the oxygen-sensitive structures. A non-oxygen-containing structure is along the interior sidewalls, along the exterior sidewalls, along the lateral edges, over the bitlines, and along the sidewalls of the bitlines. Some embodiments include memory arrays, and methods of forming memory cells.

    摘要翻译: 一些实施例包括直接在间隔开的节点上的具有氧敏感结构的结构。 每个氧敏感结构包括具有沿节点顶表面的水平部分和从水平部分向上延伸的非水平部分的倾斜板。 每个倾斜板具有内侧壁,其中在非水平部分和水平部分之间形成内角,与侧壁相对的外侧壁和侧边缘。 位线在氧敏感结构之上,并且具有从氧敏感结构的侧边缘向上延伸的侧壁。 非含氧结构沿着内侧壁,沿着外侧壁沿着横向边缘,位线以及沿着位线的侧壁沿着内侧。 一些实施例包括存储器阵列和形成存储器单元的方法。

    Memory arrays and methods of forming same
    120.
    发明授权
    Memory arrays and methods of forming same 有权
    存储阵列及其形成方法

    公开(公告)号:US08728940B2

    公开(公告)日:2014-05-20

    申请号:US13358882

    申请日:2012-01-26

    IPC分类号: H01L21/302

    摘要: Memory arrays and methods of forming the same are provided. One example method of forming a memory array can include forming a first conductive material having a looped feature using a self-aligning multiple patterning technique, and forming a first sealing material over the looped feature. A first chop mask material is formed over the first sealing material. The looped feature and the first sealing material are removed outside the first chop mask material.

    摘要翻译: 提供了存储器阵列及其形成方法。 形成存储器阵列的一个示例性方法可以包括使用自对准多图案化技术形成具有环形特征的第一导电材料,以及在环形特征上形成第一密封材料。 在第一密封材料上方形成第一剁掩模材料。 环状特征和第一密封材料在第一剁掩模材料外移除。