公开(公告)号：US06649495B2

公开(公告)日：2003-11-18

申请号：US10164709

申请日：2002-06-10

Applicant: Yoshimi Shioya ,  Yuhko Nishimoto ,  Tomomi Suzuki ,  Hiroshi Ikakura ,  Kazuo Maeda

Inventor： Yoshimi Shioya ,  Yuhko Nishimoto ,  Tomomi Suzuki ,  Hiroshi Ikakura ,  Kazuo Maeda

IPC: H01L2120

CPC classification number: H01L21/76834 ,  C23C16/0272 ,  C23C16/401 ,  C23C16/5096 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/76801 ,  H01L21/76807 ,  H01L2221/1036

Abstract: The present invention relates to a manufacturing method of a semiconductor device in which a barrier insulating film and a main insulating film having low relative dielectric constant are sequentially formed while a wiring mainly consisting of copper film is coated. Its constitution includes the steps of: forming the barrier insulating film 35a on a substrate 21 subject to deposition, in which an electric power having a first frequency (f1) is applied to a first film forming gas containing at least silicon-containing gas and oxygen-containing gas to transform said first film forming gas into plasma and to cause reaction; and forming the main insulating film 35b having low relative dielectric constant on the barrier insulating film 35a, in which an electric power having a second frequency (f2) higher than the first frequency (f1) is applied to a second film forming gas containing at least the silicon-containing gas and the oxygen-containing gas to transform the second film forming gas into plasma and to cause reaction.

Abstract translation: 半导体器件的制造方法技术领域本发明涉及一种半导体器件的制造方法，其中，在主要由铜膜构成的布线被涂覆的同时依次形成具有低相对介电常数的阻挡绝缘膜和主绝缘膜。 其结构包括以下步骤：在沉积的基板21上形成阻挡绝缘膜35a，其中具有第一频率（f1）的电力施加到至少含有含硅气体和氧气的第一成膜气体 以将所述第一成膜气体转化为等离子体并引起反应; 并且在隔离绝缘膜35a上形成具有低相对介电常数的主绝缘膜35b，其中具有比第一频率（f1）高的第二频率（f2）的电力施加到至少包含至少 含硅气体和含氧气体，以将第二成膜气体转化为等离子体并引起反应。

公开(公告)号：US06514855B1

公开(公告)日：2003-02-04

申请号：US09547852

申请日：2000-04-12

Applicant: Tomomi Suzuki ,  Hiroshi Ikakura ,  Kazuo Maeda ,  Yoshimi Shioya ,  Koichi Ohira

Inventor： Tomomi Suzuki ,  Hiroshi Ikakura ,  Kazuo Maeda ,  Yoshimi Shioya ,  Koichi Ohira

IPC: H01L214763

CPC classification number: H01L21/02063 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02321 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/02362 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/312 ,  H01L21/3145 ,  H01L21/31633 ,  H01L21/3185 ,  H01L21/76801 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76834

Abstract: The present invention relates to a semiconductor device manufacturing method for forming a via hole or a contact hole in an interlayer insulating film with a low dielectric constant. The method includes the steps of forming a nitrogen containing insulating film on a substrate, forming a porous insulating film on the nitrogen-containing insulating film, forming an opening in the underlying insulating film and the porous insulating film, and forming a nitrogen containing insulating film on the surface of the porous insulating film and on the surface of the opening by bringing these surfaces into contact with a plasma of any one of an ammonia gas, a nitrogen gas, and an oxygen nitride gas.

Abstract translation: 本发明涉及在具有低介电常数的层间绝缘膜中形成通孔或接触孔的半导体器件制造方法。 该方法包括在基板上形成含氮绝缘膜的步骤，在含氮绝缘膜上形成多孔绝缘膜，在下面的绝缘膜和多孔绝缘膜上形成开口，并形成含氮绝缘膜 通过使这些表面与氨气，氮气和氮氧化物气体中的任一种的等离子体接触，在多孔绝缘膜的表面上和开口的表面上。

公开(公告)号：US06479408B2

公开(公告)日：2002-11-12

申请号：US09843725

申请日：2001-04-30

Applicant: Yoshimi Shioya ,  Kouichi Ohira ,  Kazuo Maeda

Inventor： Yoshimi Shioya ,  Kouichi Ohira ,  Kazuo Maeda

IPC: H01L2131

CPC classification number: H01L21/02126 ,  C23C16/30 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/3122 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76838

Abstract: The present invention relates to a semiconductor device manufacturing method for forming an interlayer insulating film having a low dielectric constant by coating a copper wiring. The semiconductor device manufacturing method comprises the steps of preparing a substrate 21 from a surface of which copper wirings 23 are exposed, and forming an interlayer insulating film having a low dielectric constant on the substrate 21, wherein the interlayer insulating film is formed of a multi-layered insulating film including a insulating film 24 that contacts with the copper wirings 23, and the insulating film 24 is formed by plasmanizing a film forming gas containing an alkyl compound having an Si—O—Si bond and one oxygen-containing gas selected from the group consisting of N2O, H2O, and CO2, whose flow rate is equal to or less than a flow rate of the siloxane, to react mutually.

Abstract translation: 本发明涉及通过涂覆铜布线形成具有低介电常数的层间绝缘膜的半导体器件制造方法。 半导体器件制造方法包括从衬底21暴露的表面制备衬底21，并且在衬底21上形成具有低介电常数的层间绝缘膜的步骤，其中层间绝缘膜由多 包括与铜布线23接触的绝缘膜24的绝缘膜，绝缘膜24通过将含有具有Si-O-Si键的烷基化合物和一种含氧气体的成膜气体等离子化而形成，该含氧气体选自 由流动相等于或小于硅氧烷流量的N2O，H2O和CO2组成的组相互反应。

公开(公告)号：US06432839B1

公开(公告)日：2002-08-13

申请号：US09804142

申请日：2001-03-13

Applicant: Kazuo Maeda ,  Noboru Tokumasu ,  Yuki Ishii ,  Toshiro Nishiyama

Inventor： Kazuo Maeda ,  Noboru Tokumasu ,  Yuki Ishii ,  Toshiro Nishiyama

IPC: H01L2131

Abstract: The invention is a method for forming a flattened interlayer insulating film covering a wiring layer or the like of a semiconductor IC device, and a method of manufacturing a semiconductor device. The film-forming method includes the steps of preparing a deposition gas containing an inert gas, and a silicon and phosphorus-containing compound having III valance phosphorus in which at least one oxygen is bonded to the phosphorous, and forming a silicon containing insulating film containing P2O3 on a substrate by using the deposition gas.

公开(公告)号：US06221755B1

公开(公告)日：2001-04-24

申请号：US09358399

申请日：1999-07-22

Applicant: Noboru Tokumasu ,  Kazuo Maeda

Inventor： Noboru Tokumasu ,  Kazuo Maeda

IPC: H01L214763

CPC classification number: H01L21/02129 ,  C23C16/401 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/31625

Abstract: Disclosed is a film formation method of an interlayer insulating film which is flattened to cover a wiring layer of a semiconductor integrated circuit device, in which a film-forming gas is activated by converting the film-forming gas into a plasma, the film-forming gas being composed of either a mixed gas containing a phosphorus-containing compound containing trivalent phosphorus, which takes a Si—O—P structure, and a silicon-containing compound containing at most one oxygen atom or an additional mixed gas prepared by adding an oxidative gas to said mixed gas; and a silicon-containing insulating film containing P2O5 is formed on a substrate.

Abstract translation: 公开了一种层间绝缘膜的成膜方法，该层间绝缘膜被平坦化以覆盖半导体集成电路器件的布线层，其中成膜气体通过将成膜气体转化成等离子体来激活成膜气体，成膜 气体由含有含有三价磷的含磷化合物的混合气体构成，其具有Si-OP结构，以及含有至多一个氧原子的含硅化合物或通过将氧化性气体加成而制备的附加混合气体 说混合气 并且在基板上形成含有P 2 O 5的含硅绝缘膜。

公开(公告)号：US6084352A

公开(公告)日：2000-07-04

申请号：US37074

申请日：1998-03-09

Applicant: Tomoyuki Seki ,  Kazuo Maeda ,  Hiroshi Sugimoto ,  Akira Mii

Inventor： Tomoyuki Seki ,  Kazuo Maeda ,  Hiroshi Sugimoto ,  Akira Mii

IPC: H01J61/52 ,  H01J61/35 ,  H01J61/36 ,  H01K1/32 ,  H01K1/38 ,  H01K1/40 ,  H01K1/58

CPC classification number: H01J61/35 ,  H01J61/36 ,  H01K1/32 ,  H01K1/40

Abstract: A lamp for a halogen lamp a single-tube, high-intensity discharge lamp, a double-tube high-intensity discharge lamp having an outer housing formed of quartz, and the like, being characterized in that a film having desirable heat conductivity and emissivity is formed on the surface of each sealing portion thereof, whereby the temperature at the distal end of the molybdenum foil in the sealing portion away from the center of the bulb can be kept at about 350.degree. C. or less while the lamp is burning.

Abstract translation: 一种用于卤素灯的灯，单管高强度放电灯，具有由石英形成的外壳的双管高强度放电灯等，其特征在于具有期望的导热性和发射率的膜 形成在其每个密封部分的表面上，从而当灯泡燃烧时，远离灯泡中心的密封部分中钼箔远端的温度可保持在约350℃或更低。

公开(公告)号：US5661780A

公开(公告)日：1997-08-26

申请号：US561253

申请日：1995-11-21

Applicant: Munekatsu Yamamoto ,  Masaru Akiyama ,  Kazuo Maeda

Inventor： Munekatsu Yamamoto ,  Masaru Akiyama ,  Kazuo Maeda

IPC: H04M1/00 ,  H04B7/26 ,  H04M1/725 ,  H04M1/73 ,  H04M19/08 ,  H04Q7/00

CPC classification number: H04M1/72502 ,  H04M1/73

Abstract: A cordless telephone can include a base unit including a cordless telephone circuit, a power source circuit and a resistor connected between a pair of power output terminals of the power source circuit, and a handset unit including a cordless telephone circuit, a secondary battery, a circuit connected between a charging terminal which receives power supply output from the power source circuit and a terminal of the secondary battery and consisting of a diode and a resistor connected in parallel to each other and a power break detection circuit. The secondary battery is usually charged by power supply from the power source circuit via the charging terminal and diode when the handset unit is placed in a cradle of the base unit, and electric power is supplied from the secondary battery to the cordless telephone circuit in the handset unit to operate in intermittent reception mode. When a break in power occurs at the base unit, the voltage at the charging terminal is dropped to a voltage level obtained by dividing the charged voltage at the secondary battery with two resistances which is lower than a reference voltage. Accordingly, the power break detection circuit outputs a power break detection signal having a low logic level to enter the handset unit in sleep mode.

Abstract translation: 无绳电话可以包括基本单元，其包括无绳电话电路​​，电源电路和连接在电源电路的一对电源输出端子之间的电阻器，以及包括无绳电话电路​​，二次电池， 连接在接收从电源电路输出的电源的充电端子和二次电池的端子之间并且由二极管和彼此并联的电阻组成的充电端子和断电检测电路。 当手机单元放置在基座的支架中时，二次电池通常通过充电端子和二极管从电源电路供电，并且从二次电池向无绳电话电路​​供电 手机单元在间歇接收模式下工作。 当在基本单元处发生功率中断时，充电端子处的电压下降到通过用低于参考电压的两个电阻除以二次电池的充电电压而获得的电压电平。 因此，功率中断检测电路输出具有低逻辑电平的功率中断检测信号，以在睡眠模式下进入手机单元。

公开(公告)号：US5589001A

公开(公告)日：1996-12-31

申请号：US159127

申请日：1993-11-30

Applicant: Kazuo Maeda ,  Kouichi Ohira ,  Hiroshi Chino

Inventor： Kazuo Maeda ,  Kouichi Ohira ,  Hiroshi Chino

IPC: H01L21/205 ,  C23C16/44 ,  C23C16/458 ,  H01L21/00 ,  H01L21/304 ,  C23C16/00

CPC classification number: H01L21/67115 ,  C23C16/4407 ,  C23C16/4584

Abstract: An apparatus for forming a film by the CVD method allows reaction products to be easily removed from a gas discharge surface without decreasing the uptime/downtime ratio, and includes a gas distributor having a gas discharge surface for discharge of a reaction gas for forming a film on a substrate. A wafer holder has a wafer mounting surface facing the gas discharge surface. A cleaner has a suction head and a brush formed at the entrance of the suction head. A rotary shaft supports the cleaner for movement between the gas discharge surface and a stand-by position and brings the brush of the cleaner onto the gas discharge surface. A vertical positioner moves the wafer holder or gas distributor upward or downward, whereby the wafer holder approaches the gas discharge surface for forming a film and is spaced from the gas discharge surface when cleaning the gas discharge surface by movement of the cleaner on the gas discharge surface.

Abstract translation: 通过CVD法形成膜的装置允许反应产物容易地从气体放电表面除去而不减少正常运行时间/停机时间比，并且包括具有用于排出形成膜的反应气体的气体放电表面的气体分配器 在基板上。 晶片保持器具有面向气体排出表面的晶片安装表面。 吸尘器在吸头的入口处形成有吸头和刷子。 旋转轴支撑清洁器，用于在排气表面和待机位置之间移动，并将清洁器的刷子带到排气表面上。 垂直定位器向上或向下移动晶片保持器或气体分配器，由此晶片保持器靠近气体排出表面以形成膜，并且通过清洁器在气体放电上的移动来清洁气体排出表面时与气体排出表面间隔开 表面。

公开(公告)号：US5569499A

公开(公告)日：1996-10-29

申请号：US331736

申请日：1994-10-31

Applicant: Kazuo Maeda ,  Noboru Tokumasu ,  Yoshiaki Yuyama

Inventor： Kazuo Maeda ,  Noboru Tokumasu ,  Yoshiaki Yuyama

IPC: H01L21/31 ,  C23C16/40 ,  C23D13/00 ,  H01L21/316 ,  H01L21/768 ,  H05H1/00 ,  C23C16/00 ,  H05H1/24

CPC classification number: H01L21/76826 ,  C23C16/401 ,  C23D13/00 ,  H01L21/76801

Abstract: A method for reforming an insulating film such as a BSG film formed by a CVD technique. The method reduces the parasitic capacitance between conductor layers having an intervening film, especially a BSG film, and includes the steps of depositing a BSG film on a substrate from a gaseous source and exposing the BSG film to a reforming gas plasma.

Abstract translation: 一种用CVD法形成的BSG膜等绝缘膜的重整方法。 该方法减小了具有中间膜，特别是BSG膜的导体层之间的寄生电容，并且包括以下步骤：将BSG膜从气态源沉积在衬底上，并将BSG膜暴露于重整气体等离子体。

公开(公告)号：US5532193A

公开(公告)日：1996-07-02

申请号：US331737

申请日：1994-10-31

Applicant: Kazuo Maeda ,  Noboru Tokumasu ,  Yoshiaki Yuyama

Inventor： Kazuo Maeda ,  Noboru Tokumasu ,  Yoshiaki Yuyama

IPC: H01L21/205 ,  C03C3/089 ,  C23C16/40 ,  H01L21/31 ,  H01L21/316 ,  H01L21/02

CPC classification number: H01L21/02129 ,  C03C3/089 ,  C23C16/401 ,  H01L21/02216 ,  H01L21/02271 ,  H01L21/31625

Abstract: The invention relates to a method for forming a BSG film by means of chemical vapor deposition, has an object which is to provide a film forming method making it possible to obtain a BSG film of high denseness and of low hygroscopicity even immediately after the film has been formed at a low temperature, and comprises a process of forming a borosilicate glass film (BSG film) on a substrate using a mixed gas of an organometallic compound having Si--O--B bond and ozone (O.sub.3).

Abstract translation: 本发明涉及一种通过化学气相沉积法形成BSG膜的方法，其目的是提供一种成膜方法，使得可以在薄膜具有即使在即将到来之后立即获得高致密度和低吸湿性的BSG膜 在低温下形成，并且包括使用具有Si-OB键和臭氧（O 3）的有机金属化合物的混合气体在基板上形成硼硅酸盐玻璃膜（BSG膜）的方法。