公开(公告)号：US5155671A

公开(公告)日：1992-10-13

申请号：US490466

申请日：1990-03-08

申请人： Hiromi Inaba ,  Kiyoshi Nakamura ,  Sadao Hokari ,  Yoshio Sakai ,  Naoyuki Outi ,  Takeki Ando ,  Satoshi Fukuda

发明人： Hiromi Inaba ,  Kiyoshi Nakamura ,  Sadao Hokari ,  Yoshio Sakai ,  Naoyuki Outi ,  Takeki Ando ,  Satoshi Fukuda

IPC分类号： H02M5/458 ,  H02M7/48 ,  H02P27/06

CPC分类号： H02M5/4585

摘要： A power converter comprising a current-type inverter is disclosed, in which an output of a converter unit is applied as an input to the inverter unit through a DC reactor, and AC power is supplied to a load from the inverter unit. A ripple component of the DC input of the inverter unit is detected, and the switching elements of the inverter unit are controlled by modulation rate if they are to be subjected to PWM control, thus completing a sinusoidal waveform of the output of the inverter unit. Specifically, since the input to the inverter unit is allowed to contain a ripple, the DC reactor is reduced in size. The output of the inverter unit is a sinusoidal AC power containing no high harmonics and therefore the load is free of effects of high harmonics.

摘要翻译： 公开了一种包括电流型逆变器的电力转换器，其中通过直流电抗器将转换器单元的输出作为输入施加到逆变器单元，并且将来自逆变器单元的负载提供给交流电力。 检测逆变器单元的直流输入的纹波分量，并且如果要进行PWM控制，则逆变器单元的开关元件由调制率控制，从而完成逆变器单元的输出的正弦波形。 具体地，由于允许逆变器单元的输入包含纹波，因此直流电抗器的尺寸减小。 逆变器单元的输出是不包含高次谐波的正弦交流电，因此负载不受高次谐波的影响。

公开(公告)号：US5046023A

公开(公告)日：1991-09-03

申请号：US105292

申请日：1987-10-06

申请人： Koyo Katsura ,  Shigeru Matsuo ,  Jun Sato ,  Takashi Sone ,  Yoshikazu Yokota ,  Masahiko Kikuchi

发明人： Koyo Katsura ,  Shigeru Matsuo ,  Jun Sato ,  Takashi Sone ,  Yoshikazu Yokota ,  Masahiko Kikuchi

IPC分类号： G06T1/20 ,  G06T11/20 ,  G09G5/02 ,  G09G5/393 ,  G09G5/399

CPC分类号： G09G5/393 ,  G06T1/20 ,  G06T11/203 ,  G09G5/024 ,  G09G5/399

摘要： A graphic processing system including a main memory for storing a program and information corresponding to pixels, a main processor for effecting an execution processing of a program transferred from the main memory or from an external device so as to control the system, display/output devices such as a CRT device and a printer for outputting graphic information attained by controlling pixels arranged in a plurality of dimensions, a frame buffer for storing information corresponding to pixels outputted to the display/output devices, and a graphic processor for receiving a command and parameter information transferred from the main memory and/or the main processor, for generating character and graphic data in accordance with a predetermined processing procedure and for performing a transfer control including an execution of a drawing processing to transfer generated data through first and second address buses and first and second data buses to the main memory and/or the frame buffer, respectively. The system also includes bus connection switch circuit to be controlled by the graphic processor to effect a connection control between the first and second address buses and between the first and second data buses so as to enable execution of a drawing processing in the main memory connected to a bus on the main processor side and a data transfer between the main memory and the frame buffer.

摘要翻译： 一种图形处理系统，包括用于存储程序的主存储器和与像素相对应的信息，用于执行从主存储器或从外部设备传送的程序的执行处理以便控制系统的主处理器，显示/输出设备 例如用于输出通过控制以多个维度排列的像素获得的图形信息的CRT设备和打印机，用于存储对应于输出到显示/输出设备的像素的信息的帧缓冲器，以及用于接收命令和参数的图形处理器 从主存储器和/或主处理器传送的信息，用于根据预定的处理过程产生字符和图形数据，并且用于执行包括执行绘图处理的传送控制，以通过第一和第二地址总线传送生成的数据;以及 第一和第二数据总线到主存储器和/或帧缓冲器， 分别。 该系统还包括由图形处理器控制的总线连接开关电路，以实现第一和第二地址总线之间以及第一和第二数据总线之间的连接控制，以便能够执行连接到 主处理器侧的总线和主存储器与帧缓冲器之间的数据传输。

公开(公告)号：US4947342A

公开(公告)日：1990-08-07

申请号：US905173

申请日：1986-09-09

申请人： Koyo Katsura ,  Shigeru Matsuo ,  Shigeaki Yoshida ,  Hiroshi Takeda ,  Hisashi Kaziwara

发明人： Koyo Katsura ,  Shigeru Matsuo ,  Shigeaki Yoshida ,  Hiroshi Takeda ,  Hisashi Kaziwara

IPC分类号： G09G5/40 ,  G06F12/00 ,  G09G1/02 ,  G09G1/06 ,  G09G1/16 ,  G09G5/22 ,  G09G5/24 ,  G09G5/26 ,  G09G5/36 ,  G09G5/38 ,  G09G5/39 ,  G09G5/393 ,  G09G5/399

CPC分类号： G09G5/393 ,  G09G5/22 ,  G09G5/26 ,  G09G5/363

摘要： A graphic processing system has a processor for managing a display area and a character font area both included within an address space. From coded information indicative of a character transferred through a data bus of the system, the processor generates an address at which a character font pattern of the corresponding character has been stored and transfers that character font pattern to a predetermined position on the display area. The graphic processing system realizes high speed development of fonts.

摘要翻译： 图形处理系统具有用于管理包括在地址空间内的显示区域和字符字体区域的处理器。 从指示通过系统的数据总线传送的字符的编码信息中，处理器生成相应字符的字符字体图案已被存储的地址，并将该字符字体图案转移到显示区域上的预定位置。 图形处理系统实现了字体的高速发展。

公开(公告)号：US4894768A

公开(公告)日：1990-01-16

申请号：US21007

申请日：1987-03-02

申请人： Kazuhiko Iwasaki ,  Tsuneo Funabashi ,  Ikuya Kawasaki ,  Hideo Inayoshi ,  Atsushi Hasegawa ,  Takao Yaginuma ,  Eiki Kondoh

发明人： Kazuhiko Iwasaki ,  Tsuneo Funabashi ,  Ikuya Kawasaki ,  Hideo Inayoshi ,  Atsushi Hasegawa ,  Takao Yaginuma ,  Eiki Kondoh

IPC分类号： G06F15/16 ,  G06F9/38 ,  G06F15/167

CPC分类号： G06F15/167 ,  G06F9/3877

摘要： When a microprocessor fetches an instruction to be processed by a coprocessor, it sends to the coprocessor a command corresponding to the instruction while informing the coprocessor that the bus cycle is in the mode of transfer of the instruction to the coprocessor. In transferring an operand from the memory to the coprocessor, the microprocessor asserts, in addition to a usual memory read signal, a signal (CYCYCL) indicative of validity of the coprocessor and instructs the coprocessor to fetch data to thereby complete the operand transfer from memory to coprocessor within one bus cycle. In transferring data from the coprocessor to the memory, the microprocessor asserts, in addition to a usual memory write signal, the CYCYCL signal and instructs the coprocessor to deliver the data to thereby complete the data transfer from memory to coprocessor within one bus cycle. Thus, the signal transfer between memory and coprocessor can be completed within one bus cycle without resort to the provision of duplicate hardware in the coprocessor.

摘要翻译： 当微处理器提取要由协处理器处理的指令时，它向协处理器发送与指令相对应的命令，同时通知协处理器总线周期处于向协处理器传送指令的模式。 在将操作数从存储器传送到协处理器时，除了通常的存储器读取信号之外，微处理器还断言指示协处理器的有效性的信号（＆upbar＆C /），并且指示协处理器提取数据从而完成操作数传送 从一个总线周期内的存储器到协处理器。 在将数据从协处理器传输到存储器时，微处理器除了通常的存储器写入信号之外，还断言＆upbar＆C /信号并指示协处理器传送数据，从而完成在一个总线周期内从存储器到协处理器的数据传输 。 因此，存储器和协处理器之间的信号传输可以在一个总线周期内完成，而不需要在协处理器中提供重复的硬件。

公开(公告)号：US4779210A

公开(公告)日：1988-10-18

申请号：US727850

申请日：1985-04-26

申请人： Koyo Katsura ,  Hideo Maejima ,  Hisashi Kajiwara

发明人： Koyo Katsura ,  Hideo Maejima ,  Hisashi Kajiwara

IPC分类号： G06T1/20 ,  G06T1/60 ,  G06T11/20 ,  G06T17/00 ,  G09G5/02 ,  G09G5/36 ,  G09G5/393 ,  G09G5/395 ,  G09G5/399 ,  G06F15/20 ,  G06F3/153

CPC分类号： G06T17/00 ,  G06T1/20 ,  G06T1/60 ,  G06T11/203 ,  G09G5/36

摘要： Herein disclosed is a graphic processing apparatus which uses a CRT of raster scanning type. The graphic processing apparatus has functions to compare and judge whether or not within the range of a predetermined region thereby to effect the drawing operation, to compare drawing picture element data and other data in the drawing operation thereby to arithmetically control the drawing picture element data in accordance with the compared result, and to drawing a pattern of an arbitrary size on the basis of a fundamental unit of line and design patterns in the drawing operation.

摘要翻译： 这里公开了使用光栅扫描型CRT的图形处理装置。 图形处理装置具有比较判定是否在预定区域的范围内进行绘图操作的功能，以便在绘图操作中比较绘制图像元素数据和其他数据，从而对图形元素数据进行算术控制 根据比较结果，并在绘图操作中基于线和设计图案的基本单位绘制任意尺寸的图案。

公开(公告)号：US4695833A

公开(公告)日：1987-09-22

申请号：US673704

申请日：1984-11-13

申请人： Yukio Ogura ,  Seiji Nasu

发明人： Yukio Ogura ,  Seiji Nasu

IPC分类号： G01D7/00 ,  G01N29/04 ,  G01N29/06 ,  G01N29/30 ,  G01R13/20 ,  G06F3/02 ,  G06F3/033 ,  G06F3/048 ,  G09G1/00

CPC分类号： G01N29/30 ,  G01N29/0627 ,  G01N29/4463 ,  G01R13/20 ,  G06F3/033 ,  G06F3/0488 ,  G01N2291/044

摘要： A man-machine interface type portable ultrasonic composite measuring apparatus includes an oscilloscope, a position-detecting panel mounted on the display surface of the oscilloscope, a keyboard for effecting a man-machine interface, and a computer which introduces position signals detected from the panel and contents designated by the keyboard. The waveforms to be observed include all objects to be measured, that can be observed in the form of electric signals and that form optimum ultrasonic echos. A position-detecting panel is constructed in the form of a touch panel.

摘要翻译： PCT No.PCT / JP83 / 00094 Sec。 371日期1984年11月13日 102（e）1984年11月13日日期PCT提交1983年3月28日PCT公布。 出版物WO84 / 03944 日期：1984年10月11日。人机界面型便携式超声波复合测量装置包括示波器，安装在示波器的显示表面上的位置检测面板，用于实现人机界面的键盘，以及计算机 引入从面板检测到的位置信号和由键盘指定的内容。 要观察的波形包括要被测量的所有物体，可以以电信号的形式观察并形成最佳的超声波回波。 位置检测面板以触摸面板的形式构成。

公开(公告)号：US4686079A

公开(公告)日：1987-08-11

申请号：US788590

申请日：1985-10-17

申请人： Toshimitsu Ishikawa ,  Mishihiro Ozawa ,  Mikio Sakurai ,  Mutsuo Konno ,  Yasuhiro Aizawa ,  Takao Igarashi ,  Hiromasa Hirakawa

发明人： Toshimitsu Ishikawa ,  Mishihiro Ozawa ,  Mikio Sakurai ,  Mutsuo Konno ,  Yasuhiro Aizawa ,  Takao Igarashi ,  Hiromasa Hirakawa

IPC分类号： G21C3/344 ,  G21C3/32

CPC分类号： G21C3/344 ,  Y02E30/40

摘要： A fuel assembly has a fuel spacer consisting of a water rod having an outer diameter greater than that of fuel rods and a large number of circular sleeves into which the fuel rods are inserted. The fuel spacer has four bridge members. Both ends of these bridge members are fitted to two of eight circular sleeves which are adjacent one another in the diagonal direction of the fuel spacer. Both ends of each bridge member are bent so that its center projects outwardly away from the water rod.

摘要翻译： 燃料组件具有由外径大于燃料棒的水杆和大量圆形套筒组成的燃料间隔件，燃料棒被插入其中。 燃料间隔件具有四个桥构件。 这些桥构件的两端安装在八个圆形套筒中的两个，这两个圆形套筒在燃料间隔件的对角线方向上彼此相邻。 每个桥构件的两端弯曲，使得其中心向外突出远离水杆。

公开(公告)号：US4589007A

公开(公告)日：1986-05-13

申请号：US529764

申请日：1983-09-06

申请人： Shigeo Kuboki ,  Mitsuhiro Ikeda ,  Akihiko Takano ,  Yoji Nishio ,  Ikuro Masuda

发明人： Shigeo Kuboki ,  Mitsuhiro Ikeda ,  Akihiko Takano ,  Yoji Nishio ,  Ikuro Masuda

IPC分类号： H01L21/822 ,  H01L21/82 ,  H01L23/528 ,  H01L27/04 ,  H01L27/10 ,  H01L27/118

CPC分类号： H01L23/528 ,  H01L21/82 ,  H01L27/11807 ,  H01L2924/0002 ,  H01L2924/3011

摘要： A semiconductor integrated circuit device is disclosed. A plurality of unit cells, each having at least a basic transistor device formed on one main surface of a semiconductor substrate, are arranged in a line to form a unit cell line. At least two of such unit cell lines are arranged adjacent to and in parallel with each other to form a basic cell line. A plurality of such basic cell lines are arranged in parallel with each other with a wiring region of a predetermined width being interleaved between adjacent basic cell lines.

摘要翻译： 公开了一种半导体集成电路器件。 在半导体衬底的一个主表面上形成至少具有基本晶体管器件的多个单元电池排列成一行以形成单元电池。 这些单位细胞系中的至少两个彼此相邻并且平行地排列以形成基本细胞系。 多个这样的基本细胞系被布置成彼此并联，具有预定宽度的布线区域在相邻的基本细胞系之间交错。

公开(公告)号：US4523272A

公开(公告)日：1985-06-11

申请号：US366785

申请日：1982-04-08

申请人： Yasushi Fukunaga ,  Tadaaki Bandoh ,  Ryosei Hiraoka ,  Hidekazu Matsumoto ,  Jushi Ide ,  Tetsuya Kawakami

发明人： Yasushi Fukunaga ,  Tadaaki Bandoh ,  Ryosei Hiraoka ,  Hidekazu Matsumoto ,  Jushi Ide ,  Tetsuya Kawakami

IPC分类号： G06F13/374 ,  G06F15/16 ,  G06F15/40

CPC分类号： G06F13/374

摘要： In a multiprocessor system having a main memory and a plurality of processors connected through common address bus, data bus and answer bus for data transfer, a data transmission apparatus is provided for each of the main memory and the processors and includes bus request control lines for transferring bus request signals and bus control signals, and a bus controller for separately controlling selections of the address bus, the data bus and the answer bus in response to the signals on the bus request control lines and the request signal. Overlapped processing such as data write and data write answer or data read and data read answer in one cycle is possible.

摘要翻译： 在具有主存储器和通过公共地址总线连接的多个处理器，数据总线和用于数据传送的应答总线的多处理器系统中，为每个主存储器和处理器提供数据传输装置，并且包括总线请求控制线， 传送总线请求信号和总线控制信号;以及总线控制器，用于响应于总线请求控制线上的信号和请求信号单独控制地址总线，数据总线和应答总线的选择。 可以在一个周期内重叠处理，如数据写入和数据写入应答或数据读取和数据读取应答。

公开(公告)号：US4507260A

公开(公告)日：1985-03-26

申请号：US366213

申请日：1982-04-07

申请人： Hirotsugu Fujimoto ,  Tatsukuma Hosono ,  Hiroshi Kimura ,  Sadao Shibuya ,  Akisuke Naruse

发明人： Hirotsugu Fujimoto ,  Tatsukuma Hosono ,  Hiroshi Kimura ,  Sadao Shibuya ,  Akisuke Naruse

IPC分类号： G21C17/003 ,  G01N29/04 ,  G01N29/22 ,  G21C17/007 ,  G21C17/00

CPC分类号： G21C17/007

摘要： A rail apparatus positioned around the surface of a reactor pressure vessel surfaces (1) for carrying equipment such as a flaw detector to permit the equipment to move along the surface of a reactor pressure vessel in the vertical and circumferential directions. The rail apparatus has a plurality of vertical rails (81) and at least one circumferential rail (82) connected to the vertical rails through turn tables (83) at respective points of intersection. Each vertical rail (81) is supported by a supporting member wall fixed at its one end to a gamma-ray shielding wall (2) surrounding the reactor pressure vessel. The vertical and circumferential rails as a unit are retained by the gamma-ray shielding member (84) through oscillation prevention means (86).

摘要翻译： 围绕反应堆压力容器表面（1）的表面定位的轨道装置，用于承载诸如探伤仪的设备，以允许设备沿着反应堆压力容器的表面在垂直和圆周方向上移动。 轨道装置具有多个垂直轨道（81）和至少一个周向轨道（82），它们在相应的交点处通过转台（83）连接到垂直轨道。 每个垂直导轨（81）由其一端固定在围绕反应堆压力容器的伽马射线屏蔽壁（2）的支撑构件壁支撑。 作为单元的垂直和圆周轨道由伽马射线屏蔽构件（84）通过振动防止装置（86）保持。