公开(公告)号：US20100241599A1

公开(公告)日：2010-09-23

申请号：US12792614

申请日：2010-06-02

Applicant: Bin Yu ,  Fei Zhang

Inventor： Bin Yu ,  Fei Zhang

IPC: G06F15/18 ,  G06F17/30

CPC classification number: G06Q30/02 ,  G06Q10/00

Abstract: A method for classifying users is provided, which includes obtaining user attribute information of a user, matching the user attribute information with pre-determined user groups and/or pre-determined characters, and classifying the user into a user group and/or character that is matched successfully. A device for classifying users, a method for collecting and analyzing behaviors, and a system for collecting and analyzing behaviors are also provided.

Abstract translation: 提供了一种用于分类用户的方法，包括获取用户的用户属性信息，将用户属性信息与预定用户组和/或预定字符进行匹配，并将用户分类为用户组和/或字符， 匹配成功。 还提供了用于对用户进行分类的设备，用于收集和分析行为的方法以及用于收集和分析行为的系统。

公开(公告)号：US07781810B1

公开(公告)日：2010-08-24

申请号：US11538217

申请日：2006-10-03

Applicant: Judy Xilin An ,  Zoran Krivokapic ,  Haihong Wang ,  Bin Yu

Inventor： Judy Xilin An ,  Zoran Krivokapic ,  Haihong Wang ,  Bin Yu

IPC: H01L29/72

CPC classification number: H01L29/7855 ,  H01L21/823821 ,  H01L29/42384 ,  H01L29/7843 ,  H01L29/78684

Abstract: A device includes a fin, a first gate and a second gate. The first gate is formed adjacent a first side of the fin and includes a first layer of material having a first thickness and having an upper surface that is substantially co-planar with an upper surface of the fin. The second gate is formed adjacent a second side of the fin opposite the first side and includes a second layer of material having a second thickness and having an upper surface that is substantially co-planar with the upper surface of the fin, where the first thickness and the second thickness are substantially equal to a height of the fin.

Abstract translation: 一种装置包括鳍片，第一栅极和第二栅极。 第一门形成在鳍片的第一侧附近，并且包括具有第一厚度并且具有与鳍片的上表面基本共面的上表面的第一材料层。 所述第二浇口邻近所述翅片的与所述第一侧相对的第二侧形成，并且包括具有第二厚度并具有与所述翅片的上表面基本共面的上表面的第二材料层，其中所述第一厚度 并且第二厚度基本上等于翅片的高度。

公开(公告)号：US07479387B2

公开(公告)日：2009-01-20

申请号：US11590541

申请日：2006-10-31

Applicant: Christoph Benning ,  Sherrie Lea Sanda ,  Bin Yu

Inventor： Christoph Benning ,  Sherrie Lea Sanda ,  Bin Yu

IPC: C12N1/20 ,  C12N15/00 ,  C12N5/00 ,  C12Q1/00 ,  C12Q1/68 ,  C12P21/04 ,  C07H21/04 ,  C12Q1/48 ,  C12N9/00

CPC classification number: C12P19/42

Abstract: The present invention is directed to compositions and methods related to the synthesis and modification of uridine-5′-diphospho-sulfoquinovose (UDP-SQ). In particular, the methods of the present invention comprise the utilization of recombinant enzymes from Arabidopsis thaliana, UDP-glucose, and a sulfur donor to synthesize UDP-SQ, and the subsequent modification of UDP-SQ to form compounds including, but not limited to, 6-sulfo-α-D-quinovosyl diaclyglycerol (SQDG) and alkyl sulfoquinovoside. The compositions and methods of the invention provide a more simple, rapid means of synthesizing UDP-SQ, and the subsequent modification of UDP-SQ to compounds including, but not limited to, SQDG.

Abstract translation: 本发明涉及与尿苷-5'-二磷酸 - 磺基奎诺糖（UDP-SQ）的合成和修饰相关的组合物和方法。 特别地，本发明的方法包括利用来自拟南芥，UDP-葡萄糖和硫供体的重组酶合成UDP-SQ，以及后续的UDP-SQ修饰以形成化合物，包括但不限于 ，6-磺基-α-D-喹喔啉基二甘油（SQDG）和烷基磺基喹诺酮。 本发明的组合物和方法提供了一种更简单，快速的方法来合成UDP-SQ，以及随后将UDP-SQ修饰为化合物，包括但不限于SQDG。

公开(公告)号：US07417250B1

公开(公告)日：2008-08-26

申请号：US11151550

申请日：2005-06-14

Applicant: James F. Buller ,  Derick J Wristers ,  Qi Xiang ,  Bin Yu

Inventor： James F. Buller ,  Derick J Wristers ,  Qi Xiang ,  Bin Yu

IPC: H01L29/04

CPC classification number: H01L21/823807 ,  H01L29/1054

Abstract: A method of manufacturing a semiconductor device includes providing a strained-silicon semiconductor layer over a silicon germanium layer, and partially removing a first portion of the strained-silicon layer. The strained-silicon layer includes the first portion and a second portion, and a thickness of the second portion is greater than a thickness of the first portion. Initially, the first and second portions of the strained-silicon layer initially can have the same thickness. A p-channel transistor is formed over the first portion, and a n-channel transistor is formed over the second portion. A semiconductor device is also disclosed.

Abstract translation: 制造半导体器件的方法包括在硅锗层上提供应变硅半导体层，并部分去除应变硅层的第一部分。 应变硅层包括第一部分和第二部分，第二部分的厚度大于第一部分的厚度。 最初，应变硅层的第一和第二部分最初可以具有相同的厚度。 在第一部分上形成p沟道晶体管，并且在第二部分上形成n沟道晶体管。 还公开了一种半导体器件。

公开(公告)号：US07416925B2

公开(公告)日：2008-08-26

申请号：US11677404

申请日：2007-02-21

Applicant: Ming-Ren Lin ,  Bin Yu

Inventor： Ming-Ren Lin ,  Bin Yu

IPC: H01L21/00

CPC classification number: H01L29/785 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/78687

Abstract: A semiconductor device includes a substrate and an insulating layer on the substrate. The semiconductor device also includes a fin structure formed on the insulating layer, where the fin structure includes first and second side surfaces, a dielectric layer formed on the first and second side surfaces of the fin structure, a first gate electrode formed adjacent the dielectric layer on the first side surface of the fin structure, a second gate electrode formed adjacent the dielectric layer on the second side surface of the fin structure, and a doped structure formed on an upper surface of the fin structure in the channel region of the semiconductor device.

Abstract translation: 半导体器件包括衬底和衬底上的绝缘层。 半导体器件还包括形成在绝缘层上的翅片结构，其中鳍结构包括第一和第二侧表面，形成在鳍结构的第一和第二侧表面上的电介质层，形成在电介质层附近的第一栅电极 在翅片结构的第一侧表面上形成与鳍结构的第二侧表面上的电介质层相邻的第二栅电极，以及在半导体器件的沟道区中形成在鳍结构的上表面上的掺杂结构 。

公开(公告)号：US07250645B1

公开(公告)日：2007-07-31

申请号：US10761374

申请日：2004-01-22

Applicant: Haihong Wang ,  Shibly S. Ahmed ,  Ming-Ren Lin ,  Bin Yu

Inventor： Haihong Wang ,  Shibly S. Ahmed ,  Ming-Ren Lin ,  Bin Yu

IPC: H01L29/76 ,  H01L27/08

CPC classification number: H01L29/785 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/7842

Abstract: A fin field effect transistor (FinFET) includes a reversed T-shaped fin. The FinFET further includes source and drain regions formed adjacent the reversed T-shaped fin. The FinFET further includes a dielectric layer formed adjacent surfaces of the fin and a gate formed adjacent the dielectric layer.

Abstract translation: 翅片场效应晶体管（FinFET）包括反转的T形翅片。 FinFET还包括邻近反转的T形翅片形成的源极和漏极区域。 FinFET还包括邻近散热片表面形成的电介质层和邻近电介质层形成的栅极。

公开(公告)号：US06995438B1

公开(公告)日：2006-02-07

申请号：US10674478

申请日：2003-10-01

Applicant: Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

Inventor： Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

IPC: H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L29/785 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66795

Abstract: A semiconductor device includes a substrate and an insulating layer formed on the substrate. A conductive fin may be formed on the insulating layer. Fully silicided source and drain regions may be formed adjacent to the fin. A metal gate may be formed over a portion of the fin via a damascene process.

Abstract translation: 半导体器件包括衬底和形成在衬底上的绝缘层。 可以在绝缘层上形成导电翅片。 完全硅化的源极和漏极区域可以形成在鳍片附近。 可以通过镶嵌工艺在鳍的一部分上形成金属栅极。

公开(公告)号：US06984569B2

公开(公告)日：2006-01-10

申请号：US10642916

申请日：2003-08-18

Applicant: Olov B. Karlsson ,  HaiHong Wang ,  Bin Yu ,  Zoran Krivokapic ,  Qi Xiang

Inventor： Olov B. Karlsson ,  HaiHong Wang ,  Bin Yu ,  Zoran Krivokapic ,  Qi Xiang

IPC: H01L21/8224

CPC classification number: H01L29/7842 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78654

Abstract: A shallow trench isolation region formed in a layer of semiconductor material. The shallow trench isolation region includes a trench formed in the layer of semiconductor material, the trench being defined by sidewalls and a bottom; a liner within the trench formed from a high-K material, the liner conforming to the sidewalls and bottom of the trench; and a fill section made from isolating material, and disposed within and conforming to the high-K liner. A method of forming the shallow trench isolation region is also disclosed.

公开(公告)号：US06982464B2

公开(公告)日：2006-01-03

申请号：US10975473

申请日：2004-10-29

Applicant: Krishnashree Achuthan ,  Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

Inventor： Krishnashree Achuthan ,  Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

IPC: H01L29/72

CPC classification number: H01L29/785 ,  H01L21/3212 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/6681

Abstract: A FinFET-type semiconductor device includes a fin structure on which a relatively thin amorphous silicon layer and then an undoped polysilicon layer is formed. The semiconductor device may be planarized using a chemical mechanical polishing (CMP) in which the amorphous silicon layer acts as a stop layer to prevent damage to the fin structure.

Abstract translation: FinFET型半导体器件包括翅片结构，其上形成相对薄的非晶硅层，然后形成未掺杂的多晶硅层。 半导体器件可以使用化学机械抛光（CMP）进行平面化，其中非晶硅层用作阻挡层以防止损坏鳍结构。

公开(公告)号：US06974983B1

公开(公告)日：2005-12-13

申请号：US10768660

申请日：2004-02-02

Applicant: Wiley Eugene Hill ,  Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

Inventor： Wiley Eugene Hill ,  Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

IPC: H01L21/336 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L21/062

CPC classification number: H01L29/785 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/66795

Abstract: A semiconductor device includes an N-channel device and a P-channel device. The N-channel device includes a first source region, a first drain region, a first fin structure, and a gate. The P-channel device includes a second source region, a second drain region, a second fin structure, and the gate. The second source region, the second drain region, and the second fin structure are separated from the first source region, the first drain region, and the first fin structure by a channel stop layer.

Abstract translation: 半导体器件包括N沟道器件和P沟道器件。 N沟道器件包括第一源极区，第一漏极区，第一鳍结构和栅极。 P沟道器件包括第二源极区，第二漏极区，第二鳍结构和栅极。 第二源极区域，第二漏极区域和第二鳍状结构通过沟道阻挡层与第一源极区域，第一漏极区域和第一鳍片结构分离。