Bipolar multistate nonvolatile memory
    121.
    发明授权
    Bipolar multistate nonvolatile memory 有权
    双极多态非易失性存储器

    公开(公告)号:US09048425B2

    公开(公告)日:2015-06-02

    申请号:US14518218

    申请日:2014-10-20

    Inventor: Tony P. Chiang

    Abstract: Embodiments generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching capacity by using multiple layers of variable resistance layers. In one embodiment, the resistive switching element comprises at least three layers of variable resistance materials to increase the number of logic states. Each variable resistance layer may have an associated high resistance state and an associated low resistance state. As the resistance of each variable resistance layer determines the digital data bit that is stored, the multiple variable resistance layers per memory element allows for additional data storage without the need to further increase the density of nonvolatile memory devices. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players.

    Abstract translation: 实施例通常包括形成非易失性存储器件的方法,该非易失性存储器件包含通过使用多层可变电阻层而具有改进的器件开关容量的电阻式开关存储器元件。 在一个实施例中,电阻式开关元件包括至少三层可变电阻材料以增加逻辑状态的数量。 每个可变电阻层可以具有相关联的高电阻状态和相关联的低电阻状态。 由于每个可变电阻层的电阻决定了存储的数字数据位,每个存储元件的多个可变电阻层允许额外的数据存储,而不需要进一步增加非易失性存储器件的密度。 通常,电阻式开关存储器元件可以形成为可用于各种电子设备(例如数码相机,移动电话,手持式计算机和音乐播放器)的大容量非易失性存储器集成电路的一部分。

    ReRAM materials stack for low-operating-power and high-density applications
    123.
    发明授权
    ReRAM materials stack for low-operating-power and high-density applications 有权
    ReRAM材料堆叠用于低功耗和高密度应用

    公开(公告)号:US09000407B2

    公开(公告)日:2015-04-07

    申请号:US13903656

    申请日:2013-05-28

    Abstract: A switching element for resistive-switching memory (ReRAM) provides a controllable, consistent filament break-point at an abrupt structural discontinuity between a layer of high-k high-ionicity variable-resistance (VR) material and a layer of low-k low-ionicity VR material. The high-ionicity layer may be crystalline and the low-ionicity layer may be amorphous. The consistent break-point and characteristics of the low-ionicity layer facilitate lower-power operation. The defects (e.g., oxygen or nitrogen vacancies) that constitute the filament originate either in the high-ionicity VR layer or in a source electrode. The electrode nearest to the low-ionicity layer may be intrinsically inert or may be rendered effectively inert. Some electrodes are rendered effectively inert by the creation of the low-ionicity layer over the electrode.

    Abstract translation: 用于电阻式开关存储器(ReRAM)的开关元件在高k高离子度可变电阻(VR)材料层和低k低电平层之间突然的结构不连续性时提供可控的一致的灯丝断裂点 活性VR材料。 高离子层可以是结晶的,低离子层可以是无定形的。 低离子层的一致性断点和特性有利于低功率运行。 构成长丝的缺陷(例如,氧或氮空位)起源于高离子性VR层或源电极。 最接近低离子层的电极本质上是惰性的,或者可以有效地使其成为惰性的。 通过在电极上产生低离子层,使一些电极变得有效地是惰性的。

    Multistate Nonvolatile Memory Elements
    125.
    发明申请
    Multistate Nonvolatile Memory Elements 审中-公开
    多个非易失性存储元件

    公开(公告)号:US20150053910A1

    公开(公告)日:2015-02-26

    申请号:US14506193

    申请日:2014-10-03

    Inventor: Tony P. Chiang

    Abstract: Multistate nonvolatile memory elements are provided. The multistate nonvolatile memory elements contain multiple layers. Each layer may be based on a different bistable material. The bistable materials may be resistive switching materials such as resistive switching metal oxides. Optional conductor layers and current steering elements may be connected in series with the bistable resistive switching metal oxide layers.

    Abstract translation: 提供多个非易失性存储器元件。 多个非易失性存储器元件包含多个层。 每个层可以基于不同的双稳态材料。 双稳态材料可以是电阻式开关材料,例如电阻式开关金属氧化物。 可选导体层和电流导向元件可以与双稳电阻开关金属氧化物层串联连接。

    Bipolar Multistate Nonvolatile Memory
    126.
    发明申请
    Bipolar Multistate Nonvolatile Memory 审中-公开
    双极多态非易失性存储器

    公开(公告)号:US20150037959A1

    公开(公告)日:2015-02-05

    申请号:US14518218

    申请日:2014-10-20

    Inventor: Tony P. Chiang

    Abstract: Embodiments generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching capacity by using multiple layers of variable resistance layers. In one embodiment, the resistive switching element comprises at least three layers of variable resistance materials to increase the number of logic states. Each variable resistance layer may have an associated high resistance state and an associated low resistance state. As the resistance of each variable resistance layer determines the digital data bit that is stored, the multiple variable resistance layers per memory element allows for additional data storage without the need to further increase the density of nonvolatile memory devices. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players.

    Abstract translation: 实施例通常包括形成非易失性存储器件的方法,该非易失性存储器件包含通过使用多层可变电阻层而具有改进的器件开关容量的电阻式开关存储器元件。 在一个实施例中,电阻式开关元件包括至少三层可变电阻材料以增加逻辑状态的数量。 每个可变电阻层可以具有相关联的高电阻状态和相关联的低电阻状态。 由于每个可变电阻层的电阻决定了存储的数字数据位,每个存储元件的多个可变电阻层允许额外的数据存储,而不需要进一步增加非易失性存储器件的密度。 通常,电阻式开关存储器元件可以形成为可用于各种电子设备(例如数码相机,移动电话,手持式计算机和音乐播放器)的大容量非易失性存储器集成电路的一部分。

    Nonvolatile memory elements with metal-deficient resistive-switching metal oxides
    129.
    发明授权
    Nonvolatile memory elements with metal-deficient resistive-switching metal oxides 有权
    具有金属缺陷电阻式开关金属氧化物的非易失性存储元件

    公开(公告)号:US08889479B2

    公开(公告)日:2014-11-18

    申请号:US13675695

    申请日:2012-11-13

    Abstract: Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal.

    Abstract translation: 提供具有电阻开关金属氧化物的非易失性存储元件。 非易失性存储元件可以通过将含金属的材料沉积在含硅材料上而形成。 含金属材料可以被氧化以形成电阻式开关金属氧化物。 当施加热量时,含硅材料中的硅与含金属材料中的金属反应。 这形成用于非易失性存储元件的金属硅化物下电极。 上部电极可以沉积在金属氧化物的顶部。 由于含硅层中的硅与含金属层中的一些金属反应,与由相同金属形成的化学计量的金属氧化物相比,形成的电阻 - 开关金属氧化物是金属缺陷的。

    Creating An Embedded ReRam Memory From A High-K Metal Gate Transistor Structure
    130.
    发明申请
    Creating An Embedded ReRam Memory From A High-K Metal Gate Transistor Structure 审中-公开
    从高K金属栅晶体管结构创建嵌入式ReRam存储器

    公开(公告)号:US20140319449A1

    公开(公告)日:2014-10-30

    申请号:US14325580

    申请日:2014-07-08

    Abstract: An embodiment of the present invention sets forth an embedded resistive memory cell that includes a first stack of deposited layers, a second stack of deposited layers, a first electrode disposed under a first portion of the first stack, and a second electrode disposed under a second portion of the first stack and extending from under the second portion of the first stack to under the second stack. The second electrode is disposed proximate to the first electrode within the embedded resistive memory cell. The first stack of deposited layers includes a dielectric layer, a high-k dielectric layer disposed above the dielectric layer, and a metal layer disposed above the high-k dielectric layer. The second stack of deposited layers includes a high-k dielectric layer formed simultaneously with the high-k dielectric layer included in the first stack, and a metal layer disposed above the high-k dielectric layer.

    Abstract translation: 本发明的实施例提出了一种嵌入式电阻式存储单元,其包括沉积层的第一堆叠,沉积层的第二堆叠,设置在第一堆叠的第一部分下方的第一电极和设置在第二堆叠下的第二电极的第二电极 第一堆叠的部分并且从第一堆叠的第二部分下方延伸到第二堆叠下方。 第二电极设置在嵌入式电阻式存储单元内靠近第一电极。 第一堆沉积层包括介电层,设置在电介质层上方的高k电介质层和设置在高k电介质层上方的金属层。 第二层沉积层包括与包含在第一堆叠中的高k电介质层同时形成的高k电介质层和设置在高k电介质层上方的金属层。

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