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    Semiconductor luminous element and superlattice structure
    123.
    发明授权
    Semiconductor luminous element and superlattice structure 失效
    半导体发光元件和超晶格结构

    公开(公告)号：US5289486A

    公开(公告)日：1994-02-22

    申请号：US55799

    申请日：1993-04-29

    Applicant: Kenichi Iga ,  Fumio Koyama ,  Takeshi Takagi

    Inventor： Kenichi Iga ,  Fumio Koyama ,  Takeshi Takagi

    IPC: H01L33/06 ,  H01S5/20 ,  H01S5/343 ,  H01S3/19

    CPC classification number: H01L33/06 ,  B82Y20/00 ,  H01S5/34326 ,  H01S5/2013 ,  Y10S977/761

    Abstract: A semiconductor luminous element has cladding layers on both sides of its active layer; and it has a multi-quantum barrier layer which is in contact with the active layer on at least a portion of at least one of the cladding layers. This multi-quantum barrier layer is formed of an alternating stack of superlattice barrier layers and superlattice well layers. The energy gap of the well layers is smaller than that of the active layer, and the quantized energy gap of the multi-quantum barrier layer is larger than the energy gap of the active layer. A superlattice structure for semiconductor devices, which confines electrons and holes, is formed out of the active layer and a cladding layer provided on at least one side of that active layer. A multi-quantum barrier layer is in contact with the active layer on at least a portion of the cladding layer. This multi-quantum barrier layer is formed of an alternating stack of superlattice barrier layers and superlattice well layers. The energy gap of the well layers is smaller than that of the active layer, and the quantized energy gap of the multi-quantum barrier layer is larger than the energy gap of the active layer.

    Abstract translation: 半导体发光元件在其有源层的两侧具有覆层; 并且其具有与至少一个包覆层的至少一部分上的有源层接触的多量子势垒层。 该多量子势垒层由超晶格势垒层和超晶格阱层的交替叠层形成。 阱层的能隙小于活性层的能隙，多量子势垒层的量子化能隙大于有源层的能隙。 限制电子和空穴的半导体器件的超晶格结构由有源层形成，并且在该有源层的至少一个侧面上形成包覆层。 多量子势垒层与包层的至少一部分上的有源层接触。 该多量子势垒层由超晶格势垒层和超晶格阱层的交替叠层形成。 阱层的能隙小于活性层的能隙，多量子势垒层的量子化能隙大于有源层的能隙。

    Variable resistance element and method of manufacturing the same
    127.
    发明授权
    Variable resistance element and method of manufacturing the same 有权
    可变电阻元件及其制造方法

    公开(公告)号：US09006698B2

    公开(公告)日：2015-04-14

    申请号：US13810708

    申请日：2012-01-18

    Applicant: Zhiqiang Wei ,  Takeshi Takagi ,  Satoru Mitani ,  Yoshio Kawashima ,  Ichirou Takahashi

    Inventor： Zhiqiang Wei ,  Takeshi Takagi ,  Satoru Mitani ,  Yoshio Kawashima ,  Ichirou Takahashi

    IPC: H01L47/00 ,  H01L21/20 ,  H01L45/00

    CPC classification number: H01L45/1253 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1625 ,  H01L45/1675

    Abstract: A variable resistance element including: a first electrode; a second electrode; and a variable resistance layer having a resistance value which reversibly changes according to electrical signals applied, wherein the variable resistance layer includes a first variable resistance layer comprising a first oxygen-deficient transition metal oxide, and a second variable resistance layer comprising a second transition metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first oxygen-deficient transition metal oxide, the second electrode has a single needle-shaped part at an interface with the second variable resistance layer, and the second variable resistance layer is interposed between the first variable resistance layer and the second electrode, is in contact with the first variable resistance layer and the second electrode, and covers the single needle-shaped part.

    Abstract translation: 一种可变电阻元件，包括：第一电极; 第二电极; 以及可变电阻层，其具有根据施加的电信号可逆地改变的电阻值，其中所述可变电阻层包括包含第一氧缺乏过渡金属氧化物的第一可变电阻层和包含第二过渡金属的第二可变电阻层 具有低于第一缺氧过渡金属氧化物缺氧程度的氧缺乏的氧化物，第二电极在与第二可变电阻层的界面处具有单个针状部分，第二可变电阻层 插入在第一可变电阻层和第二电极之间，与第一可变电阻层和第二电极接触，并且覆盖单个针状部分。

    Variable resistance nonvolatile memory element writing method
    128.
    发明授权
    Variable resistance nonvolatile memory element writing method 有权
    可变电阻非易失性存储元件写入方法

    公开(公告)号：US08942025B2

    公开(公告)日：2015-01-27

    申请号：US13809175

    申请日：2012-08-09

    Applicant: Koji Katayama ,  Satoru Mitani ,  Takeshi Takagi

    Inventor： Koji Katayama ,  Satoru Mitani ,  Takeshi Takagi

    IPC: G11C11/00 ,  G11C13/00

    CPC classification number: G11C13/0069 ,  G11C13/00 ,  G11C13/0007 ,  G11C13/0064 ,  G11C2013/0073 ,  G11C2013/0092 ,  G11C2213/56 ,  G11C2213/79

    Abstract: A variable resistance nonvolatile memory element writing method according to the present disclosure includes: (a) changing a variable resistance layer to a low resistance state by applying, to a second electrode, a first voltage which is negative with respect to a first electrode; and (b) changing the variable resistance layer to a high resistance state. Step (b) includes: (i) applying, to the second electrode, a second voltage which is positive with respect to the first electrode; and (ii) changing the variable resistance layer to the high resistance state by applying, to the second electrode, a third voltage, which is negative with respect to the first electrode and is smaller than the absolute value of a threshold voltage for changing the variable resistance layer from the high resistance state to the low resistance state, after the positive second voltage is applied in step (i).

    Abstract translation: 根据本公开的可变电阻非易失性存储元件写入方法包括：（a）通过向第二电极施加相对于第一电极为负的第一电压，将可变电阻层改变为低电阻状态; 和（b）将可变电阻层改变为高电阻状态。 步骤（b）包括：（i）向第二电极施加相对于第一电极为正的第二电压; 和（ii）通过向所述第二电极施加相对于所述第一电极为负的第三电压并且小于用于改变所述变量的阈值电压的绝对值，将所述可变电阻层改变为高电阻状态 电阻层从高电阻状态到低电阻状态，在步骤（i）中施加正的第二电压之后。

    Method for manufacturing non-volatile memory device, non-volatile memory element, and non-volatile memory device
    129.
    发明授权
    Method for manufacturing non-volatile memory device, non-volatile memory element, and non-volatile memory device 有权
    用于制造非易失性存储器件，非易失性存储元件和非易失性存储器件的方法

    公开(公告)号：US08710484B2

    公开(公告)日：2014-04-29

    申请号：US13580401

    申请日：2011-02-23

    Applicant: Zhiqiang Wei ,  Takeshi Takagi ,  Mitsuteru Iijima

    Inventor： Zhiqiang Wei ,  Takeshi Takagi ,  Mitsuteru Iijima

    IPC: H01L47/00

    CPC classification number: H01L45/1226 ,  G11C13/0002 ,  G11C2213/77 ,  H01L27/2436 ,  H01L27/249 ,  H01L45/08 ,  H01L45/146 ,  H01L45/1633

    Abstract: A manufacturing method for manufacturing, with a simple process, a non-volatile memory apparatus having a stable memory performance includes: (a) forming a stacking-structure body above a substrate by alternately stacking conductive layers comprising a transition metal and interlayer insulating films comprising an insulating material; (b) forming a contact hole penetrating through the stacking-structure body to expose part of each of the conductive layers; (c) forming variable resistance layers by oxidizing the part of each of the conductive layers, the part being exposed in the contact hole, and each of the variable resistance layers having a resistance value that reversibly changes according to an application of an electric signal; and (d) forming a pillar electrode in the contact hole by embedding a conductive material in the contact hole, the pillar electrode being connected to each of the variable resistance layers.

    Abstract translation: 一种以简单的工艺制造具有稳定的存储性能的非易失性存储装置的制造方法包括：（a）通过交替堆叠包括过渡金属和层间绝缘膜的导电层，在衬底上形成堆叠结构体，所述导电层包括： 绝缘材料; （b）形成穿过堆叠结构体的接触孔，以暴露出每个导电层的一部分; （c）通过氧化每个导电层的一部分形成可变电阻层，该部分暴露在接触孔中，并且每个可变电阻层具有根据电信号的应用可逆地改变的电阻值; 和（d）通过在接触孔中埋设导电材料而在接触孔中形成柱状电极，该柱状电极与各可变电阻层连接。

    Nonvolatile memory element having a variable resistance layer whose resistance value changes according to an applied electric signal
    130.
    发明授权
    Nonvolatile memory element having a variable resistance layer whose resistance value changes according to an applied electric signal 有权
    具有可变电阻层的非易失性存储元件，其电阻值根据所施加的电信号而改变

    公开(公告)号：US08686390B2

    公开(公告)日：2014-04-01

    申请号：US13512178

    申请日：2010-11-18

    Applicant: Takeshi Takagi

    Inventor： Takeshi Takagi

    IPC: H01L47/00

    CPC classification number: H01L27/101 ,  H01L27/2409 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1683

    Abstract: Provided is a nonvolatile memory element achieving a stable resistance change and miniaturization, and a method of manufacturing the same. The nonvolatile memory element includes: a first electrode formed above a substrate; an interlayer insulating layer formed above the substrate including the first electrode and having a memory cell hole reaching the first electrode; a barrier layer formed in the memory cell hole and composed of a semiconductor layer or an insulating layer connected to the first electrode; a second electrode formed in the memory cell hole and connected to the barrier layer; a variable resistance layer formed on the second electrode and having a stacked structure whose resistance value changes based on electric signals; and a third electrode connected to the variable resistance layer and formed on the interlayer insulating layer to cover the memory cell hole.

    Abstract translation: 提供了实现稳定的电阻变化和小型化的非易失性存储元件及其制造方法。 非易失性存储元件包括：形成在衬底上的第一电极; 形成在包括所述第一电极并且具有到达所述第一电极的存储单元孔的所述基板的上方的层间绝缘层; 由存储单元孔形成的阻挡层，由与第一电极连接的半导体层或绝缘层构成; 形成在所述存储单元孔中并连接到所述阻挡层的第二电极; 形成在所述第二电极上并具有电阻值基于电信号而变化的堆叠结构的可变电阻层; 以及连接到所述可变电阻层并形成在所述层间绝缘层上以覆盖所述存储单元孔的第三电极。

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