公开(公告)号：US20230341637A1

公开(公告)日：2023-10-26

申请号：US17729244

申请日：2022-04-26

Applicant: GlobalFoundries U.S. Inc.

Inventor： Yusheng Bian

IPC: G02B6/42

CPC classification number: G02B6/4206 ,  G02B6/42

Abstract: Photonics structures for a waveguide or an edge coupler and methods of fabricating a photonics structure for a waveguide or an edge coupler. The photonics structure includes a waveguide core having a first section, a second section longitudinally adjacent to the first section, first segments projecting in a vertical direction from the first section, and second segments projecting in the vertical direction from the second section. The first section of the waveguide core has a first thickness, and the second section of the waveguide core has a second thickness that is greater than the first thickness.

公开(公告)号：US20230324332A1

公开(公告)日：2023-10-12

申请号：US17715282

申请日：2022-04-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： Mark D. Levy ,  Siva P. Adusumilli ,  Aaron L. Vallett

IPC: G01N27/414

CPC classification number: G01N27/4148 ,  G01N27/4145

Abstract: Disclosed is a semiconductor structure including a device (e.g., a field effect transistor (FET), a biosensor FET (bioFET) or an ion-sensitive FET (ISFET)) with a fluid-based gate. The structure includes a substrate, an intermediate layer on the substrate, and a semiconductor layer on the intermediate layer. The device includes, within the semiconductor layer, a source region, a drain region, and a channel region between the source and drain regions. The structure includes, for the fluid-base gate, a cavity within the intermediate layer below the channel region and lined with a dielectric liner. Optionally, the exposed surface of the dielectric liner within the cavity is functionalized. Additional dielectric layers are stacked on the semiconductor layer and at least one port extends essentially vertically through the dielectric layers, the semiconductor layer and the dielectric liner to the cavity so as to allow fluid for the fluid-based gate to flow into the cavity.

公开(公告)号：US11784224B2

公开(公告)日：2023-10-10

申请号：US17455290

申请日：2021-11-17

Applicant: GlobalFoundries U.S. Inc.

Inventor： Hong Yu ,  Jagar Singh ,  Zhenyu Hu ,  John J. Pekarik

IPC: H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/40 ,  H01L29/737 ,  H01L29/66 ,  H01L29/735 ,  H01L29/08

CPC classification number: H01L29/1008 ,  H01L29/0808 ,  H01L29/0821 ,  H01L29/401 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/6625 ,  H01L29/66242 ,  H01L29/735 ,  H01L29/737

Abstract: The disclosure provides a lateral bipolar transistor structure with a base layer over a semiconductor buffer, and related methods. A lateral bipolar transistor structure may include an emitter/collector (E/C) layer over an insulator. The E/C layer has a first doping type. A semiconductor buffer is adjacent the insulator. A base layer is on the semiconductor buffer and adjacent the E/C layer, the base layer including a lower surface below the E/C layer and an upper surface above the E/C layer. The base layer has a second doping type opposite the first doping type.

公开(公告)号：US11784189B2

公开(公告)日：2023-10-10

申请号：US17407680

申请日：2021-08-20

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Francois Hebert ,  Handoko Linewih

IPC: H01L27/12 ,  H01L21/84 ,  H01L27/085 ,  H01L29/872

CPC classification number: H01L27/1203 ,  H01L21/84 ,  H01L27/085 ,  H01L29/872

Abstract: Structures including III-V compound semiconductor-based devices and silicon-based devices integrated on a semiconductor substrate and methods of forming such structures. The structure includes a substrate having a device layer, a handle substrate, and a buried insulator layer between the handle substrate and the device layer. The structure includes a first semiconductor layer on the device layer in a first device region, and a second semiconductor layer on the device layer in a second device region. The first semiconductor layer contains a III-V compound semiconductor material, and the second semiconductor layer contains silicon. A first device structure includes a gate structure on the first semiconductor layer, and a second device structure includes a doped region in the second semiconductor layer. The doped region and the second semiconductor layer define a p-n junction.

公开(公告)号：US11782208B1

公开(公告)日：2023-10-10

申请号：US17858549

申请日：2022-07-06

Applicant: GlobalFoundries U.S. Inc.

Inventor： Yusheng Bian

IPC: G02B6/12 ,  G02B6/13 ,  G02B6/293

CPC classification number: G02B6/12007 ,  G02B6/13 ,  G02B6/2938 ,  G02B6/29352 ,  G02B6/29325 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/12164

Abstract: Structures for a wavelength splitter used in a wavelength-division-multiplexing filter stage and methods of forming same. The structure comprises a first waveguide core including a first section, a second section, and a phase delay line between the first section and the second section. The phase delay line of the first waveguide core includes a delay section and a plurality of segments longitudinally arranged in the delay section. The structure further comprises a second waveguide core including a first section, a second section, and a phase delay line between the first section and the second section. The first section of the second waveguide core is positioned adjacent to the first section of the first waveguide core to define a first directional coupler, and the second section of the second waveguide core is positioned adjacent to the second section of the first waveguide core to define a second directional coupler.

公开(公告)号：US20230317869A1

公开(公告)日：2023-10-05

申请号：US17709181

申请日：2022-03-30

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Rajendran Krishnasamy ,  John J. Ellis-Monaghan ,  Siva P. Adusumilli ,  Ramsey Hazbun ,  Steven M. Shank

IPC: H01L31/105 ,  H01L31/0224 ,  H01L31/18

CPC classification number: H01L31/105 ,  H01L31/022408 ,  H01L31/1812

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and methods of manufacture. The structure includes: a top terminal; an intrinsic material in contact with the top terminal; and a bottom terminal in contact with the intrinsic material, the bottom terminal including a P semiconductor material and a fully depleted N semiconductor material.

公开(公告)号：US20230317130A1

公开(公告)日：2023-10-05

申请号：US17709525

申请日：2022-03-31

Applicant: GlobalFoundries U.S. Inc.

Inventor： Chandrahasa Reddy Dinnipati ,  Ramesh Raghavan ,  Bipul C. Paul

IPC: G11C11/16 ,  G11C7/06

CPC classification number: G11C11/1673 ,  G11C11/1675 ,  G11C11/1655 ,  G11C11/1657 ,  G11C7/06

Abstract: A structure includes an array of nonvolatile memory cells, wordlines and bitlines connected to the nonvolatile memory cells, sense amplifiers connected to the nonvolatile memory cells, and reference cells connected to the sense amplifiers. Each of the reference cells has a transistor connected to a variable resistor, one of the wordlines, a reference bitline separate from the bitlines, and the sense amplifiers.

公开(公告)号：US11777043B1

公开(公告)日：2023-10-03

申请号：US17807887

申请日：2022-06-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： Ramsey M. Hazbun ,  John J. Ellis-Monaghan ,  Rajendran Krishnasamy ,  Siva P. Adusumilli

IPC: H01L31/0352

CPC classification number: H01L31/035281

Abstract: A substrate is formed to include a substrate base and a substrate extension. A photodiode contacts the substrate base. The substrate extension is adjacent the photodiode. An additional device contacts the substrate extension. A sidewall spacer contacts the photodiode and the substrate extension. The additional device includes conductive elements within the substrate extension adjacent the sidewall spacer.

公开(公告)号：US20230305241A1

公开(公告)日：2023-09-28

申请号：US17701942

申请日：2022-03-23

Applicant: GlobalFoundries U.S. Inc.

Inventor： Yusheng Bian

IPC: G02B6/42

CPC classification number: G02B6/4203

Abstract: Structures for an edge coupler and methods of fabricating such structures. The structure includes a substrate, a waveguide core, and a metamaterial layer positioned in a vertical direction between the substrate and the waveguide core. The metamaterial layer includes a plurality of elements separated by a plurality of gaps and a dielectric material in the plurality of gaps.

公开(公告)号：US11768153B1

公开(公告)日：2023-09-26

申请号：US17689120

申请日：2022-03-08

Applicant: GlobalFoundries U.S. Inc.

Inventor： Bartlomiej J. Pawlak ,  Michal Rakowski

IPC: G01N21/31 ,  G02B6/293

CPC classification number: G01N21/31 ,  G02B6/2935 ,  G02B6/29343

Abstract: Disclosed is a structure (e.g., a lab-on-chip structure) including a substrate, an insulator layer on the substrate, and at least one optical ring resonator. Each ring resonator includes cladding material on the insulator layer and, embedded within the cladding material, a first waveguide core with an input and an output, and second waveguide core(s) (e.g., ring waveguide core(s)) positioned laterally adjacent to the first waveguide core. A reservoir is below the ring resonator within the insulator layer and substrate such that surfaces of the waveguide cores are exposed within the reservoir. During a sensing operation, the waveguide core surfaces contact with fluid within the reservoir and a light signal at the output of the first waveguide core is monitored (e.g., by a sensing circuit, which in some embodiments is also coupled to a reference optical ring resonator) and used, for example, for spectrum-based target identification and, optionally, characterization.