公开(公告)号：US07679154B2

公开(公告)日：2010-03-16

申请号：US12001289

申请日：2007-12-10

Applicant: Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Thorsten Pannek ,  Frank Schäfer

Inventor： Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Thorsten Pannek ,  Frank Schäfer

IPC: H01L29/84

CPC classification number: B81C1/00182 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0136 ,  G01L9/0042

Abstract: In a method for manufacturing a semiconductor component having a semiconductor substrate, a flat, porous diaphragm layer and a cavity underneath the porous diaphragm layer are produced to form unsupported structures for a component. In a first approach, the semiconductor substrate may receive a doping in the diaphragm region that is different from that of the cavity. This permits different pore sizes and/or porosities to be produced, which is used in producing the cavity for improved etching gas transport. Also, mesopores may be produced in the diaphragm region and nanopores may be produced as an auxiliary structure in what is to become the cavity region.

Abstract translation: 在制造具有半导体衬底的半导体部件的方法中，制造平坦的多孔隔膜层和多孔隔膜层下方的空腔，以形成用于部件的无支撑结构。 在第一种方法中，半导体衬底可以在膜片区域中接收不同于空腔的掺杂。 这允许产生不同的孔径和/或孔隙率，其用于制造用于改善蚀刻气体输送的空腔。 此外，可以在隔膜区域中产生介孔，并且可以在将要成为空腔区域的地方制造纳米孔作为辅助结构。

公开(公告)号：US07494839B2

公开(公告)日：2009-02-24

申请号：US11011888

申请日：2004-12-13

Applicant: Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

Inventor： Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

IPC: H01L21/00

CPC classification number: B81C1/00158 ,  B81B3/007 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0116 ,  B81C2201/0136

Abstract: A manufacturing method for a micromechanical semiconductor element includes providing on a semiconductor substrate a patterned stabilizing element having at least one opening. The opening is arranged such that it allows access to a first region in the semiconductor substrate, the first region having a first doping. Furthermore, a selective removal of at least a portion of the semiconductor material having the first doping out of the first region of the semiconductor substrate is provided. In addition, a membrane is produced above the first region using a first epitaxy layer applied on the stabilizing element. In a further method step, at least a portion of the first region is used to produce a cavity underneath the stabilizing element. In this manner, the present invention provides for the production of the patterned stabilizing element by means of a second epitaxy layer, which is applied on the semiconductor substrate.

Abstract translation: 微机电半导体元件的制造方法包括在半导体衬底上提供具有至少一个开口的图案化稳定元件。 开口被布置成使得其允许接近半导体衬底中的第一区域，第一区域具有第一掺杂。 此外，提供了选择性地去除半导体衬底的第一区域中具有第一掺杂的半导体材料的至少一部分。 此外，使用施加在稳定元件上的第一外延层，在第一区域上方产生膜。 在另一方法步骤中，第一区域的至少一部分用于在稳定元件下方产生空腔。 以这种方式，本发明提供了通过施加在半导体衬底上的第二外延层来生产图案化的稳定元件。

公开(公告)号：US07456041B2

公开(公告)日：2008-11-25

申请号：US11301032

申请日：2005-12-13

Applicant: Byeoung-ju Ha ,  Chang-seung Lee

Inventor： Byeoung-ju Ha ,  Chang-seung Lee

IPC: H01L21/00

CPC classification number: B81C1/0092 ,  B81B2201/0214 ,  B81B2201/0271 ,  B81B2201/058 ,  B81B2203/0118 ,  B81B2203/0127 ,  B81C1/00047 ,  B81C1/00952 ,  B81C2201/0115

Abstract: A method of manufacturing a MEMS structure including forming a porous layer having a predetermined thickness on the top surface of a substrate over an area where a cavity is to be formed; forming the cavity by etching the substrate below the porous layer; forming a membrane layer on the top surface to seal the cavity; and forming a structure on the upper side of the membrane layer. After forming a cantilever structure on the membrane layer and etching the membrane layer, a cantilever structure is produced in a floating state over the cavity. Also, at least one inlet hole and outlet hole can be formed in the porous layer and the membrane, thereby providing a sealed fluidic channel.

Abstract translation: 一种制造MEMS结构的方法，包括在要形成空腔的区域上的衬底的顶表面上形成具有预定厚度的多孔层; 通过在多孔层下方蚀刻基底来形成空腔; 在顶表面上形成膜层以密封空腔; 并在膜层的上侧形成结构。 在膜层上形成悬臂结构并蚀刻膜层之后，在空腔上以悬浮状态产生悬臂结构。 此外，可以在多孔层和膜中形成至少一个入口孔和出口孔，从而提供密封的流体通道。

公开(公告)号：US20080044939A1

公开(公告)日：2008-02-21

申请号：US11744971

申请日：2007-05-07

Applicant: Androula Nassiopoulou ,  Grigoris Kaltsas ,  Dimitrios Pagonis

Inventor： Androula Nassiopoulou ,  Grigoris Kaltsas ,  Dimitrios Pagonis

IPC: H01L21/02

CPC classification number: G01F1/6888 ,  B81B2201/0278 ,  B81B2203/0338 ,  B81C1/00071 ,  B81C2201/0114 ,  B81C2201/0115 ,  G01F1/6845 ,  G01K7/028

Abstract: This invention provides a miniaturized silicon thermal flow sensor with improved characteristics, based on the use of two series of integrated thermocouples (6, 7) on each side of a heater (4), all integrated on a porous silicon membrane (2) on top of a cavity (3). Porous silicon (2) with the cavity (3) underneath provides very good thermal isolation for the sensor elements, so as the power needed to maintain the heater (4) at a given temperature is very low. The formation process of the porous silicon membrane (2) with the cavity (3) underneath is a two-step single electrochemical process. It is based on the fact that when the anodic current is relatively low, we are in a regime of porous silicon formation, while if this current exceeds a certain value we turn into a regime of electropolishing. The process starts at low current to form porous silicon (2) and it is then turned into electropolishing conditions to form the cavity (3) underneath. Various types of thermal sensor devices, such as flow sensors, gas sensors, IR detectors, humidity sensors and thermoelectric power generators are described using the proposed methodology. Furthermore the present invention provides a method for the formation of microfluidic channels (16) using the same technique of porous silicon (17) and cavity (16) formation.

Abstract translation: 本发明提供了一种基于在加热器（4）的每一侧上使用两个集成的热电偶（6,7）的系列，具有改进的特性的小型化硅热流量传感器，它们全部集成在顶部的多孔硅膜（2）上 的腔（3）。 具有下面的空腔（3）的多孔硅（2）为传感器元件提供了非常好的热隔离，因此将加热器（4）保持在给定温度所需的功率非常低。 多孔硅膜（2）与下面的腔（3）的形成过程是两步单电化学过程。 这是基于以下事实：当阳极电流相对较低时，我们处于多孔硅形成的状态，而如果该电流超过一定值，则我们变成电解抛光的方式。 该工艺以低电流开始形成多孔硅（2），然后转化为电解抛光条件以形成下面的空腔（3）。 使用所提出的方法描述了各种类型的热传感器装置，例如流量传感器，气体传感器，红外探测器，湿度传感器和热电发电机。 此外，本发明提供了使用与多孔硅（17）和空腔（16）相同的技术形成微流体通道（16）的方法。

公开(公告)号：US20070145501A1

公开(公告)日：2007-06-28

申请号：US11683785

申请日：2007-03-08

Applicant: Giuseppe D'Arrigo ,  Rosario Spinella

Inventor： Giuseppe D'Arrigo ,  Rosario Spinella

IPC: H01L29/84

CPC classification number: B81C1/00142 ,  B81B2201/042 ,  B81C2201/0115

Abstract: A method is provided for fabricating a semiconductor device that includes a suspended micro-system. According to the method, a silicon porous layer is formed above a silicon substrate, and the silicon porous layer is oxidized. An oxide layer is deposited, and a first polysilicon layer is deposited above the oxide layer. The first polysilicon layer, the oxide layer, and the silicon porous layer are selectively removed. A nitride layer is deposited, and a second polysilicon layer is deposited. The second polysilicon layer, the nitride layer, the first polysilicon layer, and the oxide layer are selectively removed. The silicon porous layer is removed in areas made accessible by the previous step. Also provided is a semiconductor device that includes a suspended structure fixed to at least two walls through a plurality of hinges, with the suspended structure including an oxide layer, a first polysilicon layer, a nitride layer, and a second polysilicon layer.

Abstract translation: 提供了一种用于制造包括悬浮微系统的半导体器件的方法。 根据该方法，在硅衬底上形成硅多孔层，并且硅多孔层被氧化。 沉积氧化物层，并且在氧化物层上方沉积第一多晶硅层。 选择性地去除第一多晶硅层，氧化物层和硅多孔层。 沉积氮化物层，沉积第二多晶硅层。 选择性地除去第二多晶硅层，氮化物层，第一多晶硅层和氧化物层。 在通过前一步骤可访问的区域中去除硅多孔层。 还提供了一种半导体器件，其包括通过多个铰链固定到至少两个壁的悬置结构，其中悬浮结构包括氧化物层，第一多晶硅层，氮化物层和第二多晶硅层。

公开(公告)号：US20060115919A1

公开(公告)日：2006-06-01

申请号：US11000547

申请日：2004-11-30

Applicant: Bishnu Gogoi ,  Jin Zheng

Inventor： Bishnu Gogoi ,  Jin Zheng

IPC: H01L21/00 ,  H01L21/302

CPC classification number: B81C1/00476 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81C2201/0109 ,  B81C2201/0115 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814

Abstract: A method of making a microelectromechanical (MEM) device using a standard silicon wafer, rather than an SOI wafer, includes selectively implanting a dopant in regions of the standard wafer, to thereby form heavily doped regions therein. The heavily doped regions are then converted to porous silicon regions. An electrical isolation layer is selectively deposited on the wafer and over a portion of one or more of the porous silicon regions. An epitaxial layer is grown over the porous silicon regions and the electrical isolation area, and device elements are formed in the epitaxial layer. Thereafter, at least portions of the porous silicon regions are removed, to thereby release the formed device elements.

Abstract translation: 使用标准硅晶片而不是SOI晶片制造微机电（MEM）器件的方法包括在标准晶片的区域中选择性地注入掺杂剂，从而在其中形成重掺杂区域。 然后将重掺杂区域转换成多孔硅区域。 电绝缘层被选择性地沉积在晶片上以及一个或多个多孔硅区域的一部分上。 在多孔硅区域和电隔离区域上生长外延层，并且在外延层中形成器件元件。 此后，去除多孔硅区域的至少一部分，从而释放所形成的器件元件。

公开(公告)号：US20060037932A1

公开(公告)日：2006-02-23

申请号：US10529425

申请日：2003-02-27

Applicant: Gerhard Lammel ,  Frank Schaefer ,  Heribert Weber ,  Stefan Finkbeiner

Inventor： Gerhard Lammel ,  Frank Schaefer ,  Heribert Weber ,  Stefan Finkbeiner

IPC: C23F1/00

CPC classification number: B81C1/00476 ,  B81B2201/12 ,  B81B2203/0118 ,  B81C2201/0109 ,  B81C2201/0115

Abstract: A manufacturing method and a micromechanical component are provided in which porous silicon is used as sacrificial layer and a functional layer is exposed by etching off the sacrificial layer.

Abstract translation: 提供了制造方法和微机械部件，其中使用多孔硅作为牺牲层，并且通过蚀刻除去牺牲层而暴露功能层。

公开(公告)号：US06936902B2

公开(公告)日：2005-08-30

申请号：US10168584

申请日：2000-12-14

Applicant: Frank Reichenbach ,  Stefan Pinter ,  Frank Henning ,  Hans Artmann ,  Helmut Baumann ,  Franz Laemer ,  Michael Offenberg ,  Georg Bischopink

Inventor： Frank Reichenbach ,  Stefan Pinter ,  Frank Henning ,  Hans Artmann ,  Helmut Baumann ,  Franz Laemer ,  Michael Offenberg ,  Georg Bischopink

IPC: B81B3/00 ,  B81B7/00 ,  B81C1/00 ,  H01L29/82

CPC classification number: B81C1/00293 ,  B81B2201/0228 ,  B81B2207/095 ,  B81C2201/0115 ,  B81C2203/0136 ,  B81C2203/0145

Abstract: A sensor has a foundation wafer having a sensor chamber, at least one silicon-based micromechanical structure integrated with the sensor chamber of the foundation wafer, at least one covering that covers the foundation wafer in a region of the sensor chamber, the covering including a first layer which is a deposition layer and is permeable to an etching medium and reaction products, and a hermetically sealing second layer which is a sealing layer and located above the first layer, the deposition layer which is the first layer being permeable in a region of the sensor chamber to the etching medium and a reaction product, the deposition layer for being permeable having structures selected from the group consisting of etching openings, porous regions, and both.

Abstract translation: 传感器具有基础晶片，其具有传感器室，与基础晶片的传感器室一体化的至少一个硅基微机械结构，在传感器室的区域中覆盖基础晶片的至少一个覆盖物，所述覆盖物包括： 第一层，其是沉积层并且可蚀刻介质和反应产物，以及作为密封层并位于第一层上方的密封第二层，作为第一层的沉积层在第一层的区域中是可渗透的 传感器室到蚀刻介质和反应产物，用于透过的沉积层具有选自蚀刻开口，多孔区域和两者的结构。

公开(公告)号：US20050118920A1

公开(公告)日：2005-06-02

申请号：US10510385

申请日：2003-04-01

Applicant: Pierre-Olivier Lefort ,  Isabelle Thomas

Inventor： Pierre-Olivier Lefort ,  Isabelle Thomas

IPC: B81B7/00 ,  H01J9/00

CPC classification number: B81B7/0038 ,  B81C2201/0115

Abstract: The invention relates to a process for fabricating a microstructure containing a vacuum cavity. The invention includes producing, from a first silicon wafer, a porous silicon region intended to form, completely or partly, one wall of the cavity and capable of absorbing residual gases in the cavity and joins the first silicon wafer to a second wafer, so as to produce the cavity.

Abstract translation: 本发明涉及一种制造包含真空腔的微结构的方法。 本发明包括从第一硅晶片制造用于形成，完全或部分地形成空腔的一个壁的多孔硅区域，并且能够吸收空腔中的残余气体并将第一硅晶片连接到第二晶片，以便 以产生空腔。

公开(公告)号：US20050072926A1

公开(公告)日：2005-04-07

申请号：US10502465

申请日：2003-01-16

Applicant: Androula Nassiopoulou ,  Grigoris Kaltsas ,  Dimitrios Pagonis

Inventor： Androula Nassiopoulou ,  Grigoris Kaltsas ,  Dimitrios Pagonis

IPC: G01K13/02 ,  B81B1/00 ,  B81B3/00 ,  B81C1/00 ,  G01F1/684 ,  G01K7/01 ,  G01K7/02 ,  H01L31/00

CPC classification number: B81C1/00071 ,  B81B2201/058 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0114 ,  B81C2201/0115 ,  G01F1/6845 ,  G01K7/028

Abstract: This invention provides a miniaturized silicon thermal flow sensor with improved characteristics, based on the use of two series of integrated thermocouples (6, 7) on each side of a heater (4), all integrated on a porous silicon membrane (2) on top of a cavity (3). Porous silicon (2) with the cavity (3) underneath provides very good thermal isolation for the sensor elements, so as the power needed to maintain the heater (4) at a given temperature is very low. The formation process of the porous silicon membrane (2) with the cavity (3) underneath is a two-step single electrochemical process. It is based on the fact that when the anodic current is relatively low, we are in a regime of porous silicon formation, while if this current exceeds a certain value we turn into a regime of electropolishing. The process starts at low current to form porous silicon (2) and it is then turned into electropolishing conditions to form the cavity (3) underneath. Various types of thermal sensor devices, such as flow sensors, gas sensors, IR detectors, humidity sensors and thermoelectric power generators are described using the proposed methodology. Furthermore the present invention provides a method for the formation of microfluidic channels (16) using the same technique of porous silicon (17) and cavity (16) formation.

Abstract translation: 本发明提供了一种基于在加热器（4）的每一侧上使用两个集成的热电偶（6,7）的系列，具有改进的特性的小型化硅热流量传感器，它们全部集成在顶部的多孔硅膜（2）上 的腔（3）。 具有下面的空腔（3）的多孔硅（2）为传感器元件提供了非常好的热隔离，因此将加热器（4）保持在给定温度所需的功率非常低。 多孔硅膜（2）与下面的腔（3）的形成过程是两步单电化学过程。 这是基于以下事实：当阳极电流相对较低时，我们处于多孔硅形成的状态，而如果该电流超过一定值，则我们变成电解抛光的方式。 该工艺以低电流开始形成多孔硅（2），然后转化为电解抛光条件以形成下面的空腔（3）。 使用所提出的方法描述了各种类型的热传感器装置，例如流量传感器，气体传感器，红外探测器，湿度传感器和热电发电机。 此外，本发明提供了使用与多孔硅（17）和空腔（16）相同的技术形成微流体通道（16）的方法。