公开(公告)号：US09922993B2

公开(公告)日：2018-03-20

申请号：US15292465

申请日：2016-10-13

Applicant: STMicroelectronics, Inc.

Inventor： John Hongguang Zhang

IPC: H01L27/12 ,  H01L29/417 ,  H01L21/84 ,  H01L29/66 ,  H01L21/768 ,  H01L21/285

CPC classification number: H01L27/1211 ,  H01L21/28518 ,  H01L21/76897 ,  H01L21/845 ,  H01L29/41783 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66628

Abstract: A transistor includes an active region supported by a substrate and having a source region, a channel region and a drain region. A gate stack extends over the channel region and a first sidewall surrounds the gate stack. A raised source region and a raised drain region are provided over the source and drain regions, respectively, of the active region adjacent the first sidewall. A second sidewall peripherally surrounds each of the raised source region and raised drain region. The second sidewall extends above a top surface of the raised source region and raised drain region to define regions laterally delimited by the first and second sidewalls. A conductive material fills the regions to form a source contact and a drain contact to the raised source region and raised drain region, respectively.

公开(公告)号：US20180070201A1

公开(公告)日：2018-03-08

申请号：US15812958

申请日：2017-11-14

Applicant: STMicroelectronics, Inc.

Inventor： Prasad Golla

IPC: H04W4/00 ,  H04W12/04 ,  H04W72/04 ,  H04W8/20

CPC classification number: H04W4/80 ,  H04W8/205 ,  H04W12/04 ,  H04W72/0493

Abstract: A network services provider grants a subscription to a user for use of mobile network services to communicate voice, data, and text information with a specific mobile device. Mobile devices store one or more subscriptions, each of which may be activated. An activated subscription stored in the mobile device is now made portable. The user wants to pass the portable subscription from a first mobile device to a second mobile device. The user forms a first communicative relationship between the first mobile device and a second mobile device and receives from the second mobile device identification information associated with the second mobile device. The first mobile device passes the identification information to the network services provider and receives a confirmation. The user forms a second communicative relationship between the first mobile device and the second mobile device, and the second mobile device confirms activation of the portable subscription.

公开(公告)号：US09905478B2

公开(公告)日：2018-02-27

申请号：US15469851

申请日：2017-03-27

Applicant: STMicroelectronics, Inc.

Inventor： Nicolas Loubet ,  Pierre Morin ,  Yann Mignot

IPC: H01L21/8238 ,  H01L29/78 ,  H01L29/417

CPC classification number: H01L21/823821 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/4916 ,  H01L29/7842 ,  H01L29/785

Abstract: Integrated circuits are disclosed in which the strain properties of adjacent pFETs and nFETs are independently adjustable. The pFETs include compressive-strained SiGe on a silicon substrate, while the nFETs include tensile-strained silicon on a strain-relaxed SiGe substrate. Adjacent n-type and p-type FinFETs are separated by electrically insulating regions formed by a damascene process. During formation of the insulating regions, the SiGe substrate supporting the n-type devices is permitted to relax elastically, thereby limiting defect formation in the crystal lattice of the SiGe substrate.

公开(公告)号：US20180050901A1

公开(公告)日：2018-02-22

申请号：US15240709

申请日：2016-08-18

Applicant: STMicroelectronics Asia Pacific Pte Ltd ,  STMicroelectronics S.r.l. ,  STMicroelectronics, Inc.

Inventor： Teck Khim Neo ,  Mauro Pasetti ,  Franco Consiglieri ,  Luca Molinari ,  Andrea Nicola Colecchia ,  Simon Dodd

IPC: B81B7/00 ,  B05B1/24

CPC classification number: B81B7/008 ,  B05B1/24 ,  B05B17/06 ,  B41J2/04501 ,  B41J2/04541 ,  B41J2/04543 ,  B41J2/14016 ,  B41J2/14072 ,  B81B2201/05 ,  B81B2207/012 ,  B81B2207/091

Abstract: The present disclosure is directed to a microfluidic die that includes ejection circuitry and one time programmable memory with a minimal number of contact pads to external devices. The die includes a relatively large number of nozzles and a relatively small number of contact pads. The die includes decoding circuitry that utilizes the small number of contact pads to control the drive and ejection of the nozzles and the reading/writing of the memory with the same contact pads.

公开(公告)号：US20180047755A1

公开(公告)日：2018-02-15

申请号：US15795283

申请日：2017-10-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  STMICROELECTRONICS, INC.

Inventor： Wai-Kin Li ,  Chieh-Yu Lin ,  Yannick Daurelle

IPC: H01L27/12 ,  H01L21/441 ,  H01L29/06 ,  H01L27/088 ,  H01L29/08 ,  H01L23/528 ,  H01L21/84 ,  H01L21/8234 ,  H01L21/768 ,  H01L21/762 ,  H01L29/40 ,  H01L27/02

CPC classification number: H01L27/1211 ,  H01L21/441 ,  H01L21/7624 ,  H01L21/76807 ,  H01L21/76841 ,  H01L21/76895 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L21/823481 ,  H01L21/845 ,  H01L23/528 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0886 ,  H01L29/0642 ,  H01L29/0847 ,  H01L29/40

Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.

公开(公告)号：US09893688B1

公开(公告)日：2018-02-13

申请号：US15299527

申请日：2016-10-21

Applicant: STMicroelectronics, Inc.

Inventor： Pavan Nallamothu

IPC: H03F1/02 ,  H03F3/45 ,  H03F1/34

CPC classification number: H03F3/45219 ,  H03F1/342 ,  H03F2200/411 ,  H03F2203/45048 ,  H03F2203/45212

Abstract: A differential amplifier has an inherent offset voltage. In many circuit applications, such as with a voltage to current converter circuit, it is important to nullify that offset voltage. A calibration circuit is provided to configured the differential amplifier to operate as a comparator with a common voltage applied to both inputs. The logic state of the output of the amplifier indicates whether the offset voltage is positive or negative. In response thereto, a trim current with a progressively increasing magnitude is injected into the amplifier and the amplifier output is monitored to detect a change in logic state. The magnitude of the trim current at the point where the logic state changes is the magnitude of trim current needed to nullify the voltage offset.

公开(公告)号：US09893147B2

公开(公告)日：2018-02-13

申请号：US15345250

申请日：2016-11-07

Applicant: STMICROELECTRONICS, INC.

Inventor： Nicolas Loubet ,  Prasanna Khare

IPC: H01L27/01 ,  H01L29/06 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/16 ,  H01L29/49 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3105 ,  H01L29/08 ,  H01L29/165 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0653 ,  H01L21/02532 ,  H01L21/02661 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/31053 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/165 ,  H01L29/49 ,  H01L29/66545 ,  H01L29/7848

Abstract: Channel-to-substrate leakage in a FinFET device is prevented by inserting an insulating layer between the semiconducting channel and the substrate during fabrication of the device. Similarly, source/drain-to-substrate leakage in a FinFET device is prevented by isolating the source/drain regions from the substrate by inserting an insulating layer between the source/drain regions and the substrate. Forming such an insulating layer isolates the conduction path from the substrate both physically and electrically, thus preventing current leakage. In an array of semiconducting fins made up of a multi-layer stack, the bottom material is removed thus yielding a fin array that is suspended above the silicon surface. A resulting gap underneath the remaining top fin material is then filled with oxide to better support the fins and to isolate the array of fins from the substrate.

公开(公告)号：US09876110B2

公开(公告)日：2018-01-23

申请号：US14169875

申请日：2014-01-31

Applicant: STMicroelectronics, Inc.

Inventor： Jocelyne Gimbert

IPC: H01L27/12 ,  H01L21/8238 ,  H01L29/78 ,  H01L21/70 ,  H01L21/84 ,  H01L21/265 ,  H01L29/66 ,  H01L21/324 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/324 ,  H01L21/707 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66628 ,  H01L29/66772 ,  H01L29/66795

Abstract: Methods and structures for forming highly-doped, ultrathin layers for transistors formed in semiconductor-on-insulator substrates are described. High dopant concentrations may be achieved in ultrathin semiconductor layers to improve device characteristics. Ion implantation at elevated temperatures may mitigate defect formation for stoichiometric dopant concentrations up to about 30%. In-plane stressors may be formed adjacent to channels of transistors formed in ultrathin semiconductor layers.

公开(公告)号：US09860160B2

公开(公告)日：2018-01-02

申请号：US14984620

申请日：2015-12-30

Applicant: STMICROELECTRONICS, INC.

Inventor： Jonathan Evans ,  Lee Johnson ,  Amit Kumar Aggarwal

IPC: H04L12/66 ,  H04L12/707 ,  H04L12/801 ,  H04L12/46

CPC classification number: H04L45/24 ,  H04L12/4641 ,  H04L47/17

Abstract: A method and apparatus for multipath switching using per-hop virtual local area network (VLAN) remapping is disclosed. In the method and apparatus, a data packet is forwarded for transmission over one of a first port and a second port. The device identifies a VLAN ID of the data packet as a second VLAN ID and changes the second VLAN ID to a first VLAN ID. Then one or more criteria of a classification set entry for forwarding the data packet over the second port are evaluated. The data packet is forwarded over the second port if the criteria are met and the data packet is associated with the second VLAN ID. Alternatively, the data packet is forwarded over the first port and is associated with the first VLAN ID if a dynamic entry specifies the data packet is to be forwarded over the first port.

公开(公告)号：US09859423B2

公开(公告)日：2018-01-02

申请号：US14587655

申请日：2014-12-31

Applicant: STMICROELECTRONICS, INC. ,  GLOBALFOUNDRIES INC. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Qing Liu ,  Ruilong Xie ,  Chun-chen Yeh ,  Xiuyu Cai

IPC: H01L29/165 ,  H01L29/78 ,  H01L29/66 ,  H01L29/417

CPC classification number: H01L29/7848 ,  H01L29/165 ,  H01L29/41783 ,  H01L29/6681 ,  H01L29/7842 ,  H01L29/7851

Abstract: A hetero-channel FinFET device provides enhanced switching performance over a FinFET device having a silicon channel, and is easier to integrate into a fabrication process than is a FinFET device having a germanium channel. A FinFET device featuring the heterogeneous Si/SiGe channel includes a fin having a central region made of silicon and sidewall regions made of SiGe. A hetero-channel pFET device in particular has higher carrier mobility and less gate-induced drain leakage current than either a silicon device or a SiGe device. The hetero-channel FinFET permits the SiGe portion of the channel to have a Ge concentration in the range of about 25-40% and permits the fin height to exceed 40 nm while remaining stable.