公开(公告)号：US06815072B2

公开(公告)日：2004-11-09

申请号：US10256714

申请日：2002-09-27

申请人： Ming-Hwa Yoo ,  Yi-Lung Cheng ,  Szu-An Wu ,  Ying-Lang Wang

发明人： Ming-Hwa Yoo ,  Yi-Lung Cheng ,  Szu-An Wu ,  Ying-Lang Wang

IPC分类号： B05C1100

CPC分类号： H01J37/32477 ,  C23C16/4404 ,  Y10T428/2495 ,  Y10T428/265

摘要： A method for reducing contaminants in a processing chamber 10 having chamber plasma processing region components comprising the following steps. The chamber plasma processing region components are cleaned. The chamber is then seasoned as follows. A first USG layer is formed over the chamber plasma processing region components. An FSG layer is formed over the first USG layer. A second USG layer is formed over the FSG layer. Wherein the USG, FSG, and second USG layers comprise a UFU season film. A UFU season film coating the chamber plasma processing region components of a processing chamber comprises: an inner USG layer over the chamber plasma processing region components; an FSG layer over the inner USG layer; and an outer USG layer over the FSG layer.

公开(公告)号：US06815007B1

公开(公告)日：2004-11-09

申请号：US10086258

申请日：2002-03-04

申请人： Ming-Hwa Yoo ,  Shih-Chi Lin ,  Yi-Lung Cheng ,  Szu-An Wu ,  Ying-Lang Wang

发明人： Ming-Hwa Yoo ,  Shih-Chi Lin ,  Yi-Lung Cheng ,  Szu-An Wu ,  Ying-Lang Wang

IPC分类号： C23C1622

CPC分类号： H01J37/32862 ,  C23C16/308 ,  C23C16/401 ,  C23C16/4404 ,  H01J2237/022

摘要： A method for reducing contaminants in a processing chamber having an inner wall by seasoning the walls. The method comprising the following steps. A first USG film is formed over the processing chamber inner wall. An FSG film is formed over the first USG film. A second USG film is formed over the FSG film. A nitrogen-containing film is formed over the second USG film wherein the first USG film, the FSG film, the second USG film and the nitrogen-containing film comprise a UFUN season film.

公开(公告)号：US06660638B1

公开(公告)日：2003-12-09

申请号：US10038389

申请日：2002-01-03

申请人： Ying-Lang Wang ,  Shih-Chi Lin ,  Yi-Lung Cheng ,  Chi-Wen Liu ,  Ming-Hua Yoo ,  Wen-Kung Cheng ,  Jiann-Kwang Wang

发明人： Ying-Lang Wang ,  Shih-Chi Lin ,  Yi-Lung Cheng ,  Chi-Wen Liu ,  Ming-Hua Yoo ,  Wen-Kung Cheng ,  Jiann-Kwang Wang

IPC分类号： H01L21461

CPC分类号： C09G1/02 ,  H01L21/3212 ,  H01L21/7684

摘要： Two problems seen in CMP as currently executed are a tendency for slurry particles to remain on the surface and the formation of a final layer of oxide. These problems have been solved by adding to the slurry a quantity of TMAH or TBAH. This has the effect of rendering the surface being polished hydrophobic. In that state a residual layer of oxide will not be left on the surface at the conclusion of CMP. Nor will many slurry abrasive particles remain cling to the freshly polished surface. Those that do are readily removed by a simple rinse or buffing. As an alternative, the CMP process may be performed in three stages—first convention CMP, then polishing in a solution of TMAH or TBAH, and finally a gentle rinse or buffing.

摘要翻译： 当前执行的CMP中看到的两个问题是浆料颗粒保留在表面上并形成最后一层氧化物的倾向。 这些问题已经通过向浆料中加入一定量的TMAH或TBAH来解决。 这具有使表面被抛光的疏水性的效果。 在该状态下，在CMP结束时，残留的氧化层不会残留在表面上。 许多浆料磨料颗粒也不会保持粘附到新鲜抛光的表面。 那些可以通过简单的冲洗或抛光容易地去除。 作为替代方案，CMP工艺可以分三个阶段执行 - 第一个惯例CMP，然后在TMAH或TBAH的溶液中抛光，最后进行柔和的冲洗或抛光。

公开(公告)号：US06645825B1

公开(公告)日：2003-11-11

申请号：US09614554

申请日：2000-07-12

申请人： Chin Kun Lan ,  Ting Chun Wang ,  Tong-Hua Kuan ,  Ying-Lang Wang

发明人： Chin Kun Lan ,  Ting Chun Wang ,  Tong-Hua Kuan ,  Ying-Lang Wang

IPC分类号： H01L2176

CPC分类号： H01L21/76229

摘要： An improved and new process for fabricating a planarized structure of shallow trench isolation (STI) embedded in a silicon substrate has been developed. The planarizing method comprises a two-step CMP process in which the first CMP step comprises chemical-mechanical polishing of silicon oxide using a first polishing slurry which is selective to silicon oxide. The time of the second CMP step is determined by selecting an overpolish thickness based on the percentage of substrate area occupied by the trench. High manufacturing yield and superior planarity for silicon oxide STI are achieved.

摘要翻译： 已经开发了一种用于制造嵌入硅衬底中的浅沟槽隔离（STI）的平面化结构的改进和新工艺。 平面化方法包括两步CMP工艺，其中第一CMP步骤包括使用对氧化硅选择性的第一抛光浆料进行二氧化硅的化学机械抛光。 通过基于沟槽占据的衬底面积的百分比来选择过抛光厚度来确定第二CMP步骤的时间。 实现了高的制造成品率和优异的氧化硅STI平坦度。

公开(公告)号：US06479881B2

公开(公告)日：2002-11-12

申请号：US09882678

申请日：2001-06-18

申请人： Ying-Lang Wang ,  Chun-Ching Tsan ,  Jowei Dun ,  Hung-Ju Chien

发明人： Ying-Lang Wang ,  Chun-Ching Tsan ,  Jowei Dun ,  Hung-Ju Chien

IPC分类号： H01L2900

CPC分类号： H01L21/76801 ,  H01L21/31612 ,  H01L21/76837 ,  Y10S438/937

摘要： A semiconductor wafer having a double inter-metal dielectric layer formed in the gaps of and on closely. spaced metal interconnection circuitry. The double dielectric layer is formed by an in situ low temperature two step deposition HDP-CVD process separated by a cool-down period. The low temperature process mitigates metal line defects such as distortion or warping caused by heat generated during the process of filling gaps having aspect ratios greater than 2. The double dielectric layer is composed of Group IV materials, silicon being the preferred material. These double layers may be individually doped. Titanium nitride layers, present as by-products of seeding and anti-reflective coatings serve to reduce electro-migration of the metal circuitry.

摘要翻译： 一种半导体晶片，其具有形成在间隙中并紧密地形成的双金属介电层。 间隔金属互连电路。 双电介质层通过在冷却期间分离的原位低温两步沉积HDP-CVD工艺形成。 低温处理减轻了金属线缺陷，例如在填充具有大于2的纵横比的间隙的过程中产生的热引起的变形或翘曲。双电介质层由第IV族材料组成，硅是优选的材料。 这些双层可以单独掺杂。 作为接种和抗反射涂层的副产物存在的氮化钛层用于减少金属电路的电迁移。

公开(公告)号：US06407007B1

公开(公告)日：2002-06-18

申请号：US09193669

申请日：1998-11-17

申请人： Chun-Ching Tsan ,  Ying-Lang Wang ,  Hui-Ling Wang ,  Chin Kun Lan

发明人： Chun-Ching Tsan ,  Ying-Lang Wang ,  Hui-Ling Wang ,  Chin Kun Lan

IPC分类号： H01L21324

CPC分类号： H01L21/3185 ,  H01L21/316 ,  H01L21/76826

摘要： A method for improving the adhesion of a thick silicon nitride layer, to an underlying spin on glass, (SOG), layer, has been developed. After applying, baking and curing of a SOG layer, plasma treatment of the SOG layer, is performed in a deposition tool, using a nitrous oxide plasma. The plasma treatment prepares the exposed SOG surface for an in situ deposition of a thick silicon nitride layer, by improving the adhesion of thick silicon nitride to the underlying SOG layer, and by decreasing the possibility of silicon nitride delamination, that can occur with counterparts, fabricated without the nitrous oxide plasma treatment of the SOG layer.

摘要翻译： 已经开发了用于改善厚氮化硅层与玻璃上的底层旋涂（SOG）层的粘附性的方法。 施加，烘烤和固化SOG层之后，使用一氧化二氮等离子体在沉积工具中进行SOG层的等离子体处理。 等离子体处理通过改善厚氮化硅与下面的SOG层的粘附性以及通过降低可能与对应物发生的氮化硅分层的可能性来制备暴露的SOG表面，用于原位沉积厚的氮化硅层， 在没有氧化亚氮等离子体处理SOG层的情况下制造。

公开(公告)号：US06372645B1

公开(公告)日：2002-04-16

申请号：US09439367

申请日：1999-11-15

申请人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu ,  Shih-Chi Lin ,  Ming-Jer Lee ,  Ying-Lang Wang ,  Yu-Ku Lin

发明人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu ,  Shih-Chi Lin ,  Ming-Jer Lee ,  Ying-Lang Wang ,  Yu-Ku Lin

IPC分类号： H01L2144

CPC分类号： H01L21/76838 ,  H01L21/32051

摘要： In the first option of the present invention, a semiconductor structure is provided and an overlying titanium nitride barrier layer is deposited thereon at about 100° C. At least Al and Cu is sputtered over the titanium nitride barrier layer from about 270 to 300° C. to form an Al—Cu alloy containing metal layer. The sputtered Al—Cu alloy containing metal layer is promptly cooled at a cooling rate greater than about 100° C./minute to a temperature below 200° C. to form a Al—Cu alloy containing metal layer having minimal CuAl2 grain growth. The semiconductor structure is removed from the cooling chamber and the semiconductor structure is processed further below 200° C. to form semiconductor device precursors. In the second option of the present invention, a semiconductor structure having an overlying barrier layer is provided. At least Al and Cu is sputtered over the barrier layer at a first temperature to form an Al—Cu alloy containing metal layer having CuAl2 grains of a first average size. The semiconductor structure is processed and then heated to a second temperature to dissolve the CuAl2 grains of a first average size then rapidly cooling to a third temperature whereby the CuAl2 grains formed have a second average size within the Al—Cu alloy containing metal layer. The second average size CuAl2 grains being less than the first average size CuAl2 grains.

摘要翻译： 在本发明的第一种选择中，提供了一种半导体结构，并在其上沉积了大约100℃的上覆氮化钛阻挡层。至少Al和Cu溅射在氮化钛阻挡层上约270-300℃ 以形成含有金属层的Al-Cu合金。 将溅射的含有Al-Cu合金的金属层以大于约100℃/分钟的冷却速度迅速冷却到低于200℃的温度，以形成含有最小CuAl 2晶粒生长的金属层的Al-Cu合金。 将半导体结构从冷却室中移除，半导体结构进一步在200℃以下进行处理以形成半导体器件前体。 在本发明的第二个选择中，提供了具有上覆阻挡层的半导体结构。 在第一温度下至少将Al和Cu溅射在阻挡层上，以形成含有具有第一平均尺寸的CuAl 2晶粒的金属层的Al-Cu合金。 将半导体结构加工，然后加热至第二温度以溶解第一平均尺寸的CuAl 2晶粒，然后快速冷却至第三温度，由此形成的CuAl 2晶粒在含有Al-Cu合金的金属层内具有第二平均尺寸。 第二平均尺寸CuAl2晶粒小于第一平均尺寸CuAl2晶粒。

公开(公告)号：US06287172B1

公开(公告)日：2001-09-11

申请号：US09465700

申请日：1999-12-17

申请人： Tong-Hua Kuan ,  Hui-Ling Wang ,  Ying-Lang Wang ,  Chin-Kun Lan

发明人： Tong-Hua Kuan ,  Hui-Ling Wang ,  Ying-Lang Wang ,  Chin-Kun Lan

IPC分类号： B24B100

CPC分类号： B24B37/345 ,  B24B37/0056 ,  B24B37/042 ,  B24D13/142

摘要： A multi-step chemical-mechanical polishing method for improving tungsten chemical-mechanical polishing (CMP) process is provided in the present invention. The method comprises following steps. First, a wafer is placed on a first pad of a CMP system, wherein a head fixes the wafer on the first pad. Then, the head is rotated and the wafer is polished on the first pad by using a tungsten slurry. Next, the wafer is transferred to place on a second pad of the CMP system, wherein the head fixes the wafer on the second pad. Following, the head is rotated and the wafer is polished on the second pad by using the tungsten slurry. Then, the wafer is cleaned on the second pad by using a de-ionic water. Next, the wafer is transferred to place on a third pad of the CMP system, wherein the head fixes the wafer on the third pad. Following, the wafer is cleaned on the third pad by using the de-ionic water. Last, the head is rotated and the wafer is polished on the third pad by using an oxide slurry, wherein a pH value of the tungsten slurry and a pH value of the oxide slurry are opposite.

摘要翻译： 本发明提供了一种用于改善钨化学机械抛光（CMP）工艺的多步化学机械抛光方法。 该方法包括以下步骤。 首先，将晶片放置在CMP系统的第一焊盘上，其中头部将晶片固定在第一焊盘上。 然后，头部旋转，并且通过使用钨浆料在第一焊盘上抛光晶片。 接下来，将晶片转移到CMP系统的第二焊盘上，其中头部将晶片固定在第二焊盘上。 接下来，头部旋转，并且通过使用钨浆料在第二垫上抛光晶片。 然后，通过使用脱离子水在第二焊盘上清洁晶片。 接下来，将晶片转移到CMP系统的第三焊盘上，其中头部将晶片固定在第三焊盘上。 接下来，通过使用去离子水在第三垫上清洁晶片。 最后，旋转头部，通过使用氧化物浆料在第三焊盘上抛光晶片，其中钨浆料的pH值和氧化物浆料的pH值相反。

公开(公告)号：US6046112A

公开(公告)日：2000-04-04

申请号：US211273

申请日：1998-12-14

申请人： Ying-Lang Wang

发明人： Ying-Lang Wang

IPC分类号： C09G1/02 ,  C09K3/14 ,  H01L21/00

CPC分类号： C09K3/1463 ,  C09G1/02

摘要： A CMP slurry comprising ZrO.sub.2 particles and a surfactant, comprising TMAH (Tetra-Methyl-Ammonium Hydroxide) or TBAH (Tetra-Butyl-Ammonium Hydroxide) in a water solution is suitable for polishing low dielectric constant k siloxane based SOG layers at a high polish removal rate and with high selectivity over deposited silicon oxide layers. Polish removal rates of up to 4000 Angstroms/min. are achieved at a selectivity ratio as high as 8.

摘要翻译： 包含ZrO 2颗粒和表面活性剂的CMP浆料在水溶液中包含TMAH（四甲基氢氧化铵）或TBAH（四丁基氢氧化铵））适用于在高抛光剂去除下抛光低介电常数k硅氧烷基SOG层 速率并且对沉积的氧化硅层具有高选择性。 波兰的去除率高达4000埃/分钟。 以高达8的选择比实现。

公开(公告)号：US5961725A

公开(公告)日：1999-10-05

申请号：US093030

申请日：1998-06-08

申请人： Ying-Lang Wang ,  Yu-Jen Yu

发明人： Ying-Lang Wang ,  Yu-Jen Yu

IPC分类号： C23C16/44 ,  C23C16/455 ,  C30B25/14 ,  C30B31/16 ,  C23C16/00

CPC分类号： C30B25/14 ,  C23C16/455 ,  C23C16/45591 ,  C30B31/16

摘要： An apparatus for producing thin film coatings and/or dopant levels on semiconductor wafers or other substrates with improved film growth uniformity (of thickness and composition) and/or dopant uniformity is provided. The apparatus is positioned in a furnace tube between the wafers and a gas inlet. The apparatus comprises a conical shaped baffle.

摘要翻译： 提供了一种用于在具有改善的膜生长均匀性（厚度和组成））和/或掺杂剂均匀性的半导体晶片或其它基底上制造薄膜涂层和/或掺杂剂水平的装置。 该设备位于晶片和气体入口之间的炉管中。 该装置包括锥形挡板。