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    Method to solve particle performance of FSG layer by using UFU season film for FSG process
    1.
    发明授权
    Method to solve particle performance of FSG layer by using UFU season film for FSG process 有权
    通过使用UFU季膜对FSG过程解决FSG层的粒子性能的方法

    公开(公告)号：US06479098B1

    公开(公告)日：2002-11-12

    申请号：US09747135

    申请日：2000-12-26

    申请人： Ming-Hwa Yoo ,  Yi-Lung Cheng ,  Szu-An Wu ,  Ying-Lang Wang

    发明人： Ming-Hwa Yoo ,  Yi-Lung Cheng ,  Szu-An Wu ,  Ying-Lang Wang

    IPC分类号： C23C1640

    CPC分类号： H01J37/32477 ,  C23C16/4404 ,  Y10T428/2495 ,  Y10T428/265

    摘要： A method for reducing contaminants in a processing chamber 10 having chamber plasma processing region components comprising the following steps. The chamber plasma processing region components are cleaned. The chamber is then seasoned as follows. A first USG layer is formed over the chamber plasma processing region components. An FSG layer is formed over the first USG layer. A second USG layer is formed over the FSG layer. Wherein the USG, FSG, and second USG layers comprise a UFU season film. A UFU season film coating the chamber plasma processing region components of a processing chamber comprises: an inner USG layer over the chamber plasma processing region components; an FSG layer over the inner USG layer; and an outer USG layer over the FSG layer.

    摘要翻译： 一种用于减少具有室等离子体处理区域部件的处理室10中的污染物的方法，包括以下步骤。 腔室等离子体处理区域部件被清洁。 然后如下调节室。 在室等离子体处理区域部件上形成第一USG层。 在第一USG层上形成FSG层。 在FSG层上形成第二个USG层。 其中USG，FSG和第二USG层包括UFU季电影。 UFU季涂膜处理室的室等离子体处理区域部件包括：室上的内部USG层等离子体处理区域部件; 内部USG层上的FSG层; 以及FSG层上的外部USG层。

    Method to solve particle performance of FSG layer by using UFU season film for FSG process
    3.
    发明授权
    Method to solve particle performance of FSG layer by using UFU season film for FSG process 失效
    通过使用UFU季膜对FSG过程解决FSG层的粒子性能的方法

    公开(公告)号：US06815072B2

    公开(公告)日：2004-11-09

    申请号：US10256714

    申请日：2002-09-27

    申请人： Ming-Hwa Yoo ,  Yi-Lung Cheng ,  Szu-An Wu ,  Ying-Lang Wang

    发明人： Ming-Hwa Yoo ,  Yi-Lung Cheng ,  Szu-An Wu ,  Ying-Lang Wang

    IPC分类号： B05C1100

    CPC分类号： H01J37/32477 ,  C23C16/4404 ,  Y10T428/2495 ,  Y10T428/265

    摘要： A method for reducing contaminants in a processing chamber 10 having chamber plasma processing region components comprising the following steps. The chamber plasma processing region components are cleaned. The chamber is then seasoned as follows. A first USG layer is formed over the chamber plasma processing region components. An FSG layer is formed over the first USG layer. A second USG layer is formed over the FSG layer. Wherein the USG, FSG, and second USG layers comprise a UFU season film. A UFU season film coating the chamber plasma processing region components of a processing chamber comprises: an inner USG layer over the chamber plasma processing region components; an FSG layer over the inner USG layer; and an outer USG layer over the FSG layer.

    Semiconductor chamber process apparatus and method
    5.
    发明授权
    Semiconductor chamber process apparatus and method 有权
    半导体室处理装置及方法

    公开(公告)号：US06802935B2

    公开(公告)日：2004-10-12

    申请号：US10103618

    申请日：2002-03-21

    申请人： Yi-Lung Cheng ,  Hui-Chi Lin ,  Szu-An Wu ,  Ying-Lang Wang

    发明人： Yi-Lung Cheng ,  Hui-Chi Lin ,  Szu-An Wu ,  Ying-Lang Wang

    IPC分类号： B65G4907

    CPC分类号： H01L21/67167 ,  C23C16/4405 ,  C23C16/54 ,  H01L21/67196 ,  Y10S414/135

    摘要： A semiconductor processing apparatus and method are disclosed herein, including a plurality of process chambers, wherein at least one semiconductor processing operation occurs within each process chamber among the plurality of process chambers. Additionally, the apparatus and method disclosed herein include a robot mechanism for rotating each process chamber among the plurality of process chambers upon completion of an associated semiconductor processing operation. Such a robot mechanism may comprise a plurality of robots. Specifically, such a plurality of robots may include six robots configured on an associated carousel.

    摘要翻译： 本文公开了包括多个处理室的半导体处理装置和方法，其中在多个处理室中的每个处理室内发生至少一个半导体处理操作。 此外，本文公开的装置和方法包括机器人机构，用于在完成相关联的半导体处理操作时在多个处理室中旋转每个处理室。 这样的机器人机构可以包括多个机器人。 具体地说，这样的多个机器人可以包括配置在相关转盘上的六个机器人。

    Forming Seed Layer in Nano-Trench Structure Using Net Deposition and Net Etch
    6.
    发明申请
    Forming Seed Layer in Nano-Trench Structure Using Net Deposition and Net Etch 审中-公开
    使用净沉积和净蚀刻在纳米沟槽结构中形成种子层

    公开(公告)号：US20090127097A1

    公开(公告)日：2009-05-21

    申请号：US11941435

    申请日：2007-11-16

    申请人： Kei-Wei Chen ,  Shih-Ho Lin ,  Yu-Sheng Wang ,  Szu-An Wu ,  Ying-Lang Wang

    发明人： Kei-Wei Chen ,  Shih-Ho Lin ,  Yu-Sheng Wang ,  Szu-An Wu ,  Ying-Lang Wang

    IPC分类号： C23C14/00

    CPC分类号： C23C14/345 ,  C23C14/046 ,  H01L21/76862 ,  H01L21/76873

    摘要： A method of forming an integrated circuit structure includes forming a dielectric layer; forming an opening in the dielectric layer; performing a net deposition step to form a seed layer having a portion in the opening, wherein the net deposition step comprises a first deposition and a first etching; performing a net etch step to the seed layer, wherein the net etch step comprises a first etching and a first deposition, wherein a portion of the seed layer remains after the net etch step; and growing a conductive material on the seed layer to fill a remaining portion of the opening.

    摘要翻译： 形成集成电路结构的方法包括形成电介质层; 在介电层中形成开口; 执行净沉积步骤以形成具有在开口中的一部分的种子层，其中所述净沉积步骤包括第一沉积和第一蚀刻; 对所述种子层进行净蚀刻步骤，其中所述净蚀刻步骤包括第一蚀刻和第一沉积，其中所述种子层的一部分在所述净蚀刻步骤之后保留; 以及在种子层上生长导电材料以填充开口的剩余部分。

    Method of manufacturing a very deep STI (shallow trench isolation)
    9.
    发明授权
    Method of manufacturing a very deep STI (shallow trench isolation) 有权
    制造非常深的STI（浅沟槽隔离）的方法

    公开(公告)号：US06436791B1

    公开(公告)日：2002-08-20

    申请号：US09880259

    申请日：2001-06-14

    申请人： Shih-Chi Lin ,  Szu-An Wu ,  Ying-Lang Wang ,  Guey-Bao Huang

    发明人： Shih-Chi Lin ,  Szu-An Wu ,  Ying-Lang Wang ,  Guey-Bao Huang

    IPC分类号： H01L21302

    CPC分类号： H01L21/76224

    摘要： A method of forming a shallow trench isolation structure comprising the following steps. A substrate having an upper surface is provided. A pad oxide layer is formed upon the substrate. A nitride layer is formed over the pad oxide layer. The nitride layer having an upper surface. A trench is formed by etching the nitride layer, pad oxide layer and a portion of the substrate. The trench having a bottom and side walls. An oxide film is deposited upon the etched nitride layer surface, and the bottom and side walls of trench. The oxide film is removed from over the etched nitride layer surface, and the bottom of the trench to expose a portion of substrate within the trench. The removal of oxide film leaving oxide spacers over the trench side walls. Epitaxial silicon is selectively deposited over the exposed portion of substrate, filling the trench. A thermal oxide layer is formed over the epitaxial silicon, annealing the interface between the epitaxial silicon and the oxide spacers. The etched nitride layer and the oxide layer from over the etched substrate; and a portion of the oxide spacers extending above the surface of the etched substrate are removed, whereby the shallow trench isolation structure is formed within the trench.

    摘要翻译： 一种形成浅沟槽隔离结构的方法，包括以下步骤。 提供具有上表面的基板。 衬底氧化层形成在衬底上。 在衬垫氧化物层上形成氮化物层。 氮化物层具有上表面。 通过蚀刻氮化物层，衬垫氧化物层和衬底的一部分来形成沟槽。 沟槽具有底部和侧壁。 在蚀刻的氮化物层表面和沟槽的底部和侧壁上沉积氧化物膜。 从蚀刻的氮化物层表面上方的氧化膜和沟槽的底部去除氧化膜，以露出沟槽内的衬底的一部分。 去除在沟槽侧壁上留下氧化物间隔物的氧化物膜。 外延硅被选择性地沉积在衬底的暴露部分上，填充沟槽。 在外延硅上形成热氧化层，退火外延硅与氧化物间隔物之间​​的界面。 蚀刻的氮化物层和来自蚀刻的衬底上的氧化物层; 并且去除在蚀刻的衬底的表面上方延伸的氧化物间隔物的一部分，由此在沟槽内形成浅沟槽隔离结构。