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    High voltage semiconductor device and manufacturing method thereof
    141.
    发明授权
    High voltage semiconductor device and manufacturing method thereof 有权

    公开(公告)号：US11923435B2

    公开(公告)日：2024-03-05

    申请号：US17723438

    申请日：2022-04-18

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Hsin-Han Wu ,  Kai-Kuen Chang ,  Ping-Hung Chiang

    IPC: H01L29/66 ,  H01L29/78

    CPC classification number: H01L29/6656 ,  H01L29/66674 ,  H01L29/7801

    Abstract: A high voltage semiconductor device includes a semiconductor substrate, a first drift region, a gate structure, a first sub gate structure, a first spacer structure, a second spacer structure, and a first insulation structure. The first drift region is disposed in the semiconductor substrate. The gate structure is disposed on the semiconductor substrate and separated from the first sub gate structure. The first sub gate structure and the first insulation structure are disposed on the first drift region. The first spacer structure is disposed on a sidewall of the gate structure. The second spacer structure is disposed on a sidewall of the first sub gate structure. At least a part of the first insulation structure is located between the first spacer structure and the second spacer structure. The first insulation structure is directly connected with the first drift region located between the first spacer structure and the second spacer structure.

    Semiconductor structure
    142.
    发明授权
    Semiconductor structure 有权

    公开(公告)号：US11923373B2

    公开(公告)日：2024-03-05

    申请号：US17502026

    申请日：2021-10-14

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Bo Tao ,  Li Wang ,  Ching-Yang Wen ,  Purakh Raj Verma ,  Zhibiao Zhou ,  Dong Yin ,  Gang Ren ,  Jian Xie

    IPC: H01L27/12 ,  G11C17/16 ,  H01L23/525 ,  H10B20/20 ,  H10B20/25

    CPC classification number: H01L27/1207 ,  G11C17/16 ,  G11C17/165 ,  H01L23/5252 ,  H10B20/20 ,  H10B20/25

    Abstract: A semiconductor structure includes a semiconductor on insulator (SOI) substrate, a first electrically conductive structure, and a second electrically conductive structure. The SOI substrate includes a base substrate, a buried insulation layer disposed on the base substrate, a semiconductor layer disposed on the buried insulation layer, and a trap rich layer disposed between the buried insulation layer and the base substrate. At least a part of the first electrically conductive structure and at least a part of the second electrically conductive structure are disposed in the trap rich layer. A part of the trap rich layer is disposed between the first electrically conductive structure and the second electrically conductive structure. The first electrically conductive structure, the second electrically conductive structure, and the trap rich layer disposed between the first electrically conductive structure and the second electrically conductive structure are at least a portion of an anti-fuse structure.

    HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD FOR FORMING THE SAME
    144.
    发明公开
    HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD FOR FORMING THE SAME 审中-公开

    公开(公告)号：US20240072153A1

    公开(公告)日：2024-02-29

    申请号：US18506101

    申请日：2023-11-09

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Po-Yu Yang ,  Hsun-Wen Wang

    IPC: H01L29/66 ,  H01L29/778

    CPC classification number: H01L29/66431 ,  H01L29/7786

    Abstract: A method for forming a high electron mobility transistor includes the steps of providing a substrate, forming a channel layer, a barrier layer, and a first passivation layer sequentially on the substrate, forming a plurality of trenches through at least a portion of the first passivation layer, forming a second passivation layer on the first passivation layer and covering along sidewalls and bottom surfaces of the trenches, and forming a conductive plate structure on the second passivation layer and filling the trenches.

    Resistive random access memory structure
    148.
    发明授权
    Resistive random access memory structure 有权

    公开(公告)号：US11917836B2

    公开(公告)日：2024-02-27

    申请号：US17513851

    申请日：2021-10-28

    Applicant: United Microelectronics Corp.

    Inventor： Zong-Han Lin

    IPC: H10N70/00 ,  H10B63/00

    CPC classification number: H10B63/30 ,  H10N70/841 ,  H10N70/8833

    Abstract: The invention provides a RRAM structure, which includes a substrate, a high voltage transistor, and a RRAM cell. The high voltage transistor includes a drift region, a gate structure, a source region, a drain region, and an isolation structure. The drift region is located in the substrate. The gate structure is located on the substrate and on a portion of the drift region. The source region and the drain region are located in the substrate on two sides of the gate structure. The drain region is located in the drift region. The isolation structure is located in the drift region and between the gate structure and the drain region. The RRAM cell includes a first electrode, a resistive switching layer, and a second electrode sequentially located on the drain region. The RRAM cell is electrically connected to the high voltage transistor.

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