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    REFERENCE VOLTAGE GENERATION APPARATUSES AND METHODS
    143.
    发明申请
    REFERENCE VOLTAGE GENERATION APPARATUSES AND METHODS 有权
    参考电压发生装置和方法

    公开(公告)号：US20160314836A1

    公开(公告)日：2016-10-27

    申请号：US14693275

    申请日：2015-04-22

    Applicant: Micron Technology, Inc.

    Inventor： Fabio Pellizzer

    IPC: G11C13/00

    CPC classification number: G11C13/0038 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/003 ,  G11C13/004 ,  G11C2013/0054 ,  G11C2213/76

    Abstract: A method and apparatuses for generating a reference voltage are disclosed. One example apparatus includes a current source coupled to a first power supply. The current source supplies a first current. A reference memory cell is coupled to the current source at a reference node. The reference memory cell has a select device comprising a chalcogenic semiconductor material. A clamp circuit is coupled between the reference memory cell and a second power supply. The clamp circuit is configured to control a second current such that when the first current and second current are substantially equal, the reference voltage generated at the reference node tracks a threshold voltage of the select device.

    Abstract translation: 公开了一种用于产生参考电压的方法和装置。 一个示例性设备包括耦合到第一电源的电流源。 电流源提供第一个电流。 参考存储器单元在参考节点处耦合到当前源。 参考存储单元具有包括硫属半导体材料的选择器件。 钳位电路耦合在参考存储单元和第二电源之间。 钳位电路被配置为控制第二电流，使得当第一电流和第二电流基本相等时，在参考节点处产生的参考电压跟踪选择装置的阈值电压。

    Memory Arrays and Methods of Forming Memory Arrays
    146.
    发明申请
    Memory Arrays and Methods of Forming Memory Arrays 有权
    内存数组和形成内存数组的方法

    公开(公告)号：US20160248010A1

    公开(公告)日：2016-08-25

    申请号：US15145654

    申请日：2016-05-03

    Applicant: Micron Technology, Inc.

    Inventor： Fabio Pellizzer

    IPC: H01L45/00

    CPC classification number: H01L45/1675 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/06 ,  H01L45/065 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/1666

    Abstract: Some embodiments include a memory array having a first series of access/sense lines which extend along a first direction, a second series of access/sense lines over the first series of access/sense lines and which extend along a second direction substantially orthogonal to the first direction, and memory cells vertically between the first and second series of access/sense lines. Each memory cell is uniquely addressed by a combination of an access/sense line from the first series and an access/sense line from the second series. The memory cells have programmable material. At least some of the programmable material within each memory cell is a polygonal structure having a sidewall that extends along a third direction which is different from the first and second directions. Some embodiments include methods of forming memory arrays.

    Abstract translation: 一些实施例包括具有沿着第一方向延伸的第一系列访问/感测线的存储器阵列，在第一系列存取/检测线上的第二系列存取/感测线，并且沿着基本上与第 第一方向和存储单元在第一和第二系列访问/感测线之间垂直。 每个存储单元通过来自第一系列的访问/感测线和来自第二系列的访问/感测线的组合唯一地寻址。 存储单元具有可编程材料。 每个存储单元内的可编程材料中的至少一些是具有沿着不同于第一和第二方向的第三方向延伸的侧壁的多边形结构。 一些实施例包括形成存储器阵列的方法。

    APPARATUSES AND METHODS OF READING MEMORY CELLS
    147.
    发明申请
    APPARATUSES AND METHODS OF READING MEMORY CELLS 有权
    读取记忆细胞的装置和方法

    公开(公告)号：US20160247562A1

    公开(公告)日：2016-08-25

    申请号：US14628824

    申请日：2015-02-23

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Innocenzo Tortorelli ,  Fabio Pellizzer ,  Ferdinando Bedeschi

    IPC: G11C13/00

    CPC classification number: G11C13/004 ,  G11C13/0004 ,  G11C13/0028 ,  G11C13/0033 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2013/0047 ,  G11C2013/0057 ,  G11C2213/72

    Abstract: A method is provided for a reading memory even if there is a threshold voltage in an overlapped threshold voltage (VTH) region between a first state distribution and a second state distribution. The method includes ramping a bias on a memory cell a first time to determine a first threshold voltage (VTH1) of the memory cell and determining whether the VTH1 is within the overlapped VTH region. Upon determination that the memory cell is within the overlapped VTH region, the method further includes applying a write pulse to the memory cell; ramping a bias on the memory cell a second time to determine a second threshold voltage (VTH2); and determining the state of the memory cell prior to receiving the write pulse based on a comparison between the VTH1 and the VTH2.

    Abstract translation: 即使在第一状态分布和第二状态分布之间的重叠阈值电压（VTH）区域中存在阈值电压，也为读取存储器提供了一种方法。 该方法包括首先对存储器单元上的偏置进行斜坡以确定存储器单元的第一阈值电压（VTH1），并确定VTH1是否在重叠的VTH区域内。 当确定存储器单元位于重叠的VTH区域内时，该方法还包括向存储器单元施加写入脉冲; 第二次使存储器单元上的偏置斜坡以确定第二阈值电压（VTH2）; 以及基于VTH1和VTH2之间的比较，在接收到写脉冲之前确定存储单元的状态。

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