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公开(公告)号:US12183685B2
公开(公告)日:2024-12-31
申请号:US18487879
申请日:2023-10-16
Applicant: Micron Technology, Inc.
Inventor: Fatma Arzum Simsek-Ege
IPC: H01L23/538 , G11C5/06 , H10B12/00
Abstract: A microelectronic device comprises a first microelectronic device structure and a second microelectronic device structure attached to the first microelectronic device structure. The first microelectronic device structure comprises memory arrays comprising memory cells comprising access devices and storage node devices, digit lines coupled to the access devices and extending in a first direction to a digit line exit region, and word lines coupled to the access devices and extending in a second direction to a word line exit region. The second microelectronic device structure comprises control logic devices over and in electrical communication with the memory cells. The microelectronic device further comprises contact structures individually in contact with the digit lines in the digit line exit region and in electrical communication with at least some of the control logic devices, at least one of the contact structures comprising a first cross-sectional area at an interface of the first microelectronic device structure and the second microelectronic device structure, and a second cross-sectional area at an interface of one of the digit lines and the at least one of the contact structures, the second cross-sectional area smaller than the first cross-sectional area. Related microelectronic devices, memory devices, electronic systems, and methods are also described.
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142.
公开(公告)号:US20240357793A1
公开(公告)日:2024-10-24
申请号:US18619425
申请日:2024-03-28
Applicant: Micron Technology, Inc.
Inventor: Fatma Arzum Simsek-Ege
IPC: H10B12/00
CPC classification number: H10B12/00
Abstract: A microelectronic device comprises a first transistor structure, a second transistor structure vertically overlying the first transistor structure, a storage device vertically overlying the second transistor structure, a first conductive contact structure contacting the first transistor structure, the second transistor structure, and a first electrode of the storage device, and a second conductive contact structure configured to be in electrical communication with the first transistor structure and the second transistor structure. Related memory devices and electronic systems are also described.
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143.
公开(公告)号:US12125796B2
公开(公告)日:2024-10-22
申请号:US18507908
申请日:2023-11-13
Applicant: Micron Technology, Inc.
Inventor: Fatma Arzum Simsek-Ege , Luoqi Li , Marsela Pontoh
IPC: H01L23/31 , H01L23/538 , H01L25/065
CPC classification number: H01L23/5385 , H01L23/31 , H01L23/5384 , H01L23/5386 , H01L25/0657
Abstract: Semiconductor die assemblies with decomposable materials, and associated methods and systems are disclosed. In an embodiment, a semiconductor die assembly includes a memory controller die carrying one or more memory dies attached to its first side. The semiconductor die assembly also includes a biodegradable structure attached to its second side opposite to the first side. The biodegradable structure includes a conductive material and an insulating material, both of which are biodegradable and disintegrate in a wet process. The biodegradable structure can be configured to couple the memory controller die with an interface die. In this manner, when the biodegradable structure disintegrates (e.g., dissolve) in the wet process, the memory controller carrying the memory dies can be separated from the interface die to reclaim the memory controller with the memory dies and the interface die.
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公开(公告)号:US20240290375A1
公开(公告)日:2024-08-29
申请号:US18409723
申请日:2024-01-10
Applicant: Micron Technology, Inc.
Inventor: Fatma Arzum Simsek-Ege , Beau D. Barry
IPC: G11C11/4091 , G11C5/06 , G11C11/408 , G11C11/4097
CPC classification number: G11C11/4091 , G11C5/063 , G11C11/4085 , G11C11/4097
Abstract: A microelectronic device includes a memory array structure and a control circuitry structure vertically overlying and bonded to the memory array structure. The memory array structure includes array regions respectively including memory cells, digit lines, and word lines within horizontal areas thereof. The control circuitry structure includes control circuitry regions, sense amplifier (SA) sections including SA circuitry, and sub-word line driver (SWD) sections including SWD circuitry. The control circuitry regions horizontally overlap the array regions of the memory array structure. The SA sections respectively horizontally overlap each of two of the control circuitry regions horizontally neighboring one another in a first direction. The SWD sections are respectively interposed between two other of the control circuitry regions horizontally neighboring one another in a second direction orthogonal to the first direction. Additional microelectronic devices, memory devices, and electronic systems are also described.
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公开(公告)号:US20240276736A1
公开(公告)日:2024-08-15
申请号:US18589134
申请日:2024-02-27
Applicant: Micron Technology, Inc.
Inventor: Daniele Vimercati , Fatma Arzum Simsek-Ege
CPC classification number: H10B53/30 , G11C11/2255 , H10B51/20 , H10B51/30 , H10B51/40 , H10B53/20 , H10B53/40
Abstract: Methods, systems, and devices for thin film transistor deck selection in a memory device are described. A memory device may include memory arrays arranged in a stack of decks formed over a substrate, and deck selection components distributed among the layers to leverage common substrate-based circuitry. For example, each memory array of the stack may include a set of digit lines of a corresponding deck, and deck selection circuitry operable to couple the set of digit lines with a column decoder that is shared among multiple decks. To access memory cells of a selected memory array on one deck, the deck selection circuitry corresponding to the memory array may each be activated, while the deck selection circuitry corresponding to a non-selected memory array on another deck may be deactivated. The deck selection circuitry, such as transistors, may leverage thin-film manufacturing techniques, such as various techniques for forming vertical transistors.
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公开(公告)号:US12051459B2
公开(公告)日:2024-07-30
申请号:US17893654
申请日:2022-08-23
Applicant: Micron Technology, Inc.
Inventor: Fatma Arzum Simsek-Ege , Mingdong Cui
IPC: G11C16/10 , G11C11/408 , H10B80/00
CPC classification number: G11C11/4085 , G11C11/4087 , H10B80/00
Abstract: Methods, systems, and devices for word line drivers for multiple-die memory devices are described. A memory device may include a first semiconductor die associated with at least memory cells and corresponding access lines of the memory device, and a second semiconductor die associated with at least access line driver circuitry of the memory device. The second semiconductor die may be located in contact with or otherwise adjacent to the first semiconductor die, and electrical contacts may be formed to couple the access line driver circuitry of the second semiconductor die with the access line conductors of the first semiconductor die. For example, cavities may be formed through the second semiconductor die and at least a portion of the first semiconductor die, and the electrical contacts may be formed between the semiconductor dies at least in part from forming a conductive material in the cavities.
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公开(公告)号:US12033753B2
公开(公告)日:2024-07-09
申请号:US16989749
申请日:2020-08-10
Applicant: Micron Technology, Inc.
Inventor: Gitanjali T. Ghosh , Irene K. Thompson , Jessica M. Maderos , Hongmei Wang , Fatma Arzum Simsek-Ege , Kathryn H. Russo
Abstract: Systems, apparatuses, and methods related to medical device data analysis are described. In some examples, a medical device is implanted in a user of the medical device and the data generated by the medical device is not easily accessible to the user. In an example, a controller can be configured to receive, by a mobile device coupled to a medical device, data from the medical device, where the data is a part of a baseline dataset related to the medical device. The controller can be configured to receive different data from the medical device, where the different data is received from the medical device as the different data is generated by the medical device, analyze the data from the medical device and the different data generated by the medical device, and perform an action based on the analyzed data and the different data generated by the medical device.
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公开(公告)号:US20240170427A1
公开(公告)日:2024-05-23
申请号:US18429311
申请日:2024-01-31
Applicant: Micron Technology, Inc.
Inventor: Fatma Arzum Simsek-Ege , Yuan He
IPC: H01L23/00 , G11C11/408 , G11C11/4091 , H01L25/00 , H01L25/065 , H01L25/18 , H10B12/00
CPC classification number: H01L24/08 , G11C11/4085 , G11C11/4091 , H01L24/80 , H01L25/0657 , H01L25/18 , H01L25/50 , H10B12/30 , H10B12/50 , H01L2224/08145 , H01L2224/80895 , H01L2224/80896 , H01L2924/1431 , H01L2924/1436
Abstract: A microelectronic device comprises a first microelectronic device structure comprising a stack structure comprising conductive structures vertically alternating with insulative structures, a staircase structure within the stack structure, and vertical stacks of memory cells. Each vertical stack of memory cells individually comprises a vertical stack of capacitor structures, transistor structures each individually neighboring a capacitor structure of the capacitor structures, and a conductive pillar structure vertically extending through the transistor structures. The microelectronic device further comprises a second microelectronic device structure attached to the first microelectronic device structure, the second microelectronic device structure comprising a sub word line driver region comprising complementary metal-oxide-semiconductor (CMOS) circuits vertically overlying and within a horizontal area of the staircase structure, and conductive contact structures vertically extending between steps of the staircase structure and the sub word line driver region. Related memory devices, electronic systems, and methods are also described.
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149.
公开(公告)号:US20240079338A1
公开(公告)日:2024-03-07
申请号:US18507908
申请日:2023-11-13
Applicant: Micron Technology, Inc.
Inventor: Fatma Arzum Simsek-Ege , Luoqi Li , Marsela Pontoh
IPC: H01L23/538 , H01L23/31 , H01L25/065
CPC classification number: H01L23/5385 , H01L23/31 , H01L23/5384 , H01L23/5386 , H01L25/0657
Abstract: Semiconductor die assemblies with decomposable materials, and associated methods and systems are disclosed. In an embodiment, a semiconductor die assembly includes a memory controller die carrying one or more memory dies attached to its first side. The semiconductor die assembly also includes a biodegradable structure attached to its second side opposite to the first side. The biodegradable structure includes a conductive material and an insulating material, both of which are biodegradable and disintegrate in a wet process. The biodegradable structure can be configured to couple the memory controller die with an interface die. In this manner, when the biodegradable structure disintegrates (e.g., dissolve) in the wet process, the memory controller carrying the memory dies can be separated from the interface die to reclaim the memory controller with the memory dies and the interface die.
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公开(公告)号:US20240047450A1
公开(公告)日:2024-02-08
申请号:US18491694
申请日:2023-10-20
Applicant: Micron Technology, Inc.
Inventor: Fatma Arzum Simsek-Ege , Kunal R. Parekh
CPC classification number: H01L25/18 , H01L25/50 , H01L24/83 , H10B12/33 , H10B12/036 , H10B12/482 , H10B12/485 , H10B12/488 , H01L2224/83895 , H01L2224/83896
Abstract: A method of forming a microelectronic device comprises forming a microelectronic device structure assembly comprising memory cells, digit lines coupled to the memory cells, word lines coupled to the memory cells, and isolation material overlying the memory cells, the digit lines, and the word lines. An additional microelectronic device structure assembly comprising control logic devices and additional isolation material overlying the control logic devices is formed. The additional isolation material of the additional microelectronic device structure assembly is bonded to the isolation material of the microelectronic device structure assembly to attach the additional microelectronic device structure assembly to the microelectronic device structure assembly. The memory cells are electrically connected to at least some of the control logic devices after bonding the additional isolation material to the isolation material. Microelectronic devices, electronic systems, and additional methods are also described.
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