DOPANT CONFIGURATION IN IMAGE SENSOR PIXELS
    142.
    发明申请
    DOPANT CONFIGURATION IN IMAGE SENSOR PIXELS 审中-公开
    图像传感器像素中的DOPANT配置

    公开(公告)号:US20160071892A1

    公开(公告)日:2016-03-10

    申请号:US14478931

    申请日:2014-09-05

    Abstract: An image sensor pixel including a photodiode includes a first dopant region disposed within a semiconductor layer and a second dopant region disposed above the first dopant region and within the semiconductor layer. The second dopant region contacts the first dopant region and the second dopant region is of an opposite majority charge carrier type as the first dopant region. A third dopant region is disposed above the first dopant region and within the semiconductor layer. The third dopant region is of a same majority charge carrier type as the second dopant region but has a greater concentration of free charge carriers than the second dopant region. A transfer gate is positioned to transfer photogenerated charge from the photodiode. The second dopant region extends closer to an edge of the transfer gate than the third dopant region.

    Abstract translation: 包括光电二极管的图像传感器像素包括设置在半导体层内的第一掺杂区和设置在第一掺杂区之上和半导体层内的第二掺杂区。 第二掺杂剂区域接触第一掺杂剂区域,并且第二掺杂剂区域具有与第一掺杂剂区域相反的多数电荷载流子类型。 第三掺杂剂区域设置在第一掺杂剂区域之上和半导体层内。 第三掺杂剂区域具有与第二掺杂剂区域相同的多数电荷载流子类型,但是具有比第二掺杂剂区域更大的自由电荷载流子浓度。 转移门被定位成从光电二极管转移光生电荷。 第二掺杂剂区域比第三掺杂剂区域更靠近传输栅极的边缘延伸。

    Negatively charged layer to reduce image memory effect
    143.
    发明授权
    Negatively charged layer to reduce image memory effect 有权
    负电荷层降低图像记忆效应

    公开(公告)号:US09105767B2

    公开(公告)日:2015-08-11

    申请号:US14331652

    申请日:2014-07-15

    Abstract: An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. A contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. The first polarity charge layer is disposed between a first one of a plurality of passivation layers and a second one of the plurality of passivation layers disposed over the photodiode region.

    Abstract translation: 图像传感器像素包括设置在半导体层中的具有第一极性掺杂型的光电二极管区域。 具有第二极性掺杂型的钉扎表面层设置在半导体层中的光电二极管区域的上方。 第一极性电荷层设置在光电二极管区域附近的钉扎表面层附近。 接触蚀刻停止层设置在靠近第一极性电荷层的光电二极管区域的上方。 第一极性电荷层设置在钉扎表面层和接触蚀刻停止层之间,使得第一极性电荷层抵消在接触蚀刻停止层中感应的具有第二极性的电荷。 第一极性电荷层设置在多个钝化层中的第一个和设置在光电二极管区域上的多个钝化层中的第二钝化层之间。

    Image sensor pixel cell with global shutter having narrow spacing between gates
    144.
    发明授权
    Image sensor pixel cell with global shutter having narrow spacing between gates 有权
    具有全局快门的图像传感器像素单元门之间的间距窄

    公开(公告)号:US08835211B1

    公开(公告)日:2014-09-16

    申请号:US13901958

    申请日:2013-05-24

    Abstract: A pixel cell includes a photodiode, a storage transistor, a transfer transistor and an output transistor disposed in a semiconductor substrate. The transfer transistor selectively transfers image charge accumulated in the photodiode from the photodiode to the storage transistor. The output transistor selectively transfers the image charge from the storage transistor to a readout node. A first isolation fence is disposed over the semiconductor substrate separating a transfer gate of the transfer transistor from a storage gate of the storage transistor. A second isolation fence is disposed over the semiconductor substrate separating the storage gate from an output gate of the output transistor. Thicknesses of the first and second isolation fences are substantially equal to spacing distances between the transfer gate and the storage gate, and between the storage gate and the output gate, respectively.

    Abstract translation: 像素单元包括设置在半导体衬底中的光电二极管,存储晶体管,传输晶体管和输出晶体管。 转移晶体管将从光电二极管累积的图像电荷选择性地转移到存储晶体管。 输出晶体管将图像电荷从存储晶体管选择性地传输到读出节点。 第一隔离栅栏设置在半导体衬底上,用于将转移晶体管的转移栅极与存储晶体管的存储栅极分开。 第二隔离栅栏设置在半导体衬底上,以将存储栅极与输出晶体管的输出栅极分离。 第一和第二隔离栅栏的厚度分别基本上等于传输栅极和存储栅极之间以及存储栅极和输出栅极之间的间隔距离。

    HIGH DYNAMIC RANGE PIXEL HAVING A PLURALITY OF PHOTODIODES WITH A SINGLE IMPLANT
    145.
    发明申请
    HIGH DYNAMIC RANGE PIXEL HAVING A PLURALITY OF PHOTODIODES WITH A SINGLE IMPLANT 审中-公开
    具有单一植入物的多种光电子的高动态范围像素

    公开(公告)号:US20140246561A1

    公开(公告)日:2014-09-04

    申请号:US13784351

    申请日:2013-03-04

    Abstract: A high dynamic range image sensor pixel includes a short integration photodiode and a long integration photodiode disposed in semiconductor material. The long integration photodiode has a light exposure area that is substantially larger than a light exposure area of the short integration photodiode. The light exposure area of the short integration photodiode has a first doping concentration from a first doping implantation. The light exposure area of the long integration photodiode includes at least one implanted portion having the first doping concentration from the first doping implantation. The light exposure area of the long integration photodiode further includes at least one non-implanted portion photomasked from the first doping implantation such that a combined doping concentration of the implanted and non-implanted portions of the light exposure area of the long integration photodiode is less than the first doping concentration of the light exposure area of the short integration photodiode.

    Abstract translation: 高动态范围图像传感器像素包括短集成光电二极管和设置在半导体材料中的长积分光电二极管。 长积分光电二极管的曝光面积远大于短积分光电二极管的曝光面积。 短积分光电二极管的曝光区域具有来自第一掺杂注入的第一掺杂浓度。 长积分光电二极管的曝光区域包括具有来自第一掺杂注入的第一掺杂浓度的至少一个注入部分。 长积分光电二极管的曝光区域还包括从第一掺杂注入光掩模的至少一个非注入部分,使得长积分光电二极管的曝光区域的注入和未注入部分的组合掺杂浓度较小 比第一掺杂浓度的曝光区域短的集成光电二极管。

    Partial buried channel transfer device in image sensors
    146.
    发明授权
    Partial buried channel transfer device in image sensors 有权
    图像传感器中部分隐埋通道传输装置

    公开(公告)号:US08809925B2

    公开(公告)日:2014-08-19

    申请号:US13649842

    申请日:2012-10-11

    CPC classification number: H01L27/14609 H01L27/14616

    Abstract: An image sensor pixel includes a photosensitive element, a floating diffusion (“FD”) region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The FD region is disposed in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the FD region to selectively transfer the image charge from the photosensitive element to the FD region. The transfer device includes a gate, a buried channel dopant region and a surface channel region. The gate is disposed between the photosensitive element and the FD region. The buried channel dopant region is disposed adjacent to the FD region and underneath the gate. The surface channel region is disposed between the buried channel dopant region and the photosensitive element and disposed underneath the gate.

    Abstract translation: 图像传感器像素包括感光元件,浮动扩散(“FD”)区域和传送装置。 感光元件设置在基板层中,用于响应于光积累图像电荷。 FD区域设置在基板层中以从感光元件接收图像电荷。 转印装置设置在感光元件和FD区之间以选择性地将图像电荷从感光元件转移到FD区域。 转移装置包括栅极,掩埋沟道掺杂区域和表面沟道区域。 栅极设置在感光元件和FD区域之间。 掩埋沟道掺杂区域与FD区域相邻并且位于栅极下方。 表面沟道区域设置在掩埋沟道掺杂区域和感光元件之间并且设置在栅极下方。

    NEGATIVELY CHARGED LAYER TO REDUCE IMAGE MEMORY EFFECT
    147.
    发明申请
    NEGATIVELY CHARGED LAYER TO REDUCE IMAGE MEMORY EFFECT 有权
    有意义的电荷层减少图像记忆效应

    公开(公告)号:US20140117485A1

    公开(公告)日:2014-05-01

    申请号:US13660774

    申请日:2012-10-25

    Abstract: An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. The second polarity is opposite from the first polarity. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. An contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. A passivation layer is also disposed over the photodiode region between the pinning surface layer and the contact etch stop layer.

    Abstract translation: 图像传感器像素包括设置在半导体层中的具有第一极性掺杂型的光电二极管区域。 具有第二极性掺杂型的钉扎表面层设置在半导体层中的光电二极管区域的上方。 第二极性与第一极性相反。 第一极性电荷层设置在光电二极管区域附近的钉扎表面层附近。 接触蚀刻停止层设置在靠近第一极性电荷层的光电二极管区域的上方。 第一极性电荷层设置在钉扎表面层和接触蚀刻停止层之间,使得第一极性电荷层抵消在接触蚀刻停止层中感应的具有第二极性的电荷。 钝化层也设置在钉扎表面层和接触蚀刻停止层之间的光电二极管区域之上。

    Pixel, associated image sensor, and method

    公开(公告)号:US11843019B2

    公开(公告)日:2023-12-12

    申请号:US16689847

    申请日:2019-11-20

    CPC classification number: H01L27/14645 H01L27/14603 H01L27/14683

    Abstract: A pixel includes a semiconductor substrate, a low-κ dielectric, and a photodiode region in the semiconductor substrate. The semiconductor substrate has a substrate top surface that forms a trench. The trench extends into the semiconductor substrate and has a trench depth relative to a planar region of the substrate top surface surrounding the trench. The low-κ dielectric is in the trench between the trench depth and a low-κ depth with respect to the planar region. The low-κ depth is less than the trench depth. The photodiode region is in the semiconductor substrate and includes (i) a bottom photodiode section beneath the trench and (ii) a top photodiode section adjacent to the trench. The top photodiode section begins at a photodiode depth, with respect to the planar region, that is less than the low-κ depth, and extends toward and adjoining the bottom photodiode section.

    Pixel-array substrate
    149.
    发明授权

    公开(公告)号:US11810931B2

    公开(公告)日:2023-11-07

    申请号:US17220651

    申请日:2021-04-01

    Inventor: Hui Zang Gang Chen

    Abstract: A pixel-array substrate includes (i) a semiconductor substrate including a photodiode region and a floating diffusion region, and (ii) a vertical-transfer-gate structure that includes a trench and a gate electrode. The trench is defined by a bottom surface and a sidewall surface of the substrate each located between a front substrate-surface and a back substrate-surface thereof. The trench extends into the substrate. In a cross-sectional plane perpendicular to the front substrate-surface and intersecting the floating diffusion region, the photodiode region, and the sidewall surface, (a) the trench is located between the floating diffusion region and the photodiode region, and (b) a top section of the sidewall surface is adjacent to the floating diffusion region. A gate electrode partially fills the trench such that the top section and a conductive-surface of the gate electrode in-part define a recess located between the floating diffusion region and the gate electrode.

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