Wireless power feeding system and wireless power feeding method
    154.
    发明授权
    Wireless power feeding system and wireless power feeding method 有权
    无线供电系统和无线供电方式

    公开(公告)号:US08836170B2

    公开(公告)日:2014-09-16

    申请号:US13189816

    申请日:2011-07-25

    摘要: An object is to provide a power feeding system and a power feeding method which are more convenient for a power feeding user at the power receiving end. An object is to provide a power feeding system and a power feeding method which also allow a power feeding provider (a company) which feeds power (at the power transmitting end) to supply power without waste. A power feeding device which wirelessly supplies power to a power receiver detects the position and the resonant frequency of the power receiver to be supplied with power, and controls the frequency of a power signal to be transmitted to the power receiver on the basis of the information. An efficient power feeding service can be offered by transmitting a power signal to the power receiver at an optimum frequency for high power transmission efficiency.

    摘要翻译: 本发明的目的是提供一种供电系统和馈电方法,其对于电力接收端的馈电用户更为方便。 本发明的目的是提供一种馈电系统和馈电方法,其还允许馈电供应商(在发电端发电)供电而不浪费电力。 向功率接收器无线供电的供电装置检测供电电源的位置和谐振频率,并根据信息控制发送到电力接收器的电力信号的频率 。 通过以最佳频率向功率接收器发送功率信号以实现高功率传输效率,可以提供有效的馈电服务。

    Logic circuit and semiconductor device
    158.
    发明授权
    Logic circuit and semiconductor device 有权
    逻辑电路和半导体器件

    公开(公告)号:US08570070B2

    公开(公告)日:2013-10-29

    申请号:US13530384

    申请日:2012-06-22

    IPC分类号: H03K19/20

    摘要: In a logic circuit where clock gating is performed, the standby power is reduced or malfunction is suppressed. The logic circuit includes a transistor which is in an off state where a potential difference exists between a source terminal and a drain terminal over a period during which a clock signal is not supplied. A channel formation region of the transistor is formed using an oxide semiconductor in which the hydrogen concentration is reduced. Specifically, the hydrogen concentration of the oxide semiconductor is 5×1019 (atoms/cm3) or lower. Thus, leakage current of the transistor can be reduced. As a result, in the logic circuit, reduction in standby power and suppression of malfunction can be achieved.

    摘要翻译: 在执行时钟门控的逻辑电路中,待机功率降低或故障被抑制。 该逻辑电路包括在不提供时钟信号的时段内处于源极端子和漏极端子之间存在电位差的关断状态的晶体管。 使用其中氢浓度降低的氧化物半导体形成晶体管的沟道形成区域。 具体地说,氧化物半导体的氢浓度为5×1019(原子/ cm3)以下。 因此,可以减小晶体管的漏电流。 结果,在逻辑电路中,可以实现待机功率的降低和故障的抑制。

    SEMICONDUCTOR DEVICE
    160.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20120195115A1

    公开(公告)日:2012-08-02

    申请号:US13356828

    申请日:2012-01-24

    IPC分类号: G11C11/34 H01L27/108

    摘要: A first field-effect transistor provided over a substrate in which an insulating region is provided over a first semiconductor region and a second semiconductor region is provided over the insulating region; an insulating layer provided over the substrate; a second field-effect transistor that is provided one flat surface of the insulating layer and includes an oxide semiconductor layer; and a control terminal are provided. The control terminal is formed in the same step as a source and a drain of the second field-effect transistor, and a voltage for controlling a threshold voltage of the first field-effect transistor is supplied to the control terminal.

    摘要翻译: 提供在绝缘区域上方设置有在第一半导体区域和第二半导体区域上设置绝缘区域的衬底上的第一场效应晶体管; 设置在所述基板上的绝缘层; 第二场效应晶体管,其设置在所述绝缘层的一个平面上,并且包括氧化物半导体层; 并提供控制终端。 控制端子以与第二场效应晶体管的源极和漏极相同的步骤形成,并且用于控制第一场效应晶体管的阈值电压的电压被提供给控制端子。