公开(公告)号：US09768341B2

公开(公告)日：2017-09-19

申请号：US14259344

申请日：2014-04-23

Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO., LTD.

Inventor： Jing-En Luan

IPC: H01L31/173 ,  H01L31/0203 ,  H01L31/0232 ,  G01S7/481 ,  G01S17/02 ,  H01L23/00 ,  G01S17/08

CPC classification number: H01L31/173 ,  G01S7/4813 ,  G01S17/026 ,  G01S17/08 ,  H01L24/19 ,  H01L31/0203 ,  H01L31/02327 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A proximity detector device may include a first interconnect layer including a first dielectric layer, and first electrically conductive traces carried thereby, an IC layer above the first interconnect layer and having an image sensor IC, and a light source IC laterally spaced from the image sensor IC. The proximity detector device may include a second interconnect layer above the IC layer and having a second dielectric layer, and second electrically conductive traces carried thereby. The second interconnect layer may have first and second openings therein respectively aligned with the image sensor IC and the light source IC. Each of the image sensor IC and the light source IC may be coupled to the first and second electrically conductive traces. The proximity detector device may include a lens assembly above the second interconnect layer and having first and second lenses respectively aligned with the first and second openings.

公开(公告)号：US09661701B2

公开(公告)日：2017-05-23

申请号：US14966662

申请日：2015-12-11

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Tao Tao Huang ,  Yi Jun Duan

IPC: H05B41/28 ,  H05B33/08

CPC classification number: H05B33/0851 ,  H03F3/45215 ,  H03F2200/351 ,  H05B33/0812 ,  H05B33/0815 ,  H05B33/0827 ,  H05B33/0887 ,  Y02B20/341 ,  Y02B20/347

Abstract: A driving apparatus configured to drive a light emitting device includes a driving current source module operable to supply current to the light emitting device via a node during operation. A protection module coupled to the node and the driving current source module selectively injects current to the node during operation. The driving current source module is controlled based on a detection result of a voltage on the node.

公开(公告)号：US09532142B2

公开(公告)日：2016-12-27

申请号：US15158854

申请日：2016-05-19

Applicant: STMicroelectronics (Shenzhen) R&D Co., Ltd. ,  STMicroelectronics S.r.l

Inventor： XiangSheng Li ,  Cristiano Meroni ,  Mei Yang ,  Xian Feng Xiong

IPC: H04R3/00 ,  H03G11/00 ,  H03F1/52 ,  H03G3/34 ,  H03F3/21 ,  H03F3/183 ,  H04R1/00

CPC classification number: H03G3/348 ,  H03F1/52 ,  H03F3/183 ,  H03F3/21 ,  H03F2200/321 ,  H03F2200/375 ,  H03F2200/471 ,  H03F2200/78 ,  H03G11/00 ,  H04R1/00 ,  H04R3/007 ,  H04R2201/028 ,  H04R2499/13

Abstract: A digital circuit can be used in a speaker system. An intermediate node provides a speaker protection control signal. A first latch for receives an offset control signal. A first logic gate receives a play control signal, the offset control signal, and the speaker protection control signal. A second logic gate is coupled to the first latch for receiving the play control signal and the speaker protection control signal. A second latch is coupled to the first logic gate for providing a forced mute signal. A third latch is coupled to the second logic gate and to the intermediate node.

Abstract translation: 数字电路可用于扬声器系统。 中间节点提供扬声器保护控制信号。 用于接收偏移控制信号的第一锁存器。 第一逻辑门接收播放控制信号，偏移控制信号和扬声器保护控制信号。 第二逻辑门耦合到第一锁存器，用于接收播放控制信号和扬声器保护控制信号。 第二锁存器耦合到第一逻辑门以提供强制静音信号。 第三锁存器耦合到第二逻辑门和中间节点。

公开(公告)号：US09436206B2

公开(公告)日：2016-09-06

申请号：US14519225

申请日：2014-10-21

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F3/20 ,  G05F3/26 ,  G05F1/46 ,  G05F3/24

CPC classification number: G05F3/267 ,  G05F1/463 ,  G05F3/242

Abstract: A reference current path carries a reference current. A first transistor is coupled to the reference current path. A second transistor is also coupled to the reference current path. The first and second transistors are connected in parallel to carry the reference current. The first transistor is biased by a first voltage (which is a bandgap voltage plus a threshold voltage). The second transistor is biased by a second voltage (which is a PTAT voltage plus a threshold voltage). The first and second transistors are thus biased by voltages having different and opposite temperature coefficients with a result that the temperature coefficients of the currents flowing in the first and second transistors are opposite and the reference current accordingly has a low temperature coefficient.

Abstract translation: 参考电流路径携带参考电流。 第一晶体管耦合到参考电流路径。 第二晶体管也耦合到参考电流路径。 第一和第二晶体管并联连接以承载参考电流。 第一晶体管被第一电压（其是带隙电压加上阈值电压）偏置。 第二晶体管被第二电压（其为PTAT电压加上阈值电压）偏置。 因此，第一和第二晶体管被具有不同和相反的温度系数的电压偏置，结果是在第一和第二晶体管中流动的电流的温度系数相反，并且参考电流相应地具有低的温度系数。

公开(公告)号：US09365415B2

公开(公告)日：2016-06-14

申请号：US14587324

申请日：2014-12-31

Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO., LTD.

Inventor： Jing-En Luan

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81C1/0023 ,  B81B7/007 ,  H01L24/97 ,  H01L2224/32145 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An electronic device may include first and second laterally spaced apart interconnect substrates defining a slotted opening, and a first IC in the slotted opening and electrically coupled to one or more of the first and second interconnect substrates. The electronic device may include a first other IC over the first IC and electrically coupled to one or more of the first and second interconnect substrates, and encapsulation material over the first and second interconnect substrates, the first IC, and the first other IC.

Abstract translation: 电子设备可以包括限定开槽开口的第一和第二横向间隔开的互连基板，以及开槽开口中的第一IC，并且电耦合到第一和第二互连基板中的一个或多个。 电子器件可以包括位于第一IC上的第一其它IC，并且电耦合到第一和第二互连衬底中的一个或多个，以及在第一和第二互连衬底，第一IC和第一其他IC上的封装材料。

公开(公告)号：US20160118894A1

公开(公告)日：2016-04-28

申请号：US14538115

申请日：2014-11-11

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Hai Bo Zhang ,  Jerry Huang

IPC: H02M3/158

CPC classification number: H02M3/1582 ,  H02M1/08 ,  H02M3/156 ,  H02M3/158 ,  H02M2001/0009 ,  H02M2001/0032 ,  H03K2217/0063 ,  H03K2217/0072 ,  H03K2217/0081 ,  Y02B70/16

Abstract: A driver circuit includes a high-side power transistor having a source-drain path coupled between a first node and a second node and a low-side power transistor having a source-drain path coupled between the second node and a third node. A high-side drive circuit, having an input configured to receive a drive signal, includes an output configured to drive a control terminal of said high-side power transistor. The high-side drive circuit is configured to operate as a capacitive driver. A low-side drive circuit, having an input configured to receive a complement drive signal, includes an output configured to drive a control terminal of said low-side power transistor. The low-side drive circuit is configured to operate as a level-shifting driver.

Abstract translation: 驱动器电路包括具有耦合在第一节点和第二节点之间的源极 - 漏极路径的高侧功率晶体管和具有耦合在第二节点和第三节点之间的源极 - 漏极路径的低侧功率晶体管。 具有配置为接收驱动信号的输入的高侧驱动电路包括被配置为驱动所述高侧功率晶体管的控制端子的输出。 高侧驱动电路被配置为作为电容驱动器工作。 具有配置为接收补码驱动信号的输入的低侧驱动电路包括被配置为驱动所述低侧功率晶体管的控制端子的输出。 低侧驱动电路被配置为作为电平转换驱动器工作。

公开(公告)号：US09323273B2

公开(公告)日：2016-04-26

申请号：US14504494

申请日：2014-10-02

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Meng Wang ,  Xue Lian Zhou

IPC: H05B37/02 ,  G05F3/26 ,  H05B33/08

CPC classification number: G05F3/262 ,  H03M1/745 ,  H05B33/0809 ,  H05B33/0815

Abstract: A current source circuit is configured to receive a reference current at the input circuit path of a current mirror circuit. The current mirror circuit mirrors the reference current and generates mirror currents at a number of output circuit paths. A corresponding number of control transistors are connected in series with the output circuit paths. Each control transistor is selectively actuated in response to a control signal. A decoder circuit is configured to receive a variable control signal and generate actuation signals in response thereto to selective actuate the control transistors to pass the mirror current to an output node. At the output node, the passed mirror currents are summed to generate a variable output current. The variable current is monotonically modulated in response to the variable control signal.

Abstract translation: 电流源电路被配置为在电流镜电路的输入电路路径处接收参考电流。 电流镜电路反映参考电流并在多个输出电路路径上产生镜像电流。 相应数量的控制晶体管与输出电路路径串联连接。 每个控制晶体管响应于控制信号被选择性地致动。 解码器电路被配置为接收可变控制信号并响应于此产生致动信号以选择性地致动控制晶体管以将镜电流传递到输出节点。 在输出节点，将通过的镜像电流相加以产生可变输出电流。 可变电流响应于可变控制信号被单调调制。

公开(公告)号：US09312849B2

公开(公告)日：2016-04-12

申请号：US14310952

申请日：2014-06-20

Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD.

Inventor： Min Chen ,  Wen Liu ,  HongXia Li ,  XiaoWu Dai

IPC: H03K17/16

CPC classification number: H03K17/167 ,  H03K17/163 ,  H03K17/164 ,  H03K17/166

Abstract: A switching circuit includes a first input stage having an input for receiving a first input signal, an output, and a power terminal for receiving an increasing analog current, a second input stage having an input for receiving a second input signal, an output, and a power terminal for receiving a decreasing analog current, and an output node coupled to the outputs of the first input stage and the second input stage for providing a switched output signal. An output stage is coupled between the first and second input stages and the output node. The first and second input stages are operational amplifiers.

Abstract translation: 开关电路包括：第一输入级，具有用于接收第一输入信号的输入端，输出端和用于接收增加的模拟电流的电源端;第二输入级，具有用于接收第二输入信号的输入端，输出端，以及 用于接收减小的模拟电流的电源端子，以及耦合到第一输入级和第二输入级的输出的输出节点，用于提供开关输出信号。 输出级耦合在第一和第二输入级与输出节点之间。 第一和第二输入级是运算放大器。

公开(公告)号：US09177939B2

公开(公告)日：2015-11-03

申请号：US14553799

申请日：2014-11-25

Applicant: STMicroelectronics (Shenzhen) R&D Co., Ltd.

Inventor： Jing-En Luan

IPC: H01L23/00 ,  H01L23/495 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L24/83 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49551 ,  H01L23/49562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L24/84 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/29111 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40499 ,  H01L2224/73263 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/92246 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/01082 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2924/00012

Abstract: Embodiments of the present disclosure relate to a leadless surface mount assembly package, an electronic device, and a method for forming a surface mount assembly package, which package comprising: a first lead; a second lead; a chip fixed on an upper surface of the first lead; a clip coupled to the second lead, a lower surface of the clip being fixed to an upper surface of the chip. The surface mount assembly package further comprises a molding compound for molding the first lead, the second lead, the chip, and the clip, wherein ends of the first lead and the second lead are only exposed from the molding compound, without outward extending from the molding compound. By using the embodiments of the present disclosure, costs can be saved and processing flow can be simplified, and a new-model leadless surface mount assembly package is obtained.

Abstract translation: 本公开的实施例涉及无引线表面安装组件封装，电子器件和用于形成表面安装组件封装的方法，该封装包括：第一引线; 第二个领先; 固定在所述第一引线的上表面上的芯片; 夹子，其联接到所述第二引线，所述夹子的下表面固定到所述芯片的上表面。 表面安装组件封装还包括用于模制第一引线，第二引线，芯片和夹子的模制化合物，其中第一引线和第二引线的端部仅从模制化合物暴露而不向外延伸 模塑料。 通过使用本公开的实施例，可以节省成本并且可以简化处理流程，并且获得新型无引线表面安装组件封装。

公开(公告)号：US09099915B2

公开(公告)日：2015-08-04

申请号：US13335762

申请日：2011-12-22

Applicant: Henry Ge ,  Welsin Wang ,  Xing Zhang

Inventor： Henry Ge ,  Welsin Wang ,  Xing Zhang

IPC: G01R19/00 ,  H02M7/06 ,  G01R11/40 ,  G01R11/42 ,  H02M1/00

CPC classification number: H02M7/06 ,  G01R11/40 ,  G01R11/42 ,  H02M7/068 ,  H02M2001/0064

Abstract: Congruent power and timing signals in a single electronic device. In an embodiment, a circuit may include just one isolation transformer operable to generate a power signal and a timing signal. On the secondary side, two branches may extract both a power signal and a clock signal for use in the circuit on the isolated secondary side. The first branch may be coupled to the transformer and operable to manipulate the signal into a power signal, such as a 5V DC signal. Likewise, the second circuit branch is operable to manipulate the signal into a clock signal, such as a 5 V signal with a frequency of 1 MHz. By extracting both a power supply signal and a clock signal from the same isolation transformer on the secondary side, valuable space may be saved on an integrated circuit device with only having a single winding for a single isolation transformer.

Abstract translation: 单个电子设备中的一致功率和定时信号。 在一个实施例中，电路可以仅包括一个可操作以产生功率信号和定时信号的隔离变压器。 在次级侧，两个分支可以提取功率信号和时钟信号，以在隔离次级侧的电路中使用。 第一分支可以耦合到变压器并且可操作以将信号操纵成诸如5V DC信号的功率信号。 类似地，第二电路支路可操作以将信号操纵成时钟信号，例如频率为1MHz的5V信号。 通过从次级侧的同一隔离变压器中提取电源信号和时钟信号，可以在集成电路设备上节省有价值的空间，只需要单个隔离变压器的绕组。