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公开(公告)号:US20230003937A1
公开(公告)日:2023-01-05
申请号:US17363846
申请日:2021-06-30
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Michal Rakowski , Petar I. Todorov , Yusheng Bian , Won Suk Lee , Asif J. Chowdhury , Kenneth Giewont
Abstract: Disclosed is a photonic structure and associated method. The structure includes a closed-curve waveguide having a first height, as measured from the top surface of an insulator layer, and an outer curved sidewall that extends essentially vertically the full first height (e.g., to minimize signal loss). The structure includes a closed-curve thermal coupler and a heating element. The closed-curve thermal coupler is thermally coupled to and laterally surrounded by the closed-curve waveguide and has a second height that is less than the first height. In some embodiments, the closed-curve waveguide and the closed-curve thermal coupler are continuous portions of the same semiconductor layer having different thicknesses. The heating element is thermally coupled to the closed-curve thermal coupler and thereby indirectly thermally coupled to the closed-curve waveguide. Thus, the heating element is usable for thermally tuning the closed-curve waveguide via the closed-curve thermal coupler to minimize any temperature-dependent resonance shift (TDRS).
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182.
公开(公告)号:US11545577B2
公开(公告)日:2023-01-03
申请号:US17114554
申请日:2020-12-08
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Siva P. Adusumilli , John J. Ellis-Monaghan , Steven M. Shank , Yves T. Ngu , Michael J. Zierak
IPC: H01L29/786 , H01L21/8234 , H01L21/02 , H01L29/04
Abstract: Disclosed is a structure including a semiconductor layer with a device area and, within the device area, a monocrystalline portion and polycrystalline portion(s) that extend through the monocrystalline portion. The structure includes an active device including a device component, which is in device area and which includes polycrystalline portion(s). For example, the device can be a field effect transistor (FET) (e.g., a simple FET or a multi-finger FET for a low noise amplifier or RF switch) with at least one source/drain region, which is in the device area and which includes at least one polycrystalline portion that extends through the monocrystalline portion. The embodiments can vary with regard to the type of structure (e.g., bulk or SOI), with regard to the type of device therein, and also with regard to the number, size, shape, location, orientation, etc. of the polycrystalline portion(s). Also disclosed is a method for forming the structure.
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公开(公告)号:US20220413232A1
公开(公告)日:2022-12-29
申请号:US17362154
申请日:2021-06-29
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Spencer Porter , Mark Levy , Siva P. Adusumilli , Yusheng Bian
IPC: G02B6/42
Abstract: Structures for a coupler and methods of forming a structure for a coupler. A structure for a directional coupler may include a first waveguide core having one or more first airgaps and a second waveguide core including one or more second airgaps. The one or more second airgaps are positioned in the second waveguide core adjacent to the one or more first airgaps in the first waveguide core. A structure for an edge coupler is also provided in which the waveguide core of the edge coupler includes one or more airgaps.
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公开(公告)号:US11537866B2
公开(公告)日:2022-12-27
申请号:US16880253
申请日:2020-05-21
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Akhilesh R. Jaiswal , Ajey Poovannummoottil Jacob , Yusheng Bian , Michal Rakowski
IPC: G06N3/067 , H01L27/144 , G06N3/04 , H01L31/0232 , H01L31/02
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to optical neuro-mimetic devices and methods of manufacture. The structure includes: a plurality of photodetectors and electrical circuitry that converts photocurrent generated from the photodetectors into electrical current and then sums up the electrical current to mimic neural functionality.
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公开(公告)号:US11536903B1
公开(公告)日:2022-12-27
申请号:US17406773
申请日:2021-08-19
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Theodore Letavic , Yusheng Bian , Kenneth J. Giewont , Karen Nummy
Abstract: Structures for an edge coupler and methods of fabricating a structure for an edge coupler. A first waveguide core has a first section that has a tapered shape and a second section that is adjoined to the first section. Multiple segments are positioned with a spaced arrangement adjacent to an end surface of the second section of the first waveguide core. A slab layer is adjoined to the first section of the first waveguide core. A second waveguide core has a section that overlaps with the first section of the first waveguide core to define a layer stack. The section of the second waveguide core has a tapered shape, and the first and second waveguide cores are comprised of different materials. The first section of the first waveguide core has a first thickness, and the slab layer has a second thickness that is less than the first thickness.
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公开(公告)号:US20220406833A1
公开(公告)日:2022-12-22
申请号:US17896401
申请日:2022-08-26
Applicant: GlobalFoundries U.S. Inc.
Inventor: Siva P. ADUSUMILLI , Vibhor JAIN , Alvin J. JOSEPH , Steven M. SHANK
IPC: H01L27/146
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodetectors with buried airgap mirror reflectors. The structure includes a photodetector and at least one airgap in a substrate under the photodetector.
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187.
公开(公告)号:US20220404547A1
公开(公告)日:2022-12-22
申请号:US17354408
申请日:2021-06-22
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Yusheng Bian , Qizhi Liu
Abstract: Embodiments of the disclosure provide an optical antenna for a photonic integrated circuit (PIC). The optical antenna includes a vertically oriented semiconductor waveguide with a first end on a semiconductor layer. The vertically oriented semiconductor waveguide includes a first sidewall and a second sidewall opposite the first sidewall. A reflective material is along the second sidewall of the vertically oriented semiconductor waveguide. A first plurality of grating protrusions extends from the first sidewall of the vertically oriented semiconductor waveguide.
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188.
公开(公告)号:US11532742B2
公开(公告)日:2022-12-20
申请号:US17206195
申请日:2021-03-19
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Ketankumar Harishbhai Tailor , Peter Baars
IPC: H01L29/78 , H01L29/40 , H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/66
Abstract: An integrated circuit (IC) structure and a field plate are disclosed. The IC structure and field plate may find advantageous application with, for example, extended drain metal-oxide semiconductor (EDMOS) transistors. The IC structure includes a transistor including a metal gate structure and a drain extension region extending laterally from partially under the metal gate structure to a drain region. A metal field plate is over the drain extension region. Due to being formed simultaneously as part of a gate-last formation approach, the metal field plate has an upper surface coplanar with an upper surface of the metal gate structure. A field plate contact may be on the metal field plate.
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189.
公开(公告)号:US11515685B2
公开(公告)日:2022-11-29
申请号:US17167201
申请日:2021-02-04
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Yusheng Bian , Roderick A. Augur , Michal Rakowski , Kenneth J. Giewont , Karen A. Nummy
Abstract: A laser structure, including: a dielectric matrix formed of a first material; a laser source formed within the dielectric matrix and formed of a semiconductor material; and a plurality of side confining features formed within the dielectric matrix and extending parallel to and along a length of the laser source. The plurality of side confining features are formed of the semiconductor material.
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190.
公开(公告)号:US11515397B2
公开(公告)日:2022-11-29
申请号:US16934669
申请日:2020-07-21
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Anthony K. Stamper , Siva P. Adusumilli , Vibhor Jain , Steven Bentley
IPC: H01L29/66 , H01L29/20 , H01L29/778 , H01L29/06 , H01L21/763 , H01L21/8234 , H01L29/36
Abstract: Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. A layer stack is formed on a semiconductor substrate comprised of a single-crystal semiconductor material. The layer stack includes a semiconductor layer comprised of a III-V compound semiconductor material. A polycrystalline layer is formed in the semiconductor substrate. The polycrystalline layer extends laterally beneath the layer stack.
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