公开(公告)号：US09025701B2

公开(公告)日：2015-05-05

申请号：US14183462

申请日：2014-02-18

申请人： Renesas SP Drivers Inc.

发明人： Keiichi Itoigawa ,  Shinichi Ogou ,  Jun Kurosawa ,  Takashi Tamura

IPC分类号： H03K9/00 ,  H04L25/02 ,  H04L25/14 ,  H04L7/00 ,  H04L7/033 ,  H04L7/04

CPC分类号： H04L25/0272 ,  H04L7/0008 ,  H04L7/0037 ,  H04L7/0041 ,  H04L7/0338 ,  H04L7/04 ,  H04L25/14

摘要： A receiver is composed of a receiver-side amplifier which receives a clock signal, a receiver-side amplifier which receives a data signal, a variable delay circuit which generates a delay-adjusted clock signal and a delay-adjusted data signal by delaying the clock signal and the data signal, a latch circuit section which latches the delay-adjusted data signal in synchronous with the delay-adjusted clock signal, and a skew detecting circuit which generates skew detection data that by latching a specific data sequence transmitted as the data signal in synchronous with a first clock signal to Nth clock signal (N is an integer equal to or more than 2) with different delay times from the clock signal. The delay time in the variable delay circuit is controlled according to the skew detection data.

摘要翻译： 接收机由接收时钟信号的接收机侧放大器，接收数据信号的接收机侧放大器，延迟调整后的时钟信号的可变延迟电路和延迟调整后的数据信号构成 信号和数据信号，锁存电路部分，其与经延迟调整的时钟信号同步地锁存延迟调整的数据信号，以及偏斜检测电路，其产生通过锁存作为数据信号发送的特定数据序列的偏移检测数据 与来自时钟信号的不同延迟时间的第一时钟信号至第N时钟信号（N为等于或大于2的整数）同步。 可变延迟电路中的延迟时间根据偏斜检测数据进行控制。

公开(公告)号：US20150108611A1

公开(公告)日：2015-04-23

申请号：US14491995

申请日：2014-09-20

申请人： RENESAS SP DRIVERS INC.

发明人： Yasuhiro KUMAGAI ,  Masami KOKETSU

IPC分类号： H01L23/544 ,  H01L23/498

CPC分类号： H01L23/544 ,  H01L23/5226 ,  H01L23/60 ,  H01L24/05 ,  H01L24/13 ,  H01L2223/54406 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/54473 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/13022 ,  H01L2224/13144 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a display drive IC chip of an LCD or the like, an alignment mark is arranged in an alignment mark arrangement region on the main surface thereof, a dummy pattern is arranged on a lower layer, and an actual pattern is further arranged on the lower layer.

摘要翻译： 在LCD等的显示驱动IC芯片中，在其主表面上的对准标记布置区域中布置有对准标记，在下层布置有虚设图案，并且实际图案进一步布置在下部 层。

公开(公告)号：US20150097852A1

公开(公告)日：2015-04-09

申请号：US14491989

申请日：2014-09-20

申请人： RENESAS SP DRIVERS INC.

发明人： Hikaru SHIBAHARA ,  Hideaki HONDA ,  Hiroki TAKEUCHI

IPC分类号： G09G5/373 ,  G09G3/36 ,  G06T1/60

CPC分类号： G06T1/60 ,  G09G3/2096 ,  G09G3/3275 ,  G09G3/3688 ,  G09G2310/0291 ,  G09G2340/045 ,  G09G2370/08

摘要： A display driver that receives display line data of plural display lines to perform drive control on a display panel includes a line memory for storing display line data which is supplied from the outside. The display driver includes a logic circuit that controls write and read-out of the display line data in and from the line memory, and sorts pixel data of the display line data using read out data from the line memory, to generate display drive data. Drive circuits drive the display panel in units of display lines based on the drive data which is output from the logic circuit. The drive circuits are separately arranged on both sides of the logic circuit and the line memory which are interposed therebetween. The storage capacity of the line memory corresponds to the number of lines smaller than the number of display lines of a display frame.

摘要翻译： 接收多个显示行的显示行数据以在显示面板上进行驱动控制的显示驱动器包括用于存储从外部提供的显示行数据的行存储器。 显示驱动器包括一个逻辑电路，用于控制行存储器中和/或从行存储器的显示行数据的写入和读出，并使用来自行存储器的读出数据对显示行数据的像素数据进行排序，以产生显示驱动数据。 驱动电路基于从逻辑电路输出的驱动数据，以显示线为单位驱动显示面板。 驱动电路分别布置在逻辑电路的两侧和插入其间的行存储器。 行存储器的存储容量对应于小于显示帧的显示行数的行数。

公开(公告)号：US20140313183A1

公开(公告)日：2014-10-23

申请号：US14246048

申请日：2014-04-05

申请人： Renesas SP Drivers Inc.

发明人： Masashige Harada ,  Kunihiko Tani ,  Sosuke Suji

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G2330/025 ,  G09G2360/122 ,  G09G2360/18

摘要： The display driver includes an image memory which is configured by including a plurality of memory mats, a plurality of power supply switches which can perform an ON and OFF control of power supply to each of the plurality of memory mats, and a control circuit which turns on or off the power supply switches. The control circuit turns on the plurality of power supply switches in such a manner that the power supply to the memory mat to which the image data is written at an initial time, among the plurality of memory mats, becomes stable earlier than the power supply to the other memory mats.

摘要翻译： 显示驱动器包括图像存储器，其被配置为包括多个存储器垫，多个电源开关，其可以执行对多个存储器垫中的每一个的电源的ON和OFF控制;以及控制电路，其转动 开或关电源开关。 控制电路以这样的方式接通多个电源开关，使得在多个存储器垫之间的初始时刻写入图像数据的存储器垫的电源比在 其他内存垫。

公开(公告)号：US20140298065A1

公开(公告)日：2014-10-02

申请号：US14229627

申请日：2014-03-28

申请人： Renesas SP Drivers Inc.

发明人： Goro Sakamaki

IPC分类号： G06F1/32

CPC分类号： G06F1/30 ,  G06F1/1626 ,  G09G5/00

摘要： A display device includes a boosting power supply circuit, a logic circuit and a charge transport path. The boosting power supply circuit generates a boosted power supply voltage by boosting an analog power supply voltage. The logic circuit is responsive to a decrease in a voltage level on at least one of power supply lines to which analog and logic power supply voltages are supplied for controlling a source line drive circuitry and a gate line drive circuitry to discharge charges accumulated in the display panel. The charge transport path is configured to transport charges from a power supply line on which the boosted power supply voltage is generated to a power supply line which supplies an internal logic power supply voltage to the logic circuit in response to the decrease in the voltage level on the at least one of the first and second power supply lines.

摘要翻译： 显示装置包括升压电源电路，逻辑电路和电荷输送路径。 升压电源电路通过升高模拟电源电压来产生升压的电源电压。 逻辑电路响应于提供模拟和逻辑电源电压的至少一个电源线上的电压电平的降低，用于控制源极线路驱动电路和栅极线驱动电路以放电累积在显示器中的电荷 面板。 电荷输送路径被配置为响应于电压电平的降低而将从产生升压的电源电压的电源线的电荷输送到向逻辑电路提供内部逻辑电源电压的电源线， 所述第一和第二电源线中的至少一个。

公开(公告)号：US20140253423A1

公开(公告)日：2014-09-11

申请号：US14201591

申请日：2014-03-07

申请人： Renesas SP Drivers Inc.

发明人： Takao Kinsho

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3696 ,  G09G2310/0291

摘要： A display panel driver includes: a grayscale amplifier receiving an input grayscale reference voltage and generating an output grayscale reference voltage corresponding to the input grayscale reference voltage; a voltage dividing resistor receiving the output grayscale reference voltage and generating a plurality of grayscale voltages by using the received output grayscale reference voltage; a decoder circuit selecting grayscale voltages from among the plurality of grayscale voltages in response to image data and outputting the selected grayscale voltages; and an output circuit outputting drive voltages corresponding to the selected grayscale voltages to output terminals to be connected to source lines of a display panel. The grayscale amplifier is configured such that the output grayscale reference voltage is adjustable by adjusting an offset voltage of the grayscale amplifier.

摘要翻译： 显示面板驱动器包括：灰阶放大器，其接收输入灰度参考电压并产生对应于输入灰度参考电压的输出灰度参考电压; 接收输出灰度参考电压并通过使用所接收的输出灰度参考电压产生多个灰度电压的分压电阻; 解码器电路响应于图像数据从多个灰度级电压中选择灰度电压并输出所选择的灰度电压; 以及输出电路，将对应于所选择的灰度电压的驱动电压输出到要连接到显示面板的源极线的输出端子。 灰度放大器被配置为使得输出灰度参考电压可通过调整灰度放大器的偏移电压来调节。

公开(公告)号：US20140241465A1

公开(公告)日：2014-08-28

申请号：US14183462

申请日：2014-02-18

申请人： Renesas SP Drivers Inc.

发明人： Keiichi Itoigawa ,  Shinichi Ogou ,  Jun Kurosawa ,  Takashi Tamura

IPC分类号： H04L25/40

CPC分类号： H04L25/0272 ,  H04L7/0008 ,  H04L7/0037 ,  H04L7/0041 ,  H04L7/0338 ,  H04L7/04 ,  H04L25/14

摘要： A receiver is composed of a receiver-side amplifier which receives a clock signal, a receiver-side amplifier which receives a data signal, a variable delay circuit which generates a delay-adjusted clock signal and a delay-adjusted data signal by delaying the clock signal and the data signal, a latch circuit section which latches the delay-adjusted data signal in synchronous with the delay-adjusted clock signal, and a skew detecting circuit which generates skew detection data that by latching a specific data sequence transmitted as the data signal in synchronous with a first clock signal to Nth clock signal (N is an integer equal to or more than 2) with different delay times from the clock signal. The delay time in the variable delay circuit is controlled according to the skew detection data.

摘要翻译： 接收机由接收时钟信号的接收机侧放大器，接收数据信号的接收机侧放大器，延迟调整后的时钟信号的可变延迟电路和延迟调整后的数据信号构成 信号和数据信号，锁存电路部分，其与经延迟调整的时钟信号同步地锁存延迟调整的数据信号，以及偏斜检测电路，其产生通过锁存作为数据信号发送的特定数据序列的偏移检测数据 与来自时钟信号的不同延迟时间的第一时钟信号至第N时钟信号（N为等于或大于2的整数）同步。 可变延迟电路中的延迟时间根据偏斜检测数据进行控制。

公开(公告)号：US20140160176A1

公开(公告)日：2014-06-12

申请号：US14097002

申请日：2013-12-04

申请人： Renesas SP Drivers Inc.

发明人： Takashi Nose ,  Hirobumi Furihata ,  Akio Sugiyama ,  Toshio Mizuno

IPC分类号： G09G3/34 ,  G09G3/36

CPC分类号： G09G3/3406 ,  G09G3/3685 ,  G09G2320/064 ,  G09G2320/0646 ,  G09G2360/16

摘要： A display device includes a display panel including a display region and first and second drivers. Feature data indicating feature values of first and second images displayed on first and second portions of the display region are exchanged between the first and second drivers, and the first and second drivers drive the first and second portions of the display region in response to the feature data.

摘要翻译： 显示装置包括显示面板，显示面板包括显示区域以及第一和第二驱动器。 表示在显示区域的第一和第二部分上显示的第一和第二图像的特征值的特征数据在第一和第二驱动器之间交换，并且第一和第二驱动器响应于特征来驱动显示区域的第一和第二部分 数据。

公开(公告)号：US20110206290A1

公开(公告)日：2011-08-25

申请号：US13033659

申请日：2011-02-24

申请人： Yukari Katayama ,  Akihito Akai ,  Yoshiki Kurokawa ,  Yusuke Uchida

发明人： Yukari Katayama ,  Akihito Akai ,  Yoshiki Kurokawa ,  Yusuke Uchida

IPC分类号： G06K9/36

CPC分类号： G09G3/3648 ,  G09G2320/0252 ,  G09G2320/0261 ,  G09G2320/0686 ,  G09G2320/103 ,  G09G2340/02 ,  G09G2340/16 ,  H04N19/124 ,  H04N19/146 ,  H04N19/172 ,  H04N19/42 ,  H04N19/60

摘要： The display driving circuit includes: an OD (OverDrive) calculation circuit operable to generate an OD driving signal for improving the response characteristic of a display device according to display image data; a drive-output circuit operable to supply an OD driving signal to the display device; and a compression circuit operable to store compressed display data in a memory. The compression circuit includes a DCT calculation module operable to execute DCT (Discrete Cosine Transform) of display image data, and an entropy coding module operable to execute variable length entropy coding of DCT conversion display data. Preferably, the display driving circuit further includes a decompression circuit operable to supply an OD calculation circuit with display data resulting from decompression of compressed display data read out the memory.

摘要翻译： 显示驱动电路包括：OD（OverDrive）计算电路，用于根据显示图像数据产生用于改善显示装置的响应特性的OD驱动信号; 驱动输出电路，其可操作以向所述显示装置提供OD驱动信号; 以及可操作以将压缩显示数据存储在存储器中的压缩电路。 压缩电路包括可以执行显示图像数据的DCT（离散余弦变换）的DCT计算模块和可操作以执行DCT变换显示数据的可变长度熵编码的熵编码模块。 优选地，显示驱动电路还包括解压缩电路，其可操作以向OD计算电路提供由对存储器读出的压缩显示数据的解压缩而得到的显示数据。

公开(公告)号：US20150054765A1

公开(公告)日：2015-02-26

申请号：US14464868

申请日：2014-08-21

申请人： Renesas SP Drivers Inc.

发明人： Yasuhito Kurokawa

IPC分类号： G06F3/041

CPC分类号： G06F3/0412 ,  G06F1/3262 ,  G06F3/0416 ,  G06F3/044

摘要： A display device is arranged so as to be able to conduct a touch detection action for sensing a region where a touch operation on a touch panel has been performed, to stop the touch detection action in the touch panel, and to specify a touch-detection-stop region. The display device includes an image-display-direction register. A processor writes parameters designating an image-display direction into the image-display-direction register based on a result of detection by a tilt detector. On condition that parameters stored in the image-display-direction register have been changed, the display device changes the touch-detection-stop region based on the parameters. The above function is mounted on a semiconductor integrated circuit device included in the display device.

摘要翻译： 显示装置被布置成能够进行用于感测触摸面板上的触摸操作已经执行的区域的触摸检测动作，以停止触摸面板中的触摸检测动作，并且指定触摸检测 停止区域。 显示装置包括图像显示方向寄存器。 基于倾斜检测器的检测结果，处理器将指定图像显示方向的参数写入图像显示方向寄存器。 在存储在图像显示方向寄存器中的参数已经改变的情况下，显示装置根据参数改变触摸检测停止区域。 上述功能安装在包括在显示装置中的半导体集成电路装置上。