公开(公告)号：US20050255660A1

公开(公告)日：2005-11-17

申请号：US10921027

申请日：2004-08-17

Applicant: Chun Te Lin ,  Ta-Te Chen ,  Jen-Li Lo

Inventor： Chun Te Lin ,  Ta-Te Chen ,  Jen-Li Lo

IPC: H01L21/265 ,  H01L21/336 ,  H01L21/8238

CPC classification number: H01L21/2652 ,  H01L21/823814

Abstract: A shallow junction that previously would require the use of a low-energy ion implanter can be directly formed by high-energy or middle-energy ion implanters such that the manufacturer need not purchase a new low-energy ion implanter. In one embodiment, an ion-implantation method for forming a shallow junction comprises providing a semiconductor substrate including at least one transistor structure. During ion implantation to form a shallow junction, a buffer layer is formed on the implantation region. The buffer layer has a predetermined thickness. Charged ions are implanted into the implantation region through the buffer layer by an energy provided by a middle-energy ion implanter, and the buffer layer is removed. The buffer layer is used for blocking the amount of the charged ions that will be implanted into the implantation region so as to form a shallow junction that would require a low-energy ion implanter without the buffer layer.

Abstract translation: 先前需要使用低能离子注入机的浅结可以由高能或中能离子注入机直接形成，使得制造商不需要购买新的低能离子注入机。 在一个实施例中，用于形成浅结的离子注入方法包括提供包括至少一个晶体管结构的半导体衬底。 在离子注入期间形成浅结，在注入区上形成缓冲层。 缓冲层具有预定的厚度。 带电离子通过中间能离子注入机提供的能量通过缓冲层注入到注入区域中，并且缓冲层被去除。 缓冲层用于阻挡将被注入到注入区域中的带电离子的量，以便形成需要不具有缓冲层的低能离子注入机的浅结。

公开(公告)号：US07192789B2

公开(公告)日：2007-03-20

申请号：US10942381

申请日：2004-09-15

Applicant: Chun Te Lin ,  Chih Sheng Yang ,  Hong Zhi Lee ,  Ta-Te Chen

Inventor： Chun Te Lin ,  Chih Sheng Yang ,  Hong Zhi Lee ,  Ta-Te Chen

IPC: H01L21/00 ,  H01L21/425 ,  G01R31/26

CPC classification number: H01L22/34

Abstract: A method for monitoring an ion implanter is disclosed. In one embodiment, the method comprises providing a wafer, forming a barrier layer on the surface of the wafer wherein the barrier layer has a substantial blocking effect on ion implantation, performing an ion implantation process to the wafer, performing a thermal treatment process, removing the barrier layer, and measuring a physical property of the wafer. The measured physical property of the wafer can be used to ascertain the status of the ion implanter. For instance, the measured physical property can be used to determine whether the ion implanter has problems when the energy or concentration of the implanted ions is changed.

Abstract translation: 公开了一种监测离子注入机的方法。 在一个实施例中，该方法包括提供晶片，在晶片的表面上形成阻挡层，其中阻挡层对离子注入具有显着的阻塞作用，对晶片执行离子注入工艺，执行热处理工艺，去除 阻挡层，并测量晶片的物理性质。 可以使用测量的晶片的物理特性来确定离子注入机的状态。 例如，当注入的离子的能量或浓度改变时，测量的物理性质可用于确定离子注入机是否存在问题。

公开(公告)号：US06541834B1

公开(公告)日：2003-04-01

申请号：US09975125

申请日：2001-10-09

Applicant: Jin-shown Shie ,  Ji-cheng Lin ,  Chun-te Lin ,  Chih-tang Peng ,  Shih-han Yu ,  Kuo-ning Chiang

Inventor： Jin-shown Shie ,  Ji-cheng Lin ,  Chun-te Lin ,  Chih-tang Peng ,  Shih-han Yu ,  Kuo-ning Chiang

IPC: H01L2982

CPC classification number: B81C1/00182 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/014 ,  B81C2201/016 ,  G01L9/0054

Abstract: The invention is a silicon pressure micro-sensing device and the fabrication process thereof. The silicon pressure micro-sensing device includes a pressure chamber, and is constituted of a P-type substrate with a taper chamber and an N-type epitaxial layer thereon. On the N-type epitaxial layer are a plurality of piezo-resistance sensing units which sense deformation caused by pressure. The fabrication pressure of the silicon pressure micro-sensing device includes a step of first making a plurality of holes on the N-type epitaxial layer to reach the P-type substrate beneath. Then, by an anisotropic etching stop technique, in which etchant pass through the holes, a taper chamber is formed in the P-type substrate. Finally, an insulating material is applied to seal the holes, thus attaining the silicon pressure micro-sensing device that is able to sense pressure differences between two ends thereof.

Abstract translation: 本发明是一种硅压力微型感测装置及其制造方法。 硅压力微型感测装置包括压力室，由具有锥形室的P型衬底和其上的N型外延层构成。 在N型外延层上是感测由压力引起的变形的多个压电感测单元。 硅压力微型感测装置的制造压力包括首先在N型外延层上制造多个孔以到达下面的P型衬底的步骤。 然后，通过各向异性蚀刻停止技术，其中蚀刻剂穿过孔，在P型衬底中形成锥形室。 最后，施加绝缘材料以密封孔，从而获得能够感测其两端之间的压力差的硅压力微检测装置。

公开(公告)号：US08544488B2

公开(公告)日：2013-10-01

申请号：US13197152

申请日：2011-08-03

Applicant: Justin Chun-Te Lin

Inventor： Justin Chun-Te Lin

IPC: E04H15/34

CPC classification number: E04H15/44 ,  E04F10/04 ,  E04H15/58

Abstract: A collapsible canopy that is expandable during rain fall. The canopy includes a frame, a propulsive mechanism and a shelter. The frame has a stationary side and a movable side. The stationary side is fixed to ground. The movable side is opposite to the stationary side and is configured to move forward and backward in a predetermined path, which expands the coverage of the collapsible canopy. The propulsive mechanism drives the movable side to expand the frame. The shelter is expandable and collapsibly connected to the frame, wherein the shelter forms a collective area to provide sheltering from exterior weather conditions and guides the fluid out when the shelter is expanded and driven by the movable side of the frame.

Abstract translation: 降雨期间可膨胀的可折叠篷布。 冠层包括框架，推进机构和收容所。 框架具有固定侧和可动侧。 固定侧固定在地面上。 可移动侧与固定侧相对，并且构造成在预定路径中向前和向后移动，这扩大了可折叠顶盖的覆盖范围。 推进机构驱动可动侧使框架膨胀。 遮蔽物是可膨胀的并且可塌陷地连接到框架，其中遮蔽物形成集合区域以提供避免与外部天气条件的遮挡，并且当遮蔽物被框架的可移动侧扩展和驱动时引导流体流出。

公开(公告)号：US08531009B2

公开(公告)日：2013-09-10

申请号：US12205443

申请日：2008-09-05

Applicant: Chun-Te Lin ,  Tzu-Ying Kuo ,  Shu-Ming Chang

Inventor： Chun-Te Lin ,  Tzu-Ying Kuo ,  Shu-Ming Chang

IPC: H01L23/48 ,  H01L21/58

CPC classification number: H01L25/0657 ,  H01L21/76898 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/18 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14

Abstract: This invention provides a package structure of three-dimensional stacking dice and its manufacturing method. This invention employs the Through-Silicon-Vias (TSVs) technology to establish vertical electrical connection of the three-dimensional stacking dice and a redistribution layer between a blind hole-on-pad and a vertical through hole formed by the TSVs technology to direct the electrical connection from a first surface to an opposite second surface of this structure. In addition, this invention employs a conductive bump completely covering the pads jointed together between the stacking dice to avoid breakage of the pads. The reliability of the three-dimensional stacking dice of the present invention is increased.

Abstract translation: 本发明提供三维堆叠骰子的包装结构及其制造方法。 本发明采用通硅通孔（TSV）技术来建立三维叠层骰子的垂直电连接，以及由盲孔在衬垫和由TSV技术形成的垂直通孔之间的再分布层，以引导 从该结构的第一表面到相对的第二表面的电连接。 此外，本发明使用完全覆盖在堆叠骰子之间连接在一起的焊盘的导电凸块，以避免焊盘的破损。 本发明的三维堆叠骰子的可靠性提高。

公开(公告)号：US20130124892A1

公开(公告)日：2013-05-16

申请号：US13676042

申请日：2012-11-13

Applicant: Shih-Chin Lu ,  Chung-Chi Tsou ,  Chun-Te Lin

Inventor： Shih-Chin Lu ,  Chung-Chi Tsou ,  Chun-Te Lin

IPC: G06F1/26

CPC classification number: G06F1/30 ,  G06F1/3212 ,  G06F1/324 ,  Y02D10/126 ,  Y02D10/174

Abstract: A power management method is suitable for an electronic device including a controller, a processor and a battery, and includes following steps. A first power is provided to the electronic device by a power adapter, and a maximum value of the first power is smaller than a maximum value of a rated consumed power of the electronic device. A power state of a second power of the battery is obtained by the controller. A control signal is generated according to the power state, and the processor adjusts an operation performance of the processor based on the control signal. The operation performance of the processor is continuously adjusted according to the power state.

Abstract translation: 电源管理方法适用于包括控制器，处理器和电池的电子设备，并且包括以下步骤。 通过电源适配器向电子设备提供第一功率，并且第一功率的最大值小于电子设备的额定消耗功率的最大值。 电池的第二功率的电源状态由控制器获得。 根据功率状态产生控制信号，并且处理器基于控制信号调整处理器的操作性能。 根据电源状态不断调整处理器的运行性能。

公开(公告)号：US20080109658A1

公开(公告)日：2008-05-08

申请号：US11826704

申请日：2007-07-18

Applicant: Chun-Te Lin ,  Yi-Hung Shen

Inventor： Chun-Te Lin ,  Yi-Hung Shen

IPC: H04L9/00

CPC classification number: H04L63/0428 ,  H04L9/3226

Abstract: A method for delivering a confidential e-mail is disclosed. The application software loads a first e-mail, checks if an attached file of the first e-mail is encrypted, opens a second e-mail for delivering a password of the attached file when the attached file is encrypted, and loads at least one receiver of the first e-mail to the second e-mail for sending the second e-mail.

Abstract translation: 公开了传送机密电子邮件的方法。 应用软件加载第一个电子邮件，检查第一个电子邮件的附加文件是否被加密，打开第二个电子邮件，用于在附加文件加密时传递附件文件的密码，并加载至少一个 接收第一个电子邮件的第二个电子邮件发送第二个电子邮件。

公开(公告)号：US06743075B2

公开(公告)日：2004-06-01

申请号：US10346513

申请日：2003-01-15

Applicant: Chun-Te Lin ,  Shan-An Liu ,  Chung-Ru Wu ,  Ming-Hsien Lu

Inventor： Chun-Te Lin ,  Shan-An Liu ,  Chung-Ru Wu ,  Ming-Hsien Lu

IPC: B24B4902

CPC classification number: B24B37/013 ,  B24B37/042 ,  H01L21/31053 ,  H01L21/3212

Abstract: The present invention relates to a method for determining rapidly and accurately the polishing time of a chemical mechanical polishing process for polishing target wafers to avoid any problems of under-polishing or over-polishing. An aspect of the present invention is directed to a method for determining a chemical mechanical polishing time for removing a target polishing thickness H from an uneven surface of a target wafer. The method comprises polishing a control wafer by a chemical mechanical polishing to obtain a progressive relationship of polishing thickness and respective polishing time therefor. A first polishing time T1 is determined for removing a first thickness H1 from the target wafer, in which the first thickness H1 with substantially the uneven surface removed is smaller than the target polishing thickness H of the target wafer to be removed. In some embodiments, the first polishing time T1 is determined by polishing the target wafer to remove the first thickness H1 by chemical mechanical polishing. The method comprises calculating an image polishing thickness H1′ to be removed from the control wafer with respect to the first polishing time T1 according to the progressive relationship of the polishing thickness and respective polishing time for the control wafer. A second polishing thickness H2=(H−H1) is added to the image polishing thickness H1′ to obtain an equivalent polishing thickness H1′ for the control wafer. A target polishing time is determined for removing the target polishing thickness H from the target wafer by interpolating the progressive relationship of the polishing thickness and respective polishing time for the control wafer based on the equivalent polishing thickness H′.

Abstract translation: 本发明涉及一种用于快速准确地确定用于抛光目标晶片的化学机械抛光工艺的抛光时间的方法，以避免抛光不足或过度抛光的任何问题。 本发明的一个方面涉及一种用于确定从目标晶片的不平坦表面去除目标抛光厚度H的化学机械抛光时间的方法。 该方法包括通过化学机械抛光抛光控制晶片以获得抛光厚度和相应的抛光时间的渐进关系。 确定第一抛光时间T1，用于从目标晶片去除第一厚度H1，其中去除了基本上不平坦表面的第一厚度H1小于要去除的目标晶片的目标抛光厚度H. 在一些实施例中，通过抛光目标晶片以通过化学机械抛光去除第一厚度H1来确定第一抛光时间T1。 该方法包括根据抛光厚度与控制晶片的相应抛光时间的渐进关系，相对于第一抛光时间T1计算要从控制晶片移除的图像抛光厚度H1'。 将第二研磨厚度H2 =（H-H1）添加到图像研磨厚度H1'，以获得用于控制晶片的等效抛光厚度H1'。 通过根据等效抛光厚度H'插入控制晶片的研磨厚度和各抛光时间的渐进关系来确定从目标晶片去除目标抛光厚度H的目标抛光时间。