公开(公告)号：US07163641B2

公开(公告)日：2007-01-16

申请号：US10448905

申请日：2003-05-30

申请人： Kevin G. Donohoe ,  David S. Becker

发明人： Kevin G. Donohoe ,  David S. Becker

IPC分类号： H01L21/3065 ,  H01L21/308 ,  H05H1/46 ,  C03C15/00 ,  C03C25/68

CPC分类号： H01L21/31116

摘要： A plasma etch process for etching BPSG employing two primary etchants at low flows and pressures, and a relatively low temperature environment within the etch chamber, which includes a fluorine scavenger in the form of silicon. The two primary etchant gases are CHF3 and CH2F2, delivered at flow rates on the order of between about 10 and 40 sccm for CHF3 and between about 10 and 40 sccm for CH2F2. Small quantities, on the order of 10 sccm or less, of other gases such as C2HF5 and CF4 may be added.

摘要翻译： 用于在低流量和压力下使用两个主要蚀刻剂蚀刻BPSG的等离子体蚀刻工艺，以及蚀刻室内的相对低温环境，其包括硅形式的氟清除剂。 两种主要的蚀刻剂气体是CHF 3 3和CH 2 F 2 H 2，以约10至40sccm的量级的流量递送，以 CHF 3 3和CH 2/2 F 2的约10至40sccm之间。 可以添加少量，约10sccm或更小的其它气体，例如C 2 H 5 H 3和CF 4。

公开(公告)号：US07074724B2

公开(公告)日：2006-07-11

申请号：US10888255

申请日：2004-07-09

申请人： Kevin G. Donohoe ,  David S. Becker

发明人： Kevin G. Donohoe ,  David S. Becker

IPC分类号： H01L21/302

CPC分类号： H01L21/76897 ,  C09K13/08 ,  H01L21/31116 ,  H01L21/76802

摘要： A method of anisotropiocally etching a semiconductive substrate uses a hydrofluorocarbon etch gas with an etch selectivity fluorocarbon gas. The fluorocarbon gas is used under conditions that enhance selectivity of the etch to an etch stop layer with respect to a bulk dielectric material such as doped or undoped silicon dioxide. In one method, a silicon dioxide dielectric layer is provided upon an etch stop layer, wherein the etch stop layer comprises silicon dioxide that is doped differently from the silicon dioxide dielectric layer. A gaseous etchant including a hydrofluorocarbon etch gas and a fluorocarbon selectivity compound is provided, and the silicon dioxide dielectric layer is exposed to the gaseous-etchant.

摘要翻译： 用各向异性蚀刻半导体衬底的方法使用具有蚀刻选择性碳氟化合物气体的氢氟烃蚀刻气体。 碳氟化合物气体在相对于诸如掺杂或未掺杂的二氧化硅的体电介质材料增强蚀刻停止层的蚀刻选择性的条件下使用。 在一种方法中，在蚀刻停止层上提供二氧化硅介电层，其中蚀刻停止层包括与二氧化硅介电层不同地掺杂的二氧化硅。 提供包括氢氟烃蚀刻气体和氟碳选择性化合物的气体蚀刻剂，并且将二氧化硅介电层暴露于气体蚀刻剂。

公开(公告)号：US06812154B2

公开(公告)日：2004-11-02

申请号：US10273851

申请日：2002-10-17

申请人： David S. Becker ,  Bradley J. Howard ,  Kevin G. Donohoe

发明人： David S. Becker ,  Bradley J. Howard ,  Kevin G. Donohoe

IPC分类号： H01L21302

CPC分类号： H01J37/321 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76804

摘要： A patterned organic masking layer is formed outwardly of a feature layer to be etched. It has at least one feature pattern having a minimum feature dimension of less than or equal to 0.3 micron. The feature layer has a thickness which is to be etched to form the one feature pattern in the feature layer. The feature pattern is plasma etched into the feature layer using the masking layer as a mask. The plasma etching comprises at least one etching segment where at least 30% of said thickness of the feature layer is etched using an etching gas comprising one gas compound comprising carbon, hydrogen and at least one halogen present at greater than or equal to 70% concentration by volume as compared to all carbon, hydrogen and halogen containing gas compounds in the etching gas. Such plasma etching is conducted under conditions effective to produce at least that portion of the one feature pattern in the feature layer formed during the one etching segment to have a sidewall taper, if any, of less than or equal to 5° and an organic masking layer top outer surface roughness proximate the feature pattern at a conclusion of the etching segment which is characterizable by an average value less than 100 Angstroms. Such value is determinable by scanning electron microscopy as an average maximum size of all surface discernible objects of the patterned masking layer as measured and averaged along any 0.3 micron length of top outer surface from the one feature pattern. Other implementations are also contemplated.

摘要翻译： 图案化的有机掩模层形成在要蚀刻的特征层的外侧。 它具有至少一个具有小于或等于0.3微米的最小特征尺寸的特征图案。 特征层具有要被蚀刻以在特征层中形成一个特征图案的厚度。 使用掩模层作为掩模将特征图案等离子体蚀刻到特征层中。 等离子体蚀刻包括至少一个蚀刻段，其中使用蚀刻气体蚀刻所述特征层的所述厚度的至少30％，所述蚀刻气体包括一种包含碳，氢和至少一种以大于或等于70％浓度的卤素的气体化合物 与蚀刻气体中的所有碳，氢和含卤素的气体化合物相比都是体积的。 这种等离子体蚀刻在有效地产生在一个蚀刻段期间形成的特征层中的至少一部分特征图案的条件下进行，以具有小于或等于5°的侧壁锥度（如果有的话）和有机掩模 在蚀刻段的结论处，靠近特征图案的顶层外表面粗糙度可以由小于100埃的平均值表征。 通过扫描电子显微镜作为图案化掩模层的所有表面可辨别物体的平均最大尺寸，可以通过扫描电子显微镜来测量该值，并且从该特征图案沿着顶部外表面的任何0.3微米长度测量和平均。 还考虑了其​​他实施方案。

公开(公告)号：US06759320B2

公开(公告)日：2004-07-06

申请号：US10233039

申请日：2002-08-28

申请人： David S. Becker

发明人： David S. Becker

IPC分类号： H01L214763

CPC分类号： H01L21/76805 ,  H01L21/76816

摘要： A method of forming a transistor for a semiconductor device from a semiconductor wafer comprises forming a first nitride layer over the front and back of the wafer, and forming a second nitride layer over the front and back of the wafer and over the first nitride layer. A first resist layer is formed over the front of the wafer and at least a portion of the second nitride layer over the front of the wafer is exposed. The first and second nitride layers are removed from the back of the wafer while, simultaneously, at least a portion of the exposed portion of the second nitride layer over the front of the wafer is removed. Next, a second layer of resist is formed leaving at least a portion of the first nitride layer exposed. Finally, the exposed portion of the first nitride layer is etched.

摘要翻译： 从半导体晶片形成用于半导体器件的晶体管的方法包括在晶片的前后形成第一氮化物层，并且在晶片的前后和第一氮化物层之上形成第二氮化物层。 在晶片的前面形成第一抗蚀剂层，并且暴露出晶片前面的第二氮化物层的至少一部分。 从晶片的背面去除第一和第二氮化物层，同时移除在晶片前面的第二氮化物层的暴露部分的至少一部分。 接下来，形成第二层抗蚀剂，留下暴露的第一氮化物层的至少一部分。 最后，蚀刻第一氮化物层的暴露部分。

公开(公告)号：US06207571B1

公开(公告)日：2001-03-27

申请号：US09515804

申请日：2000-02-29

申请人： Werner Juengling ,  Kirk Prall ,  Trung T. Doan ,  Guy T. Blalock ,  David Dickerson ,  David S. Becker

发明人： Werner Juengling ,  Kirk Prall ,  Trung T. Doan ,  Guy T. Blalock ,  David Dickerson ,  David S. Becker

IPC分类号： H01L2100

CPC分类号： H01L27/10894 ,  H01L21/316 ,  H01L21/31625 ,  H01L21/76897

摘要： In accordance with the present invention, there is provided a method for fabricating a contact on an integrated circuit, such as a DRAM. The method includes the following steps. A gate stack is formed on the integrated circuit. A spacer is formed on sidewalls of the gate stack. An insulating film is formed on the integrated circuit. The insulating film is planarized. Finally, a gate contact opening is formed through the planarized insulating film. In one embodiment, the gate contact opening is formed by removing the insulator, spacer and insulating film by etching. In this embodiment, the insulator, spacer and insulating film are etched at substantially similar rates. As a result, the integrated circuit is tolerant of mask misalignments, and does not over-etch field oxide or create silicon nitride slivers. In another embodiment, the planarizing step is performed with chemical mechanical planarization to form a substantially flat topography on the surface of the integrated circuit. Thus, the present invention does not require lithography equipment with a relatively large field of depth. In yet a third embodiment, the method may comprise additional steps, including forming additional dielectric on the integrated circuit. Then, gate and bitline contact openings are formed through the additional dielectric. Finally, gate and bitline contacts are formed in self-alignment to the gate stacks. This embodiment may be implemented by forming the gate and bitline contact openings with an etch that removes the additional dielectric, but does not substantially remove the spacer. As a result, the bitline contact cannot be inadvertently connected to a gate stack that functions as a wordline. This connection might disable the integrated circuit.

摘要翻译： 根据本发明，提供了一种用于在诸如DRAM的集成电路上制造接触的方法。 该方法包括以下步骤。 在集成电路上形成栅极堆叠。 在栅叠层的侧壁上形成间隔物。 在集成电路上形成绝缘膜。 绝缘膜平坦化。 最后，通过平坦化绝缘膜形成栅极接触开口。 在一个实施例中，通过蚀刻去除绝缘体，间隔物和绝缘膜来形成栅极接触开口。 在该实施例中，以基本相似的速率蚀刻绝缘体，间隔物和绝缘膜。 因此，集成电路容忍掩模未对准，并且不会过度蚀刻场氧化物或产生氮化硅条。 在另一个实施例中，平面化步骤通过化学机械平面化进行，以在集成电路的表面上形成基本平坦的形貌。 因此，本发明不需要具有相当大的深度场的光刻设备。 在第三个实施例中，该方法可以包括额外的步骤，包括在集成电路上形成附加电介质。 然后，通过附加电介质形成栅极和位线接触开口。 最后，栅极和位线触点形成为与栅极堆叠自对准。 该实施例可以通过用蚀刻去除附加电介质但不基本上去除间隔物的栅极和位线接触开口来实现。 因此，位线接触不能无意中连接到用作字线的栅极堆叠。 此连接可能会禁用集成电路。

公开(公告)号：US6107178A

公开(公告)日：2000-08-22

申请号：US187674

申请日：1998-11-06

申请人： David S. Becker ,  Kunal R. Parekh

发明人： David S. Becker ,  Kunal R. Parekh

IPC分类号： H01L21/311 ,  H01L29/34

CPC分类号： H01L21/31116 ,  Y10S438/94

摘要： An etch of a fuse opening in overlying layers above a laser-blowable semiconductor fuse having a silicon nitride cap and silicon nitride spacers begins with a silicon nitride that is enclosed in a polysilicon conductive layer on a semiconductor wafer. The etch is performed by etching first with an etch process that etches silicon nitride and later with an etch process that is selective to silicon nitride. The later etch process etches the silicon nitride of the cap and spacers little or not at all, allowing a wider variation in etch depths without destroying the fuse. Also, a patch may be provided in the overlying layers above the fuse, and an etch process employed at the level of the patch that is selective to a material of the patch, resulting in an etch stop effect at that level. The etch process is then changed to an etch process that is not selective to a material of the patch, resulting in decreased variation in etch depth over the surface of the wafer. The etch of the fuse opening is then completed with an etch process that is selective to silicon nitride, again allowing a wider variation in etch depths without destroying the fuse. The etch process that is not selective to a material of the patch and the etch process that is selective to silicon nitride may optionally be one process.

摘要翻译： 在具有氮化硅帽和氮化硅间隔物的可激光可熔融的半导体熔丝上方的覆盖层上的熔丝开口的蚀刻从氮化硅开始，氮化硅被封装在半导体晶片上的多晶硅导电层中。 首先通过蚀刻氮化硅的蚀刻工艺首先进行蚀刻，然后用对氮化硅选择性的蚀刻工艺进行蚀刻。 稍后的蚀刻工艺根本不会蚀刻盖子和间隔物的氮化硅，甚至不会影响蚀刻深度的更宽的变化而不破坏保险丝。 此外，可以在保险丝上方的上覆层中提供贴片，以及在贴片的水平处采用的蚀刻工艺，其对贴片的材料是选择性的，导致在该水平处的蚀刻停止效应。 然后将蚀刻工艺改变成对贴片材料不是选择性的蚀刻工艺，导致在晶片表面上蚀刻深度的变化减小。 然后，利用对氮化硅具有选择性的蚀刻工艺来完成熔断器开口的蚀刻，再次允许蚀刻深度的更宽的变化而不破坏熔丝。 对于补片的材料和对氮化硅选择性的蚀刻工艺不是选择性的蚀刻工艺可以可选地是一个工艺。

公开(公告)号：US6018184A

公开(公告)日：2000-01-25

申请号：US10666

申请日：1998-01-22

申请人： David S. Becker

发明人： David S. Becker

IPC分类号： H01L21/60 ,  H01L29/788

CPC分类号： H01L21/76897

摘要： A semiconductor processing method is provided for making contact openings. It includes depositing several insulative layers and performing an anisotropic etch. One layer is a conformal oxide covering the contact area and adjacent structures. A second layer is a breadloafed oxide deposited over the contact area and adjacent structures. A third layer is a doped oxide deposited over the two lower layers. The anisotropic etch is performed through the oxide layers to the contact area located on a lower substrate. The etch is selectively more rapid in the third oxide than in the two other oxides. The breadloafed oxide provides additional protection and reduces the risk of etch-through to conductive structures adjacent the contact area. An alternate embodiment replaces the two lowest oxide layers by a breadloafed nitride layer. In this embodiment, the anisotropic etch is selectively more rapid in oxides than in nitrides.

摘要翻译： 提供了用于形成接触开口的半导体处理方法。 它包括沉积几个绝缘层并执行各向异性蚀刻。 一层是覆盖接触面积和相邻结构的保形氧化物。 第二层是沉积在接触区域和相邻结构上的面层氧化物。 第三层是沉积在两个较低层上的掺杂氧化物。 各向异性蚀刻通过氧化物层进行到位于下部衬底上的接触区域。 在第三氧化物中蚀刻选择性比在另外两种氧化物中更快。 面包屑氧化物提供额外的保护，并降低与接触区域相邻的导电结构的通孔的风险。 替代实施例通过覆盖层的氮化物层代替两个最低的氧化物层。 在该实施例中，各向异性蚀刻在氮化物中选择性地比氧化物更快。

公开(公告)号：US5756216A

公开(公告)日：1998-05-26

申请号：US799575

申请日：1997-02-12

申请人： David S. Becker ,  David J. Keller

发明人： David S. Becker ,  David J. Keller

IPC分类号： H01L21/311 ,  H01L21/306

CPC分类号： H01L21/31116 ,  Y10S428/938

摘要： A method is provided for forming a nitride spacer, in which a layer of oxide is grown superjacent a substrate and the semiconductor features disposed thereon. A layer of nitride is deposited superjacent the oxide layer, and a major horizontal portion of the nitride layer anisotropically etched with an ionized fluorocarbon compound. The remainder of the horizontal portion of the nitride layer is removed with NF.sub.3 ions in combination with ionized halogen-containing compound, thereby creating nitride spacers adjacent the features.

摘要翻译： 提供了一种用于形成氮化物间隔物的方法，其中氧化物层在衬底之上生长并且其上​​设置有半导体特征。 氮化物层沉积在氧化物层的上方，并且用电离氟碳化合物各向异性蚀刻的氮化物层的主要水平部分。 氮化物层的水平部分的剩余部分与NF3离子一起被除去，并与电离的含卤化合物组合，从而在特征附近形成氮化物间隔物。

公开(公告)号：US08726848B2

公开(公告)日：2014-05-20

申请号：US13093899

申请日：2011-04-26

申请人： J. Michael Melhorn ,  David S. Becker

发明人： J. Michael Melhorn ,  David S. Becker

IPC分类号： B66F9/10 ,  B66F9/06

CPC分类号： B66F9/06 ,  A01K45/005 ,  B66F11/04

摘要： A cart-handler for mobile carts within narrow confines is provided. The cart-handler is constructed from an elongate frame having at least one upright support rail and opposite ends supported on wheels. A pair of stabilizers is connected to the frame with each stabilizer being movable into a retracted position on the frame and into a laterally-extended position in which the stabilizer directly engages an underlying floor surface to aid in supporting the cart-handler on the floor. When the stabilizers are placed in the laterally-extended position, each stabilizer extends outward from a common side of the elongate frame. A cart-lifter is mounted on the support rail of the frame and is movable vertically along the support rail so that the cart-lifter can engage, elevate, and support a separate mobile cart above the underlying floor surface. The cart-handler can be interconnected to a pair of elevated mobile work platforms.

摘要翻译： 提供了狭窄范围内的移动推车的购物车处理程序。 推车处理器由具有至少一个直立支撑轨道和支撑在车轮上的相对端部的细长框架构成。 一对稳定器连接到框架，每个稳定器可移动到框架上的缩回位置并进入横向延伸的位置，在该位置中稳定器直接接合下面的地板表面，以帮助将推车处理器支撑在地板上。 当稳定器被放置在横向延伸位置时，每个稳定器从细长框架的公共侧向外延伸。 升降机安装在框架的支撑轨道上并且可沿着支撑轨道垂直移动，使得升降机可以接合，提升并且支撑在下面的地板表面上方的单独的移动车。 购物车处理程序可以互连到一对提升的移动工作平台。

公开(公告)号：US20120272925A1

公开(公告)日：2012-11-01

申请号：US13093899

申请日：2011-04-26

申请人： J. Michael Melhorn ,  David S. Becker

发明人： J. Michael Melhorn ,  David S. Becker

IPC分类号： A01K45/00 ,  A01K29/00 ,  E04G1/24 ,  E04G1/22 ,  B66F11/00 ,  B66F11/04

CPC分类号： B66F9/06 ,  A01K45/005 ,  B66F11/04

摘要： A cart-handler for mobile carts within narrow confines is provided. The cart-handler is constructed from an elongate frame having at least one upright support rail and opposite ends supported on wheels. A pair of stabilizers is connected to the frame with each stabilizer being movable into a retracted position on the frame and into a laterally-extended position in which the stabilizer directly engages an underlying floor surface to aid in supporting the cart-handler on the floor. When the stabilizers are placed in the laterally-extended position, each stabilizer extends outward from a common side of the elongate frame. A cart-lifter is mounted on the support rail of the frame and is movable vertically along the support rail so that the cart-lifter can engage, elevate, and support a separate mobile cart above the underlying floor surface. The cart-handler can be interconnected to a pair of elevated mobile work platforms.

摘要翻译： 提供了狭窄范围内的移动推车的购物车处理程序。 推车处理器由具有至少一个直立支撑轨道和支撑在车轮上的相对端部的细长框架构成。 一对稳定器连接到框架，每个稳定器可移动到框架上的缩回位置并进入横向延伸的位置，在该位置中稳定器直接接合下面的地板表面，以帮助将推车处理器支撑在地板上。 当稳定器被放置在横向延伸位置时，每个稳定器从细长框架的公共侧向外延伸。 升降机安装在框架的支撑轨道上并且可沿着支撑轨道垂直移动，使得升降机可以接合，提升并且支撑在下面的地板表面上方的单独的移动车。 购物车处理程序可以互连到一对提升的移动工作平台。