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    Integrated structure for MEMS device and semiconductor device and method of fabricating the same
    12.
    发明授权
    Integrated structure for MEMS device and semiconductor device and method of fabricating the same 有权
    MEMS器件和半导体器件的集成结构及其制造方法

    公开(公告)号：US08872287B2

    公开(公告)日：2014-10-28

    申请号：US12056286

    申请日：2008-03-27

    Applicant: Bang-Chiang Lan ,  Li-Hsun Ho ,  Wei-Cheng Wu ,  Hui-Min Wu ,  Min Chen ,  Tzung-I Su ,  Chien-Hsin Huang

    Inventor： Bang-Chiang Lan ,  Li-Hsun Ho ,  Wei-Cheng Wu ,  Hui-Min Wu ,  Min Chen ,  Tzung-I Su ,  Chien-Hsin Huang

    IPC: H01L29/84 ,  B81C1/00

    CPC classification number: B81C1/00246 ,  B81C1/00801 ,  B81C2201/014 ,  B81C2203/0714 ,  B81C2203/0742 ,  B81C2203/0792 ,  H01L27/0688

    Abstract: The present invention relates to an integrated structure for a MEMS device and a semiconductor device and a method of fabricating the same, in which an etch stopping element is included on a substrate between the MEMS device and the semiconductor device for protecting the semiconductor device from lateral damage when an oxide releasing process is performed to fabricate the MEMS device. The etch stopping element has various profiles and is selectively formed by an individual fabricating process or is simultaneously formed with the semiconductor device in the same fabricating process. It is a singular structure or a combined stacked multilayered structure, for example, a plurality of rows of pillared etch-resistant material plugs, one or a plurality of wall-shaped etch-resistant material plugs, or a multilayered structure of a stack of which and an etch-resistant material layer.

    Abstract translation: 本发明涉及用于MEMS器件和半导体器件的集成结构及其制造方法，其中在MEMS器件和半导体器件之间的衬底上包括蚀刻停止元件，用于保护半导体器件免受横向 执行氧化物释放处理以制造MEMS器件时的损坏。 蚀刻停止元件具有各种形状，并且通过单独的制造工艺选择性地形成，或者在相同的制造工艺中与半导体器件同时形成。 它是单一结构或组合堆叠的多层结构，例如，多排支柱抗蚀刻材料插塞，一个或多个壁状耐蚀刻材料插塞或其堆叠的多层结构 和耐蚀刻材料层。

    Integrated circuit and fabricating method thereof
    14.
    发明授权
    Integrated circuit and fabricating method thereof 有权
    集成电路及其制造方法

    公开(公告)号：US08587078B2

    公开(公告)日：2013-11-19

    申请号：US12754610

    申请日：2010-04-06

    Applicant: Chien-Hsin Huang ,  Li-Che Chen ,  Ming-I Wang ,  Bang-Chiang Lan ,  Tzung-Han Tan ,  Hui-Min Wu ,  Tzung-I Su

    Inventor： Chien-Hsin Huang ,  Li-Che Chen ,  Ming-I Wang ,  Bang-Chiang Lan ,  Tzung-Han Tan ,  Hui-Min Wu ,  Tzung-I Su

    IPC: H01L29/84 ,  H01L21/02

    CPC classification number: H01L27/0617 ,  B81B2201/0257 ,  B81B2207/015 ,  B81C1/00246 ,  B81C2203/0714 ,  B81C2203/0742 ,  B81C2203/0771

    Abstract: A fabricating method of integrated circuit is provided. During the fabricating process of an interconnecting structure of the integrated circuit, a micro electromechanical system (MENS) diaphragm is formed between two adjacent dielectric layers of the interconnecting structure. The method of forming the MENS diaphragm includes the following steps. Firstly, a plurality of first openings is formed within any dielectric layer to expose corresponding conductive materials of the interconnecting structure. Secondly, a bottom insulating layer is formed on the dielectric layer and filling into the first openings. Third, portions of the bottom insulating layer located in the first openings are removed to form at least a first trench for exposing the corresponding conductive materials. Then, a first electrode layer and a top insulating layer are sequentially formed on the bottom insulating layer, and the first electrode layer filled into the first trench and is electrically connected to the conductive materials.

    Abstract translation: 提供了集成电路的制造方法。 在集成电路的互连结构的制造过程中，在互连结构的两个相邻电介质层之间形成微机电系统（MENS）隔膜。 形成MENS隔膜的方法包括以下步骤。 首先，在任何电介质层内形成多个第一开口以暴露互连结构的相应的导电材料。 其次，在电介质层上形成底部绝缘层并填充到第一开口中。 第三，去除位于第一开口中的底部绝缘层的部分，以形成用于暴露相应导电材料的至少第一沟槽。 然后，第一电极层和顶部绝缘层依次形成在底部绝缘层上，第一电极层被填充到第一沟槽中并与导电材料电连接。

    Optoelectronic device and method of forming the same
    15.
    发明授权
    Optoelectronic device and method of forming the same 有权
    光电器件及其形成方法

    公开(公告)号：US08139907B2

    公开(公告)日：2012-03-20

    申请号：US12648861

    申请日：2009-12-29

    Applicant: Tzung-I Su ,  Ming-I Wang ,  Bang-Chiang Lan ,  Te-Kan Liao ,  Chao-An Su ,  Chien-Hsin Huang ,  Hui-Min Wu ,  Tzung-Han Tan ,  Min Chen ,  Meng-Jia Lin

    Inventor： Tzung-I Su ,  Ming-I Wang ,  Bang-Chiang Lan ,  Te-Kan Liao ,  Chao-An Su ,  Chien-Hsin Huang ,  Hui-Min Wu ,  Tzung-Han Tan ,  Min Chen ,  Meng-Jia Lin

    IPC: G02B6/12

    CPC classification number: G02B6/12004 ,  G02B2006/12061

    Abstract: An optoelectronic device including a substrate, a half-boat-shaped material layer, a deep trench isolation structure, and an optical waveguide is provided. The substrate has a first area. The half-boat-shaped material layer is disposed in the substrate within the first area. The refractive index of the half-boat-shaped material layer is lower than that of the substrate. A top surface of the half-boat-shaped material layer is coplanar with the surface of the substrate. The deep trench isolation structure is disposed in the substrate within the first area and located at one side of a bow portion of the half-boat-shaped material layer. The optical waveguide is disposed on the substrate within the first area. The optical waveguide overlaps a portion of the deep trench isolation structure and at least a portion of the half-boat-shaped material layer.

    Abstract translation: 提供了包括基板，半舟形材料层，深沟槽隔离结构和光波导的光电子器件。 衬底具有第一区域。 半船形材料层设置在第一区域内的基板内。 半舟状材料层的折射率低于基板的折射率。 半舟状材料层的上表面与基板的表面共面。 深沟槽隔离结构设置在第一区域内的基板中，并且位于半舟形材料层的弓形部分的一侧。 光波导路设置在第一区域内的基板上。 光波导与深沟槽隔离结构的一部分和半舟形材料层的至少一部分重叠。

    Integrated Circuit and Fabricating Method thereof
    16.
    发明申请
    Integrated Circuit and Fabricating Method thereof 有权
    集成电路及其制造方法

    公开(公告)号：US20110241137A1

    公开(公告)日：2011-10-06

    申请号：US12754610

    申请日：2010-04-06

    Applicant: Chien-Hsin HUANG ,  Li-Che Chen ,  Ming-I Wang ,  Bang-Chiang Lan ,  Tzung-Han Tan ,  Hui-Min Wu ,  Tzung-I Su

    Inventor： Chien-Hsin HUANG ,  Li-Che Chen ,  Ming-I Wang ,  Bang-Chiang Lan ,  Tzung-Han Tan ,  Hui-Min Wu ,  Tzung-I Su

    IPC: H01L29/84 ,  H01L21/02

    CPC classification number: H01L27/0617 ,  B81B2201/0257 ,  B81B2207/015 ,  B81C1/00246 ,  B81C2203/0714 ,  B81C2203/0742 ,  B81C2203/0771

    Abstract: A fabricating method of integrated circuit is provided. During the fabricating process of an interconnecting structure of the integrated circuit, a micro electromechanical system (MENS) diaphragm is formed between two adjacent dielectric layers of the interconnecting structure. The method of forming the MENS diaphragm includes the following steps. Firstly, a plurality of first openings is formed within any dielectric layer to expose corresponding conductive materials of the interconnecting structure. Secondly, a bottom insulating layer is formed on the dielectric layer and filling into the first openings. Third, portions of the bottom insulating layer located in the first openings are removed to form at least a first trench for exposing the corresponding conductive materials. Then, a first electrode layer and a top insulating layer are sequentially formed on the bottom insulating layer, and the first electrode layer filled into the first trench and is electrically connected to the conductive materials.

    Abstract translation: 提供了集成电路的制造方法。 在集成电路的互连结构的制造过程中，在互连结构的两个相邻电介质层之间形成微机电系统（MENS）隔膜。 形成MENS隔膜的方法包括以下步骤。 首先，在任何电介质层内形成多个第一开口以暴露互连结构的相应的导电材料。 其次，在电介质层上形成底部绝缘层并填充到第一开口中。 第三，去除位于第一开口中的底部绝缘层的部分，以形成用于暴露相应导电材料的至少第一沟槽。 然后，第一电极层和顶部绝缘层依次形成在底部绝缘层上，第一电极层被填充到第一沟槽中并与导电材料电连接。

    OPTOELECTRONIC DEVICE AND METHOD OF FORMING THE SAME
    17.
    发明申请
    OPTOELECTRONIC DEVICE AND METHOD OF FORMING THE SAME 有权
    光电装置及其形成方法

    公开(公告)号：US20110158581A1

    公开(公告)日：2011-06-30

    申请号：US12648861

    申请日：2009-12-29

    Applicant: Tzung-I Su ,  Ming-I Wang ,  Bang-Chiang Lan ,  Te-Kan Liao ,  Chao-An Su ,  Chien-Hsin Huang ,  Hui-Min Wu ,  Tzung-Han Tan ,  Min Chen ,  Meng-Jia Lin

    Inventor： Tzung-I Su ,  Ming-I Wang ,  Bang-Chiang Lan ,  Te-Kan Liao ,  Chao-An Su ,  Chien-Hsin Huang ,  Hui-Min Wu ,  Tzung-Han Tan ,  Min Chen ,  Meng-Jia Lin

    IPC: G02B6/12 ,  H01L21/30

    CPC classification number: G02B6/12004 ,  G02B2006/12061

    Abstract: An optoelectronic device including a substrate, a half-boat-shaped material layer, a deep trench isolation structure, and an optical waveguide is provided. The substrate has a first area. The half-boat-shaped material layer is disposed in the substrate within the first area. The refractive index of the half-boat-shaped material layer is lower than that of the substrate. A top surface of the half-boat-shaped material layer is coplanar with the surface of the substrate. The deep trench isolation structure is disposed in the substrate within the first area and located at one side of a bow portion of the half-boat-shaped material layer. The optical waveguide is disposed on the substrate within the first area. The optical waveguide overlaps a portion of the deep trench isolation structure and at least a portion of the half-boat-shaped material layer.

    Abstract translation: 提供了包括基板，半舟形材料层，深沟槽隔离结构和光波导的光电子器件。 衬底具有第一区域。 半船形材料层设置在第一区域内的基板内。 半舟状材料层的折射率低于基板的折射率。 半舟状材料层的上表面与基板的表面共面。 深沟槽隔离结构设置在第一区域内的基板中，并且位于半舟形材料层的弓形部分的一侧。 光波导路设置在第一区域内的基板上。 光波导与深沟槽隔离结构的一部分和半舟形材料层的至少一部分重叠。

    Button-cell battery chamber
    18.
    发明申请
    Button-cell battery chamber 审中-公开
    纽扣电池室

    公开(公告)号：US20070178368A1

    公开(公告)日：2007-08-02

    申请号：US11340433

    申请日：2006-01-27

    Applicant: Hui-Ming Wu ,  Hui-Min Wu ,  Pi-Hsia Lee

    Inventor： Hui-Ming Wu ,  Hui-Min Wu ,  Pi-Hsia Lee

    IPC: H01M2/10

    CPC classification number: H01M2/1038 ,  H01M2/1044

    Abstract: A battery chamber of button-cell batteries for consumer electronic devices is provided herein, which mainly contains a top member and a bottom member joined together to form a number of cell rooms for the accommodation of the button-cell batteries. A number of conduction plates covers the top and bottom of the cell rooms and electrically connects the button-cell batteries into a series connection. The thickness of the top and bottom members is roughly one half of a standard button-cell battery. The top and bottom members can be easily pried open for the installation and removal of the button-cell batteries.

    Abstract translation: 本发明提供了一种用于消费电子设备的钮扣电池的电池室，其主要包括连接在一起的顶部构件和底部构件，以形成用于按钮式电池的容纳的多个电池室。 多个导电板覆盖电池室的顶部和底部，并将钮扣电池电连接成串联连接。 顶部和底部构件的厚度大约是标准钮扣电池的一半。 顶部和底部构件可以方便地打开以安装和拆卸钮扣电池。

    Method of fabricating a MEMS microphone with trenches serving as vent pattern
    19.
    发明授权
    Method of fabricating a MEMS microphone with trenches serving as vent pattern 有权
    制造具有沟槽作为排气孔图案的MEMS麦克风的方法

    公开(公告)号：US08865500B2

    公开(公告)日：2014-10-21

    申请号：US12699797

    申请日：2010-02-03

    Applicant: Chien-Hsin Huang ,  Bang-Chiang Lan ,  Hui-Min Wu ,  Tzung-I Su ,  Chao-An Su ,  Tzung-Han Tan

    Inventor： Chien-Hsin Huang ,  Bang-Chiang Lan ,  Hui-Min Wu ,  Tzung-I Su ,  Chao-An Su ,  Tzung-Han Tan

    IPC: H01L21/30

    CPC classification number: H01L21/30

    Abstract: A method of fabricating a MEMS microphone includes: first providing a substrate having a first surface and a second surface. The substrate is divided into a logic region and a MEMS region. The first surface of the substrate is etched to form a plurality of first trenches in the MEMS region. An STI material is then formed in the plurality of first trenches. Subsequently, the second surface of the substrate is etched to form a second trench in the MEMS region, wherein the second trench connects with each of the first trenches. Finally, the STI material in the first trenches is removed.

    Abstract translation: 一种制造MEMS麦克风的方法包括：首先提供具有第一表面和第二表面的基底。 衬底分为逻辑区和MEMS区。 蚀刻衬底的第一表面以在MEMS区域中形成多个第一沟槽。 然后在多个第一沟槽中形成STI材料。 随后，蚀刻衬底的第二表面以在MEMS区域中形成第二沟槽，其中第二沟槽与每个第一沟槽连接。 最后，第一个沟槽中的STI材料被去除。

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