Abstract:
A DRAM circuit with reduced power consumption and in some circumstances faster memory array access speed. Input/output lines connected to a memory array are sensed according to their capacitance/length in comparison to a threshold capacitance/length. The input/output lines that are shorter, or less capacitive, than the threshold are sensed sooner than those input/output lines that are longer, more capacitive, than the threshold. Since shorter input/output lines are sensed sooner, they require less power and may be accessed faster.
Abstract:
Ammunition feeder with a handle portion and a head portion. The handle portion is integrally attached to the head portion. The handle portion is a flat elongate shape having raised portions to help the user maintain his grip on the handle. The head portion is shaped to accept the front end of a standard ammunition belt. The head is flattened longitudinally on one side and includes a longitudinal recess so that the feed pawl on a standard machine gun is not activated by the head. A preferred embodiment includes that the feeder fits with the M 60 machine gun and the 240 Golf machine gun.
Abstract:
Described herein is a resilient floor covering made from non-vinyl materials. Also disclosed are related methods for manufacturing the resilient floor coverings described herein.
Abstract:
The present invention pertains to carpet and methods of making and recycling carpet. In one aspect, the carpet includes: a primary backing which has a face and a back surface; a plurality of fibers attached to the primary backing and extending from the face of the primary backing and exposed at the back surface of the primary backing; an adhesive composition backing; and an optional secondary backing adjacent to the adhesive backing. The method of making carpet includes extrusion coating the adhesive composition onto the back surface of a primary backing to form the adhesive composition backing. The method of recycling carpet can recover one or more polymeric carpet components.
Abstract:
In a multi-bank memory system such as a synchronous dynamic random access memory (SDRAM), a method of writing data to the banks is provided. This method allows for writing to any number of banks. More particularly, this method allows for writing to a selected number of banks between one and all banks. In addition, the method retains the discrete nature of the selected banks by allowing any row in each bank to be accessed regardless of the rows activated in other banks. As a result, rows of different memory banks that are intended to store similar data may be accessed simultaneously for purposes of writing the data in test and non-test modes. This allows for quicker writing to the SDRAM without the errors that may be created by other fast writing modes, such as data compression.
Abstract:
A circuit and method for providing temperature data indicative of a temperature measured by a temperature sensor. The circuit is coupled to the temperature sensor and configured to identify for a coarse temperature range one of a plurality of fine temperature ranges corresponding to the temperature measured by the temperature sensor and generate temperature data that is provided on an asynchronous output data path.
Abstract:
An apparatus and method for selecting a storage location in a memory device including receiving at least one of a pre-decoded location address signal, a match signal, and a redundant location address enable signal, enabling one of a decoder and a redundant decoder in response to the match signal, wherein the decoder is operable to generate a location select signal for selecting a first location, the decoder being responsive to the pre-decoded location address signal, and wherein the redundant decoder is operable to generate a redundant location select signal for selecting a second location, the redundant decoder being responsive to the redundant location address enable signal, and terminating one of the generation of a location select signal and the generation of a redundant location select signal in response to a precharge signal.
Abstract:
A system and method for decoding command signals that includes a command decoder configured to generate internal control signals to perform an operation based on the command signals and an operating state. The same combination of command signals can request different commands depending on the operating state. A command is selected from a first set of operations according to the command signals when the memory system is in a first operating state and a command is selected from a second set of operations according to the command signals when the memory system is in a second operating state.
Abstract:
A carton accommodates a flexible vessel and includes a reclosure feature. The reclosure feature provides a relatively tight seal for the contents of the flexible vessel.
Abstract:
A DDR SDRAM where unidirectional row logic is associated with and connected to a single memory array instead of being associated with and connected to multiple memory arrays. The unidirectional row logic is located in the outward periphery of its associated array, but is not within a throat region between two arrays. The location of the row logic allows the throat region to include more bidirectional IO circuitry and signal lines servicing two arrays, which increases the performance of the SDRAM. In addition, separate power bussing is employed for the memory arrays and IO circuitry. This prevents noise from the arrays from affecting the IO circuitry and signal lines of the throat region and vice versa.