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11.发明申请公开(公告)号：US20080054264A1
公开(公告)日：2008-03-06
申请号：US11649238
申请日：2007-01-04
Applicant: Jun-Yao Huang , Kuang-Cheng Fu , Jen-Chieh Lin , Chin-Lung Yeh
Inventor： Jun-Yao Huang , Kuang-Cheng Fu , Jen-Chieh Lin , Chin-Lung Yeh
IPC: H01L29/04
CPC classification number: G02F1/136213 , G02F1/1345 , G02F2201/50 , H01L27/124 , H01L27/1244 , H01L27/1255
Abstract: A thin film transistor array substrate and the manufacturing method thereof are disclosed herein. A first patterned metal layer, an insulating layer, a patterned layer, and a second patterned metal layer are sequentially formed on a substrate. Then, a plurality of scan lines and a plurality of source lines are disposed on the substrate and define a plurality of pixel regions. A plurality of the storage capacitance lines are disposed on the substrate in a direction extending along the scan lines and across the pixel regions, wherein each of the storage capacitance lines is essentially perpendicular to each of the source lines and to form a cross portion. A plurality of patterned thin films are disposed on the storage capacitance lines and above the cross portion.
Abstract translation: 本文公开了薄膜晶体管阵列基板及其制造方法。 第一图案化金属层，绝缘层，图案层和第二图案化金属层依次形成在基板上。 然后，多个扫描线和多条源极线设置在基板上并限定多个像素区域。 多条存储电容线沿着扫描线和跨越像素区域延伸的方向设置在基板上，其中每个保持电容线基本上垂直于每个源极线并形成交叉部分。 多个图案化薄膜被设置在辅助电容线上并且在十字部分之上。
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公开(公告)号：US20170228050A1
公开(公告)日：2017-08-10
申请号：US15015191
申请日：2016-02-04
Applicant: JEN-CHIEH LIN
Inventor： JEN-CHIEH LIN
IPC: G06F3/0354 , G06F3/041 , G06F3/044
CPC classification number: G06F3/03545 , G06F3/044
Abstract: A stylus includes a circuit module, a battery module electrically connected to the circuit module, and a fine adjustment module. The circuit module has a circuit board and a variable resistor mounted on the circuit board. The fine adjustment module has a conductor and a conductive refill movably contact with the conductor. The conductor is connected to the circuit board and is electrically connected to the variable resistor via the conductor and the circuit board. The resistance value of the variable resistor can be adjusted to cause the stylus to output a first signal strength through the conductive refill. The conductive refill can be moved with respect to the conductor to enable the stylus to have a signal strength, which is X˜Y % of the first signal strength (80≦X≦100 and 100
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公开(公告)号：US20130049141A1
公开(公告)日：2013-02-28
申请号：US13214260
申请日：2011-08-22
Applicant: Tsun-Min Cheng , Min-Chuan Tsai , Chih-Chien Liu , Jen-Chieh Lin , Pei-Ying Li , Shao-Wei Wang , Mon-Sen Lin , Ching-Ling Lin
Inventor： Tsun-Min Cheng , Min-Chuan Tsai , Chih-Chien Liu , Jen-Chieh Lin , Pei-Ying Li , Shao-Wei Wang , Mon-Sen Lin , Ching-Ling Lin
IPC: H01L29/49 , H01L21/283
CPC classification number: H01L29/4966 , H01L21/82345 , H01L21/823842 , H01L21/823857 , H01L29/4232 , H01L29/435 , H01L29/51 , H01L29/66045 , H01L29/66545 , H01L29/78
Abstract: A metal gate structure located on a substrate includes a gate dielectric layer, a metal layer and a titanium aluminum nitride metal layer. The gate dielectric layer is located on the substrate. The metal layer is located on the gate dielectric layer. The titanium aluminum nitride metal layer is located on the metal layer.
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公开(公告)号：US20110291054A1
公开(公告)日：2011-12-01
申请号：US13093279
申请日：2011-04-25
Applicant: Mingqian He , Jianfeng Li , Jen-Chieh Lin , James Robert Matthews , Weijun Niu , Michael Lesley Sorensen
Inventor： Mingqian He , Jianfeng Li , Jen-Chieh Lin , James Robert Matthews , Weijun Niu , Michael Lesley Sorensen
IPC: H01B1/12
CPC classification number: C09D11/36 , C08G2261/124 , C08G2261/141 , C08G2261/3223 , C08G2261/3243 , C08G2261/92 , C08K5/01 , C08L65/00
Abstract: A formulation including: an organic semiconducting material; and a carrier liquid including at least one of: a first liquid of the formulas (III) or (II): or mixtures of formulas (III) and (II); and a second liquid of a saturated or unsaturated cyclic hydrocarbylene compound of the formula (I): where the respective R1-8, x, and n are as defined herein, and optionally a tertiary liquid carrier, as defined herein. Also disclosed are semiconducting articles prepared with the formulations as defined herein.
Abstract translation: 一种制剂，包括：有机半导体材料; 和包含以下至少一种的载体液体：式（III）或（II）的第一液体：或式（III）和（II）的混合物; 和式（I）的饱和或不饱和环状亚烃基化合物的第二液体：其中相应的R1-8，x和n如本文所定义，和任选地如本文所定义的叔液体载体。 还公开了用本文定义的制剂制备的半导体制品。
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公开(公告)号：US08017229B2
公开(公告)日：2011-09-13
申请号：US11663815
申请日：2005-09-26
Applicant: Chenxi Zhang , Jen-Chieh Lin , Chi-Kwong Chow , Xiang Wang
Inventor： Chenxi Zhang , Jen-Chieh Lin , Chi-Kwong Chow , Xiang Wang
CPC classification number: C08G18/7657 , B29C44/0461 , B29C67/246 , B29K2075/00 , B29K2105/043 , B32B5/20 , B32B7/02 , B32B27/065 , B32B27/40 , B32B2266/0278 , B32B2266/08 , B32B2307/72 , C08G18/4804 , C08G2101/0008 , C08G2101/0025 , C08G2101/0033 , C08G2101/0058 , C08G2101/0066 , C08G2101/0083 , Y10T428/249976 , Y10T428/249977 , Y10T428/249987 , Y10T428/249991
Abstract: A polyurethane composite is disclosed comprising rigid polyurethane and foamed thereupon a flexible integral skin (surface pore closed) polyurethane foam, wherein the rigid polyurethane having a density range of 600 kg/m3 to 1200 kg/m3, a Shore A hardness range of 90 to 99, a Shore D hardness range of 40 to 80, a tensile strength range of 10MPa to 60 MPa, a flexural strength range of 20 MPa to 60 Mpa, a elastic flexural modulus range of 800 MPa to 2500 Mpa, an elongation rate at break of 10-100% and an elongation at break of 25-150%; wherein the flexible integral skin (surface pore closed) polyurethane foam having a density range of 60 kg/m3 to 200 kg/m3, a tensile strength of 60 kPa to 250 kPa, an elongation at break of 70-180%, a tearing strength of 130-220 N/m, a resilience of falling ball of 40-70%, IFD25% of 200-600 N and IFD65% of 600-1800 N.
Abstract translation: 公开了一种聚氨酯复合材料，其包含刚性聚氨酯并且随后发泡的柔性整体表面（表面孔封闭）聚氨酯泡沫，其中密度范围为600kg / m 3至1200kg / m 3的硬质聚氨酯，肖氏A硬度范围为90至 99，肖氏D硬度范围为40〜80，拉伸强度范围为10MPa〜60MPa，弯曲强度范围为20MPa〜60Mpa，弹性挠曲模量范围为800MPa〜2500Mpa，断裂伸长率 为10-100％，断裂伸长率为25-150％; 其中密度范围为60kg / m 2至200kg / m 3，抗拉强度为60kPa至250kPa，断裂伸长率为70-180％的柔软整体表面（表面孔封闭）聚氨酯泡沫，撕裂强度 130-220 N / m，落球弹性为40-70％，IFD25％为200-600N，IFD65％为600-1800N。
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Patent Agency Ranking
公开(公告)号：US20110189855A1
公开(公告)日：2011-08-04
申请号：US12699071
申请日：2010-02-03
Applicant: Jen-Chieh Lin , Kai-Chun Yang , Chih-Yueh Li , Geng-Yu Fan , Jeng-Yu Fang , Teng-Chun Tsai , Chia-Lin Hsu
Inventor： Jen-Chieh Lin , Kai-Chun Yang , Chih-Yueh Li , Geng-Yu Fan , Jeng-Yu Fang , Teng-Chun Tsai , Chia-Lin Hsu
IPC: H01L21/306
CPC classification number: H01L21/306
Abstract: A method for cleaning a surface is disclosed. First, a substrate including Cu and a barrier layer is provided. Second, a first chemical mechanical polishing procedure is performed on the substrate. Then, a second chemical mechanical polishing procedure is performed on the barrier layer. The second chemical mechanical polishing procedure includes performing a main chemical mechanical polishing procedure to partially remove the barrier layer and performing a chemical buffing procedure on the substrate using a chemical solution which has a pH value of about 6 to about 8 to remove residues on the substrate after the main chemical mechanical polishing procedure. Later, a water rinsing procedure is performed on the substrate. Afterwards, a post clean procedure is performed on the substrate after the second chemical mechanical polishing procedure.
Abstract translation: 公开了一种清洁表面的方法。 首先，提供包含Cu和阻挡层的基板。 其次，在基板上进行第一化学机械抛光工序。 然后，在阻挡层上进行第二化学机械抛光工序。 第二化学机械抛光方法包括执行主要的化学机械抛光方法以部分去除阻挡层并使用pH值为约6至约8的化学溶液在基底上进行化学抛光过程以去除基底上的残留物 经过主要的化学机械抛光程序。 之后，在基板上进行水洗工序。 之后，在第二化学机械抛光程序之后，在基板上执行后清洁程序。
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公开(公告)号：US07675088B2
公开(公告)日：2010-03-09
申请号：US12256456
申请日：2008-10-22
Applicant: Jun-Yao Huang , Kuang-Cheng Fu , Jen-Chieh Lin , Chin-Lung Yeh
Inventor： Jun-Yao Huang , Kuang-Cheng Fu , Jen-Chieh Lin , Chin-Lung Yeh
IPC: H01L21/336
CPC classification number: G02F1/136213 , G02F1/1345 , G02F2201/50 , H01L27/124 , H01L27/1244 , H01L27/1255
Abstract: A thin film transistor array substrate and the manufacturing method thereof are disclosed herein. A first patterned metal layer, an insulating layer, a patterned layer, and a second patterned metal layer are sequentially formed on a substrate. Then, a number of scan lines and a number of source lines are disposed on the substrate and define a number of pixel regions. A number of the storage capacitance lines are disposed on the substrate in a direction extending along the scan lines and across the pixel regions, wherein each of the storage capacitance lines is essentially perpendicular to each of the source lines and to form a cross portion. A number of patterned thin films are disposed on the storage capacitance lines and above the cross portion.
Abstract translation: 本文公开了薄膜晶体管阵列基板及其制造方法。 第一图案化金属层，绝缘层，图案层和第二图案化金属层依次形成在基板上。 然后，多个扫描线和多条源极线设置在基板上并限定多个像素区域。 多个存储电容线沿着扫描线和跨越像素区域延伸的方向设置在基板上，其中每个保持电容线基本上垂直于每个源极线并且形成交叉部分。 多个图案化薄膜被设置在保持电容线上并且在十字部分之上。
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公开(公告)号：US20060063251A1
公开(公告)日：2006-03-23
申请号：US10945960
申请日：2004-09-22
Applicant: Hsiao-Chung Tsai , Hsueh-Chin Lin , Jen-Chieh Lin
Inventor： Hsiao-Chung Tsai , Hsueh-Chin Lin , Jen-Chieh Lin
IPC: C12M1/34
CPC classification number: B01L3/50273 , B01L3/5027 , B01L2200/16 , B01L2300/043 , B01L2300/046 , B01L2300/0636 , B01L2300/069 , B01L2300/0867 , B01L2400/0406 , B01L2400/0481 , B01L2400/0683 , G01N33/54366 , Y10T436/2575
Abstract: An immunoassay cartridge for sensing at least one analyte in a biological sample is disclosed. The immunoassay cartridge comprises a supporting plate, a reaction cavity made within the supporting plate and having at least one analyte-binding molecule immobilized therein, a sample receiving end connected to the reaction cavity to allow the biological sample to flow into the reaction cavity for forming at least one complex of the analyte and the analyte-binding molecule, a first package containing a recognizing molecule, a first channel communicating the first package and the reaction cavity to allow the recognizing molecule to flow into the reaction cavity for forming a first product of the complex and the complex-binding molecule, a second package containing a buffer solution and a second channel communicating the second package and the reaction cavity to allow the buffer solution to flow into the reaction cavity.
Abstract translation: 公开了一种用于感测生物样品中至少一种分析物的免疫测定盒。 免疫测定盒包括支撑板，在支撑板内制成的反应腔，并且其中固定有至少一个分析物结合分子，样品接收端连接到反应腔，以允许生物样品流入反应腔以形成 分析物和分析物结合分子的至少一个复合物，包含识别分子的第一包装，连通第一包装和反应腔的第一通道，以允许识别分子流入反应腔中以形成第一产物 所述复合物和所述复合结合分子，包含缓冲溶液的第二包装和连通所述第二包装和所述反应腔的第二通道，以使所述缓冲溶液流入所述反应腔。
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公开(公告)号：US08916066B2
公开(公告)日：2014-12-23
申请号：US13093279
申请日：2011-04-25
Applicant: Mingqian He , Jianfeng Li , Jen-Chieh Lin , James Robert Matthews , Weijun Niu , Michael Lesley Sorensen
Inventor： Mingqian He , Jianfeng Li , Jen-Chieh Lin , James Robert Matthews , Weijun Niu , Michael Lesley Sorensen
CPC classification number: C09D11/36 , C08G2261/124 , C08G2261/141 , C08G2261/3223 , C08G2261/3243 , C08G2261/92 , C08K5/01 , C08L65/00
Abstract: A formulation including: an organic semiconducting material; and a carrier liquid including at least one of: a first liquid of the formulas (III) or (II): or mixtures of formulas (III) and (II); and a second liquid of a saturated or unsaturated cyclic hydrocarbylene compound of the formula (I): where the respective R1-8, x, and n are as defined herein, and optionally a tertiary liquid carrier, as defined herein. Also disclosed are semiconducting articles prepared with the formulations as defined herein.
Abstract translation: 一种制剂，包括：有机半导体材料; 和包含以下至少一种的载体液体：式（III）或（II）的第一液体：或式（III）和（II）的混合物; 和式（I）的饱和或不饱和环状亚烃基化合物的第二液体：其中相应的R1-8，x和n如本文所定义，和任选地如本文所定义的叔液体载体。 还公开了用本文定义的制剂制备的半导体制品。
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公开(公告)号：US20130011938A1
公开(公告)日：2013-01-10
申请号：US13176790
申请日：2011-07-06
Applicant: Wei-Che TSAO , Chia-Lin Hsu , Jen-Chieh Lin , Teng-Chun Tsai , Hsin-Kuo Hsu , Ya-Hsueh Hsieh , Ren-Peng Huang , Chih-Hsien Chen , Wen-Chin Lin , Yung-Lun Hsieh
Inventor： Wei-Che TSAO , Chia-Lin Hsu , Jen-Chieh Lin , Teng-Chun Tsai , Hsin-Kuo Hsu , Ya-Hsueh Hsieh , Ren-Peng Huang , Chih-Hsien Chen , Wen-Chin Lin , Yung-Lun Hsieh
IPC: H01L21/66 , H01L21/306 , H01L21/304
CPC classification number: H01L21/31053 , H01L21/3212 , H01L21/76898 , H01L22/12 , H01L22/26 , H01L2924/0002 , H01L2924/00
Abstract: A method for manufacturing TSVs, wherein the method comprises several steps as follows: A stack structure having a substrate and an ILD layer (inter layer dielectric layer) is provided, in which an opening penetrating through the ILD layer and further extending into the substrate is formed. After an insulator layer and a metal barrier layer are formed on the stack structure and the sidewalls of the opening, a top metal layer is then formed on the stack structure to fulfill the opening. A first planarization process stopping on the barrier layer is conducted to remove a portion of the top metal layer. A second planarization process stopping on the ILD layer is subsequently conducted to remove a portion of the metal barrier layer, a portion of the insulator layer and a portion of the top metal layer, wherein the second planarization process has a polishing endpoint determined by a light interferometry or a motor current.
Abstract translation: 一种制造TSV的方法，其中该方法包括以下几个步骤：提供具有基板和ILD层（层间电介质层）的堆叠结构，其中穿透ILD层并进一步延伸到基板中的开口是 形成。 在堆叠结构和开口的侧壁上形成绝缘体层和金属阻挡层之后，在堆叠结构上形成顶部金属层以实现开口。 进行停止在阻挡层上的第一平面化处理以去除顶部金属层的一部分。 随后进行停止在ILD层上的第二平坦化处理以去除金属阻挡层的一部分，绝缘体层的一部分和顶部金属层的一部分，其中第二平坦化工艺具有由光线确定的抛光终点 干涉测量或电机电流。
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