公开(公告)号：US20090184264A1

公开(公告)日：2009-07-23

申请号：US12018756

申请日：2008-01-23

申请人： Howard H. Chen ,  Louis C. Hsu ,  Lawrence S. Mok ,  J. Campbell Scott

发明人： Howard H. Chen ,  Louis C. Hsu ,  Lawrence S. Mok ,  J. Campbell Scott

IPC分类号： H01L21/268

CPC分类号： H01L21/324 ,  H01L21/268 ,  H01L24/01 ,  H01L25/0657 ,  H01L27/0688 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/14 ,  H01L2924/00

摘要： A laser annealing method for annealing a stacked semiconductor structure having at least two stacked layers is disclosed. A laser beam is focused on a lower layer of the stacked layers. The laser beam is then scanned to anneal features in the lower layer. The laser beam is then focused on an upper layer of the stacked layers, and the laser beam is scanned to anneal features in the upper layer. The laser has a wavelength of less than one micrometer. The beam size, depth of focus, energy dosage, and scan speed of the laser beam are programmable. Features in the lower layer are offset from features in the upper layer such that these features do not overlap along a plane parallel to a path of the laser beam. Each of the stacked layers includes active devices, such as transistors. Also, the first and second layers may be annealed simultaneously.

摘要翻译： 公开了一种用于退火具有至少两个堆叠层的层叠半导体结构的激光退火方法。 激光束聚焦在堆叠层的下层。 然后扫描激光束以退火下层中的特征。 然后将激光束聚焦在堆叠层的上层上，并且激光束被扫描以退火上层中的特征。 激光器的波长小于1微米。 激光束的光束尺寸，焦深，能量投射和扫描速度是可编程的。 较低层中的特征偏离上层中的特征，使得这些特征不沿着与激光束的路径平行的平面重叠。 堆叠层中的每一个包括诸如晶体管的有源器件。 此外，第一层和第二层可以同时退火。

公开(公告)号：US20090175068A1

公开(公告)日：2009-07-09

申请号：US11969981

申请日：2008-01-07

申请人： Xu Ouyang ,  Louis C. Hsu

发明人： Xu Ouyang ,  Louis C. Hsu

IPC分类号： G11C11/00

CPC分类号： G11C11/412

摘要： An SRAM device comprising a pair of MCSFETs connected as access transistors (pass gates). An SRAM device design structure embodied or stored in a machine readable medium includes two MCSFETs connected as access transistors.

摘要翻译： 一种SRAM器件，包括连接作为存取晶体管（通孔）的一对MCSFET。 体现或存储在机器可读介质中的SRAM器件设计结构包括作为存取晶体管连接的两个MCSFET。

公开(公告)号：US07470929B2

公开(公告)日：2008-12-30

申请号：US11491721

申请日：2006-07-24

申请人： Louis C. Hsu ,  Rajiv V. Joshi ,  Jack Allan Mandelman ,  Chih-Chao Yang

发明人： Louis C. Hsu ,  Rajiv V. Joshi ,  Jack Allan Mandelman ,  Chih-Chao Yang

IPC分类号： H01L29/10

CPC分类号： H01L23/5256 ,  H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

摘要： Techniques are provided for fuse/anti-fuse structures, including an inner conductor structure, an insulating layer spaced outwardly of the inner conductor structure, an outer conductor structure disposed outwardly of the insulating layer, and a cavity-defining structure that defines a cavity, with at least a portion of the cavity-defining structure being formed from at least one of the inner conductor structure, the insulating layer, and the outer conductor structure. Methods of making and programming the fuse/anti-fuse structures are also provided.

公开(公告)号：US20080318415A1

公开(公告)日：2008-12-25

申请号：US12199407

申请日：2008-08-27

申请人： Kwong Hon Wong ,  Louis C. Hsu ,  Timothy J. Dalton ,  Carl Radens ,  Chih-Chao Yang ,  Lawrence A. Clevenger ,  Theodorus E. Standaert

发明人： Kwong Hon Wong ,  Louis C. Hsu ,  Timothy J. Dalton ,  Carl Radens ,  Chih-Chao Yang ,  Lawrence A. Clevenger ,  Theodorus E. Standaert

IPC分类号： H01L21/4763

CPC分类号： H01L21/76852 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of making an interconnect comprising: providing an interconnect structure in a dielectric material, recessing the dielectric material such that a portion of the interconnect structure extends above an upper surface of the dielectric; and depositing an encasing cap over the extended portion of the interconnect structure.

摘要翻译： 一种制造互连的方法，包括：在介电材料中提供互连结构，使所述电介质材料凹陷，使得所述互连结构的一部分在所述电介质的上表面上方延伸; 以及在所述互连结构的延伸部分上沉积封装盖。

公开(公告)号：US20080185728A1

公开(公告)日：2008-08-07

申请号：US11670524

申请日：2007-02-02

申请人： Lawrence A. Clevenger ,  Matthew E. Colburn ,  Louis C. Hsu ,  Wan-Kin Li

发明人： Lawrence A. Clevenger ,  Matthew E. Colburn ,  Louis C. Hsu ,  Wan-Kin Li

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L21/7682 ,  H01L21/76808 ,  H01L21/76835 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a microelectronic circuit includes the steps of providing a first wiring level comprising first wiring level conductors separated by a first wiring level dielectric material; forming a plurality of alternating layers of layer dielectric material and sacrificial material over the first wiring level; and forming a plurality of interconnect openings and a plurality of gap openings in the alternating layers of layer dielectric material and sacrificial material. The interconnect openings are formed over the first wiring level conductors. The method further includes forming (i) metallic conductors comprising second wiring level conductors, and (ii) interconnects, at the interconnect openings; and removing the layers of the sacrificial material through the gap openings.

摘要翻译： 一种制造微电子电路的方法包括以下步骤：提供包括由第一布线层介电材料隔开的第一布线层导体的第一布线层; 在所述第一布线层上形成层状介电材料和牺牲材料的多个交替层; 以及在层介电材料和牺牲材料的交替层中形成多个互连开口和多个间隙开口。 互连开口形成在第一布线层导体上。 该方法还包括形成（i）包括第二布线层导体的金属导体，和（ii）互连开口处的互连; 并且通过间隙开口去除牺牲材料的层。

公开(公告)号：US07409019B2

公开(公告)日：2008-08-05

申请号：US10711713

申请日：2004-09-30

申请人： Louis C. Hsu ,  Brian L. Ji ,  James S. Mason ,  Karl D. Selander ,  Michael A. Sorna ,  Steven J. Zier

发明人： Louis C. Hsu ,  Brian L. Ji ,  James S. Mason ,  Karl D. Selander ,  Michael A. Sorna ,  Steven J. Zier

IPC分类号： H04L27/08

CPC分类号： H04L25/085 ,  H03F1/3241 ,  H04L25/0278 ,  H04L25/0292 ,  H04L25/03343 ,  H04L25/061 ,  H04L2025/0349 ,  H04L2025/03566 ,  H04L2025/03617 ,  H04L2025/03808

摘要： A data receiver is provided which is operable to receive a signal controllably pre-distorted and transmitted by a transmitter, to generate information for adjusting the pre-distortion applied to the signal transmitted by the transmitter, and to transmit the information to the transmitter. The receiver is further operable to perform adaptive equalization to receive the signal transmitted by the transmitter.

摘要翻译： 提供了一种数据接收器，其可操作以接收由发射机可控地预失真和发送的信号，以产生用于调整应用于由发射机发送的信号的预失真的信息，并将该信息发送到发射机。 接收机还可操作以执行自适应均衡以接收由发射机发送的信号。

公开(公告)号：US20080132058A1

公开(公告)日：2008-06-05

申请号：US11535833

申请日：2006-09-27

申请人： Chih-Chao Yang ,  Lawrence A. Clevenger ,  James J. Demarest ,  Louis C. Hsu ,  Carl Radens

发明人： Chih-Chao Yang ,  Lawrence A. Clevenger ,  James J. Demarest ,  Louis C. Hsu ,  Carl Radens

IPC分类号： H01L21/768

CPC分类号： H01L23/5228 ,  H01L23/5256 ,  H01L23/5329 ,  H01L28/20 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides an electrical programmable metal resistor and a method of fabricating the same in which electromigration stress is used to create voids in the structure that increase the electrical resistance of the resistor. Specifically, a semiconductor structure is provided that includes an interconnect structure comprising at least one dielectric layer, wherein said at least one dielectric layer comprises at least two conductive regions and an overlying interconnect region embedded therein, said at least two conductive regions are in contact with said overlying interconnect region by at least two contacts and at least said interconnect region is separated from said at least one dielectric layer by a diffusion barrier, wherein voids are present in at least the interconnect region which increase the electrical resistance of the interconnect region.

摘要翻译： 本发明提供一种电可编程金属电阻器及其制造方法，其中电迁移应力用于在结构中产生增加电阻器的电阻的空隙。 具体而言，提供一种半导体结构，其包括包括至少一个电介质层的互连结构，其中所述至少一个电介质层包括至少两个导电区域和嵌入其中的覆盖互连区域，所述至少两个导电区域与 所述覆盖互连区域由至少两个触点和至少所述互连区域通过扩散阻挡层与所述至少一个介电层分离，其中空隙存在于至少互连区域中，这增加了互连区域的电阻。

公开(公告)号：US07348870B2

公开(公告)日：2008-03-25

申请号：US10905449

申请日：2005-01-05

申请人： Louis C. Hsu ,  Timothy Dalton ,  Lawrence Clevenger ,  Carl Radens ,  Kwong Hon Wong ,  Chih-Chao Yang

发明人： Louis C. Hsu ,  Timothy Dalton ,  Lawrence Clevenger ,  Carl Radens ,  Kwong Hon Wong ,  Chih-Chao Yang

IPC分类号： H01H51/22

CPC分类号： H01H59/0009 ,  H01H1/20 ,  H01H2001/0084 ,  H01H2001/0089 ,  Y10T29/49105 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49208

摘要： A hinge type MEMS switch that is fully integratable within a semiconductor fabrication process, such as a CMOS, is described. The MEMS switch constructed on a substrate consists of two posts, each end thereof terminating in a cap; a movable conductive plate having a surface terminating in a ring in each of two opposing edges, the rings being loosely connected to guiding posts; an upper and lower electrode pairs; and upper and lower interconnect wiring lines connected and disconnected by the movable conductive plate. When in the energized state, a low voltage level is applied to the upper electrode pair, while the lower electrode pair is grounded. The conductive plate moves up, shorting two upper interconnect wirings lines. Conversely, the conductive plate moves down when the voltage is applied to the lower electrode pair, while the upper electrode pair is grounded, shorting the two lower interconnect wiring lines and opening the upper wiring lines. The MEMS switch thus formed generates an even force that provides the conductive plate with a translational movement, with the displacement being guided by the two vertical posts.

摘要翻译： 描述了在诸如CMOS之类的半导体制造工艺中可完全集成的铰链式MEMS开关。 构造在基板上的MEMS开关由两个柱构成，每个端部终止于盖; 可移动导电板，其表面终止于两个相对边缘中的每一个中的环中，所述环松动地连接到引导柱; 上下电极对; 以及由可动导电板连接和断开的上下互连布线。 当处于通电状态时，低电压电平施加到上电极对，而下电极对接地。 导电板向上移动，使两条上部互连线路短路。 相反，当电压施加到下电极对时，导电板向下移动，而上电极对接地，使两个下互连布线短路并打开上布线。 由此形成的MEMS开关产生均匀的力，其为导电板提供平移运动，位移由两个垂直柱引导。

公开(公告)号：US20080037690A1

公开(公告)日：2008-02-14

申请号：US11737319

申请日：2007-04-19

申请人： James S. Mason ,  Louis C. Hsu ,  Phil J. Murfet ,  Gareth J. Nicholls

发明人： James S. Mason ,  Louis C. Hsu ,  Phil J. Murfet ,  Gareth J. Nicholls

IPC分类号： H04L27/08 ,  H03K9/00

CPC分类号： H04L25/0292 ,  H04L25/063

摘要： A receiver for a data communications system comprises: a data path for receiving a data signal from a data channel, the data path comprising an automatic gain control (AGC) loop; and, a signal detector for generating a data valid signal indicative of the validity of the data signal in response to detection of the data signal on the channel exceeding a threshold and in dependence upon gain information from the AGC loop in the data path.

摘要翻译： 用于数据通信系统的接收机包括：用于从数据信道接收数据信号的数据路径，所述数据路径包括自动增益控制（AGC）环路; 以及信号检测器，用于响应于在信道上的数据信号的检测超过阈值并且根据来自数据路径中的AGC循环的增益信息，产生指示数据信号的有效性的数据有效信号。

公开(公告)号：US07282802B2

公开(公告)日：2007-10-16

申请号：US10964882

申请日：2004-10-14

申请人： Lawrence A. Clevenger ,  Timothy Joseph Dalton ,  Louis C. Hsu ,  Conal Eugene Murray ,  Carl Radens ,  Kwong-Hon Wong ,  Chih-Chao Yang

发明人： Lawrence A. Clevenger ,  Timothy Joseph Dalton ,  Louis C. Hsu ,  Conal Eugene Murray ,  Carl Radens ,  Kwong-Hon Wong ,  Chih-Chao Yang

IPC分类号： H01L23/52

CPC分类号： H01L21/76802 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76847 ,  H01L21/76865 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： The present invention provides an interconnect structure that can be made in the BEOL which exhibits good mechanical contact during normal chip operations and does not fail during various reliability tests as compared with the conventional interconnect structures described above. The inventive interconnect structure has a kinked interface at the bottom of a via that is located within an interlayer dielectric layer. Specifically, the inventive interconnect structure includes a first dielectric layer having at least one metallic interconnect embedded within a surface thereof; a second dielectric layer located atop the first dielectric layer, wherein said second dielectric layer has at least one aperture having an upper line region and a lower via region, wherein the lower via region includes a kinked interface; at least one pair of liners located on at least vertical walls of the at least one aperture; and a conductive material filling the at least one aperture.

摘要翻译： 本发明提供一种可以在BEOL中制造的互连结构，其在正常的芯片操作期间表现出良好的机械接触，并且在与上述的常规互连结构相比在各种可靠性测试期间不会失败。 本发明的互连结构在通孔的底部具有位于层间介质层内的扭结界面。 具体地，本发明的互连结构包括：第一介电层，其具有嵌入在其表面内的至少一个金属互连; 位于所述第一介电层顶部的第二电介质层，其中所述第二电介质层具有至少一个具有上线区域和下通孔区域的孔，其中所述下通孔区域包括扭结界面; 位于所述至少一个孔的至少垂直壁上的至少一对衬垫; 以及填充所述至少一个孔的导电材料。