公开(公告)号：US20060285228A1

公开(公告)日：2006-12-21

申请号：US11423989

申请日：2006-06-14

申请人： Motonori ISHII ,  Kazutoshi ONOZAWA ,  Toshinobu MATSUNO ,  Takanori YOGO ,  Kimiaki TOSHIKIYO

发明人： Motonori ISHII ,  Kazutoshi ONOZAWA ,  Toshinobu MATSUNO ,  Takanori YOGO ,  Kimiaki TOSHIKIYO

IPC分类号： G02B3/08

CPC分类号： G02B5/1847 ,  G02B5/1876 ,  G02B5/1885 ,  G02B27/4205

摘要： The present invention provides a method of manufacturing a lens, in which the method includes exposing a photoresist to light using a phase shift mask. Here, the phase shift mask includes layout portions respectively corresponding to pixels and lens, in which each of the layout portions has: a light-blocking portion which has a shape of a substantially circle or a substantially concentric zone; a light-transmitting portion which has a shape of a substantially circle or a substantially concentric zone; a phase shift portion which has a shape of a substantially circle or a substantially concentric zone; and a light-blocking frame. Furthermore, the light-transmitting portion, the light-blocking portion and the phase shift portion are arranged alternately so as to form concentric circles, and the light-blocking frame corresponds to a whole or a part of a perimeter of the lens.

摘要翻译： 本发明提供一种制造透镜的方法，其中所述方法包括使用相移掩模将光致抗蚀剂曝光。 这里，相移掩模包括分别对应于像素和透镜的布局部分，其中每个布局部分具有：具有基本圆形或基本同心的形状的遮光部分; 具有基本上圆形或大体上同心的形状的透光部分; 相移部，其具有大致圆形或大致同心的区域的形状; 和遮光框架。 此外，光透射部分，遮光部分和相移部分交替地布置以形成同心圆，并且遮光框对应于透镜的周边的全部或一部分。

公开(公告)号：US6153499A

公开(公告)日：2000-11-28

申请号：US289946

申请日：1999-04-13

申请人： Yoshiharu Anda ,  Toshinobu Matsuno ,  Katsunori Nishii ,  Kaoru Inoue ,  Manabu Yanagihara ,  Mitsuru Tanabe

发明人： Yoshiharu Anda ,  Toshinobu Matsuno ,  Katsunori Nishii ,  Kaoru Inoue ,  Manabu Yanagihara ,  Mitsuru Tanabe

IPC分类号： H01L21/28 ,  H01L21/027 ,  H01L21/285 ,  H01L21/338 ,  H01L21/768 ,  H01L29/812 ,  H01L21/44

CPC分类号： H01L21/28581 ,  H01L21/0271 ,  H01L21/0277 ,  H01L21/76816 ,  Y10S438/949

摘要： A first resist film for EB exposure, a buffer film, and a second resist film for i-line exposure are applied sequentially onto a substrate. Thereafter, the second resist film and the buffer film are subjected to patterning for forming a first opening. Then, dry etching is performed with respect to the first resist film masked with the second resist film to transfer the pattern of the second resist film to the first resist film and thereby form a second opening in the first resist film. Subsequently, a third resist film of chemically amplified type is applied to the entire surface of the first resist film to form a mixing layer in conjunction with the first resist film. As a result, the wall faces of the second opening are covered with the mixing layer and the width of the second opening is thereby reduced.

摘要翻译： 用于EB曝光的第一抗蚀剂膜，缓冲膜和用于i线曝光的第二抗蚀剂膜顺序地施加到基板上。 此后，对第二抗蚀剂膜和缓冲膜进行用于形成第一开口的图案化。 然后，相对于用第二抗蚀剂膜掩蔽的第一抗蚀剂膜进行干蚀刻，将第二抗蚀剂膜的图案转印到第一抗蚀剂膜上，从而在第一抗蚀剂膜中形成第二开口。 随后，将化学放大型的第三抗蚀剂膜施加到第一抗蚀剂膜的整个表面上以与第一抗蚀剂膜结合形成混合层。 结果，第二开口的壁面被混合层覆盖，从而减小了第二开口的宽度。

公开(公告)号：US06051454A

公开(公告)日：2000-04-18

申请号：US151357

申请日：1998-09-10

申请人： Yoshiharu Anda ,  Toshinobu Matsuno ,  Manabu Yanagihara ,  Mitsuru Tanabe ,  Toshiaki Matsui ,  Nobumitsu Hirose

发明人： Yoshiharu Anda ,  Toshinobu Matsuno ,  Manabu Yanagihara ,  Mitsuru Tanabe ,  Toshiaki Matsui ,  Nobumitsu Hirose

IPC分类号： H01L21/285 ,  H01L21/335 ,  H01L21/338

CPC分类号： H01L29/66462 ,  H01L21/28587 ,  Y10S438/95

摘要： A lower resist film, which is made of PMMA for EB exposure and has a thickness of about 200 nm, is applied onto a substrate, and then an upper resist film to be exposed to i-rays is applied on the lower resist film. Thereafter, a mixed layer, in which the upper and lower resist films are mixed, is formed in the interface between the upper and lower resist films. Next, the upper resist film, except for the head-forming region thereof, is exposed to i-rays and developed, thereby forming an upper-layer opening. And then the mixed layer and a leg-forming region of the lower resist film are exposed to EB and developed, thereby forming a lower-layer opening having an upper part like a taper progressively expanding upward.

摘要翻译： 将用于EB曝光的PMMA制成并具有约200nm厚度的较低抗蚀剂膜施加到基板上，然后在下抗蚀剂膜上施加暴露于i射线的上抗蚀剂膜。 此后，在上下抗蚀剂膜之间的界面中形成混合有上下抗蚀剂膜的混合层。 接下来，将除了其头部形成区域之外的上抗蚀剂膜暴露于i射线并显影，从而形成上层开口。 然后将下层抗蚀剂膜的混合层和腿部形成区域暴露于EB并显影，从而形成具有逐渐向上扩展的锥形的上部的下层开口。

公开(公告)号：US5486705A

公开(公告)日：1996-01-23

申请号：US257125

申请日：1994-06-09

申请人： Kaoru Inoue ,  Toshinobu Matsuno ,  Tadayosi Nakatuka ,  Hiroyuki Masato

发明人： Kaoru Inoue ,  Toshinobu Matsuno ,  Tadayosi Nakatuka ,  Hiroyuki Masato

IPC分类号： H01L29/205 ,  H01L29/778 ,  H01L29/06

CPC分类号： H01L29/7785

摘要： A heterojunction FET comprises: a semi-insulation GaAs substrate; and a heterojunction structure, formed on the substrate, having: an active layer including: an undoped InGaAs layer including 10-254 of InAs composition; an undoped GaAs layer formed on the undoped InGaAs layer on the opposite side of the substrate; first and second AlGaAs layers doped with first and second dopants respectively, sandwiching the active layer, the second AlGaAs layer being provided between said active layer and the substrate; and source, gate, and drain electrodes on the heterojunction structure. A first density of the first dopant may be lower than a second density of the second dopant. The first and second dopant may be p or n type. The AlAs composition of the first AlGaAs layer may be lower than that of the second AlGaAs layer. First and second undoped AlGaAs layers sandwiched between the active layer and the first AlGaAs layer and sandwiched between the active layer and the second AlGaAs layer respectively may be provided. The second undoped AlGaAs layer is formed on the side of the substrate. The first and second undoped AlGaAs layers have first and second thicknesses respectively, the first thickness being larger than the second thickness.

摘要翻译： 异质结FET包括：半绝缘GaAs衬底; 以及形成在所述基板上的异质结结构，具有：有源层，包括：包含InAs组成的10-254的未掺杂的InGaAs层; 在衬底的相对侧上的未掺杂的InGaAs层上形成未掺杂的GaAs层; 分别掺杂有第一和第二掺杂剂的第一和第二AlGaAs层，夹持有源层，第二AlGaAs层设置在所述有源层和衬底之间; 以及异质结结构上的源极，栅极和漏极。 第一掺杂剂的第一密度可以低于第二掺杂剂的第二密度。 第一和第二掺杂剂可以是p型或n型。 第一AlGaAs层的AlAs组成可以低于第二AlGaAs层的AlAs组成。 可以提供夹在有源层和第一AlGaAs层之间并分别夹在有源层和第二AlGaAs层之间的第一和第二未掺杂的AlGaAs层。 第二未掺杂的AlGaAs层形成在衬底的侧面上。 第一和第二未掺杂的AlGaAs层分别具有第一厚度和第二厚度，第一厚度大于第二厚度。

公开(公告)号：US5289020A

公开(公告)日：1994-02-22

申请号：US913316

申请日：1992-07-15

申请人： Takashi Hirose ,  Toshinobu Matsuno ,  Kaoru Inoue

发明人： Takashi Hirose ,  Toshinobu Matsuno ,  Kaoru Inoue

IPC分类号： H01L29/205 ,  H01L21/331 ,  H01L29/73 ,  H01L29/737 ,  H01L31/072 ,  H01L27/102 ,  H01L31/109

CPC分类号： H01L29/66318 ,  H01L29/7371

摘要： A heterojunction bipolar transistor includes a first emitter region. A second emitter region extends on the first emitter region and is connected to the first emitter region via a junction. The second emitter region has a forbidden band gap wider than a forbidden band gap of the first emitter region. At the junction, the second emitter region has a carrier energy level substantially equal to a carrier energy level of the first emitter region. An intrinsic base region extends on the second emitter region and has a forbidden band gap narrower than the forbidden band gap of the second emitter region. A collector region extends on the intrinsic base region. An extrinsic base region extends outward of the intrinsic base region and contacts the intrinsic base region and the second emitter region. The extrinsic base region separates from the first emitter region. A portion of the extrinsic base region which adjoins the second emitter region has a forbidden band gap substantially equal to the forbidden band gap of the second emitter region. A high-resistivity region extends underneath the extrinsic base region.

摘要翻译： 异质结双极晶体管包括第一发射极区域。 第二发射极区域在第一发射极区域上延伸并且经由接头连接到第一发射极区域。 第二发射极区域具有比第一发射极区域的禁带宽宽的禁带宽。 在结处，第二发射极区域具有基本上等于第一发射极区域的载流子能级的载流子能级。 本征基极区域延伸在第二发射极区域上，并且具有比第二发射极区域的禁带宽窄的禁带宽。 集电极区域在内部基极区域上延伸。 外部基极区域延伸到本征基极区域的外部并与本征基极区域和第二发射极区域接触。 外部基极区域与第一发射极区域分离。 邻接第二发射极区域的外部基极区域的一部分具有基本上等于第二发射极区域的禁带宽的禁带宽度。 高电阻率区域在外部基极区域的下方延伸。

公开(公告)号：US08354693B2

公开(公告)日：2013-01-15

申请号：US12035340

申请日：2008-02-21

申请人： Mitsuyoshi Mori ,  Toru Okino ,  Daisuke Ueda ,  Toshinobu Matsuno

发明人： Mitsuyoshi Mori ,  Toru Okino ,  Daisuke Ueda ,  Toshinobu Matsuno

IPC分类号： H01L31/0336

CPC分类号： H01L27/14689 ,  H01L27/14632 ,  H01L27/14645 ,  H01L27/14687

摘要： A solid state imaging device includes a pixel having a photoelectric conversion element formed on a semiconductor substrate. The photoelectric conversion element includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer and forming a junction therebetween; a third semiconductor layer formed on the second semiconductor layer and having a smaller band gap energy than the second semiconductor layer, the third semiconductor layer being made of a single-crystal semiconductor and containing an impurity; and a fourth semiconductor layer of the first conductivity type covering a side surface and an upper surface of the third semiconductor layer. Provision of the fourth semiconductor layer can reduce a current flowing in dark conditions.

摘要翻译： 固态成像装置包括具有形成在半导体基板上的光电转换元件的像素。 光电转换元件包括：第一导电类型的第一半导体层; 第二导电类型的第二半导体层，形成在第一半导体层上并在其间形成接合部; 形成在所述第二半导体层上并且具有比所述第二半导体层更小的带隙能量的第三半导体层，所述第三半导体层由单晶半导体制成并且含有杂质; 以及覆盖第三半导体层的侧表面和上表面的第一导电类型的第四半导体层。 提供第四半导体层可以减少在黑暗条件下流动的电流。

公开(公告)号：US07663084B2

公开(公告)日：2010-02-16

申请号：US12189971

申请日：2008-08-12

申请人： Kimiaki Toshikiyo ,  Takanori Yogo ,  Motonori Ishii ,  Toshinobu Matsuno ,  Kazutoshi Onozawa

发明人： Kimiaki Toshikiyo ,  Takanori Yogo ,  Motonori Ishii ,  Toshinobu Matsuno ,  Kazutoshi Onozawa

IPC分类号： H01L27/00

CPC分类号： H01L27/14627 ,  H01L27/14685

摘要： A solid-state imaging apparatus includes a plurality of unit pixels with associated microlenses arranged in a two-dimensional array. Each microlens includes a distributed index lens with a modulated effective refractive index distribution obtained by including a combination of a plurality of patterns having a concentric structure, the plurality of patterns being divided into line widths equal to or shorter than a wavelength of an incident light. At least one of the plurality of patterns includes a lower light-transmitting film having the concentric structure and a first line width and a first film thickness, and an upper light-transmitting film having the concentric structure configured on the lower light-transmitting film having a second line width and a second film thickness. The distributed index lens has a structure in which a refractive index material is dense at a center and becomes sparse gradually toward an outer side in the concentric structure.

摘要翻译： 固态成像装置包括具有以二维阵列排列的相关联的微透镜的多个单位像素。 每个微透镜包括具有调制的有效折射率分布的分布式折射率透镜，通过包括具有同心结构的多个图案的组合而获得，所述多个图案被划分成等于或短于入射光的波长的线宽。 多个图案中的至少一个图案包括具有同心结构且第一线宽度和第一膜厚度的下部透光膜，以及具有同心结构的上部透光膜，其在下部透光膜上具有 第二线宽度和第二膜厚度。 分布式折射率透镜具有其中折射率材料在中心处致密并且在同心结构中朝向外侧逐渐变稀的结构。

公开(公告)号：US07307292B2

公开(公告)日：2007-12-11

申请号：US10456901

申请日：2003-06-09

申请人： Katsunori Nishii ,  Kaoru Inoue ,  Toshinobu Matsuno ,  Yoshito Ikeda ,  Hiroyuki Masato

发明人： Katsunori Nishii ,  Kaoru Inoue ,  Toshinobu Matsuno ,  Yoshito Ikeda ,  Hiroyuki Masato

IPC分类号： H01L31/0336

CPC分类号： H01L29/66462 ,  H01L21/28264 ,  H01L29/2003 ,  H01L29/7783

摘要： An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.

摘要翻译： 绝缘栅半导体器件具有形成在衬底上的第一氮化物半导体层和通过氧化形成在第一氮化物半导体层上的第二氮化物半导体层而获得的绝缘氧化层。 在绝缘氧化层上形成栅电极。

公开(公告)号：US20060284052A1

公开(公告)日：2006-12-21

申请号：US11423776

申请日：2006-06-13

申请人： Kimiaki TOSHIKIYO ,  Takanori YOGO ,  Motonori ISHII ,  Toshinobu MATSUNO ,  Kazutoshi ONOZAWA

发明人： Kimiaki TOSHIKIYO ,  Takanori YOGO ,  Motonori ISHII ,  Toshinobu MATSUNO ,  Kazutoshi ONOZAWA

IPC分类号： H01L27/00

CPC分类号： H01L27/14627 ,  H01L27/14685

摘要： The present invention provides a solid-state imaging apparatus and the like which is able to support an optical system whose incident angle is wide. Each pixel is 2.25 μm square in size, and includes a distributed index lens 1, a color filter (for example, for green) 2, an Al interconnections 3, a signal transmitting unit 4, a planarized layer 5, a light-receiving device (Si photodiodes) 6, and an Si substrate 7. The two-stage concentric circle structure of the distributed index lens is formed by SiO2 (n=2) with the film thickness 1.2 μm (“grey color”), the film thickness 0.8 μm (“dots pattern”) and the film thickness of 0 μm (“without pattern: white color”), and the medium surrounding the distributed index lens 1 is air (n=1).

摘要翻译： 本发明提供能够支持入射角较宽的光学系统的固体摄像装置等。 每个像素的尺寸为2.25mum正方形，并且包括分布式折射率透镜1，滤色器（例如，绿色）2，Al互连3，信号发送单元4，平坦化层5，光接收装置 （Si光电二极管）6和Si衬底7.分布式折射率透镜的两级同心圆结构由SiO 2（n = 2）形成，膜厚为1.2μm（“灰” 颜色“），膜厚0.8μm（”点图案“）和膜厚度为0μm（”无图案：白色“），分布折射率透镜1周围的介质为空气（n = 1）。

公开(公告)号：US06323538B1

公开(公告)日：2001-11-27

申请号：US09480942

申请日：2000-01-11

申请人： Takeshi Fukuda ,  Daisuke Ueda ,  Kaoru Inoue ,  Katsunori Nishii ,  Toshinobu Matsuno

发明人： Takeshi Fukuda ,  Daisuke Ueda ,  Kaoru Inoue ,  Katsunori Nishii ,  Toshinobu Matsuno

IPC分类号： H01L27082

CPC分类号： H01L29/66265 ,  H01L29/7317

摘要： An n-type first single crystal silicon layer is provided as collector region over a silicon substrate with a first insulating film interposed therebetween. A p-type first polysilicon layer is provided as an extension of a base region over the first single crystal silicon layer with a second insulating film interposed therebetween. A p-type second single crystal silicon layer is provided as intrinsic base region on a side of the first single crystal silicon layer, second insulating film and first polysilicon layer. An n-type third single crystal silicon layer is provided as emitter region on a side of the second single crystal silicon layer. And an n-type third polysilicon layer is provided on the first insulating film as extension of an emitter region and is connected to a side of the third single crystal silicon layer.

摘要翻译： 在硅衬底上设置n型第一单晶硅层作为集电极区域，其间插入有第一绝缘膜。 提供p型第一多晶硅层作为第一单晶硅层上的基极区域的延伸，其间插入第二绝缘膜。 在第一单晶硅层，第二绝缘膜和第一多晶硅层的一侧设置p型第二单晶硅层作为本征基极区域。 在第二单晶硅层的一侧设置n型第三单晶硅层作为发射极区域。 并且在第一绝缘膜上设置n型第三多晶硅层作为发射极区域的延伸并且连接到第三单晶硅层的一侧。