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30 条记录 (耗时 0.014 秒)

    Architecture for generating adaptive arbitrary waveforms
    11.
    发明授权
    Architecture for generating adaptive arbitrary waveforms 失效
    用于生成自适应任意波形的体系结构

    公开(公告)号：US07072781B1

    公开(公告)日：2006-07-04

    申请号：US10885284

    申请日：2004-07-06

    申请人： Eugen Gershon ,  David Gaun ,  Colin S. Bill ,  Tzu-Ning Fang

    发明人： Eugen Gershon ,  David Gaun ,  Colin S. Bill ,  Tzu-Ning Fang

    IPC分类号： G01R31/36

    CPC分类号： G01R31/31924 ,  G01R31/3167 ,  G01R31/31908 ,  G11C29/56 ,  G11C29/56004

    摘要： A test system having a feedback loop that facilitates adjusting an output test waveform to a DUT/CUT (Device Under Test/Circuit Under Test) on-the-fly according to changing DUT/CUT parameters. The system includes a tester having an arbitrary waveform generator (AWG) and a data acquisition system (DAS) that monitors the status of the DUT/CUT. The AWG and DAS connect to the DUT/CUT through a feedback loop where the AWG outputs the test waveform to the DUT/CUT, the DAS monitors the DUT/CUT parameters, and the DAS analyzes and communicates changes to the AWG to effect changes in the output waveform, when desired. The AWG builds the output waveform in small slices (or segments) that are assembled together through a process of selection and calibration. The feedback architecture facilitates a number of changes in the output waveform, including a change in the original order of the preassembled slices, and changes in the magnitude/shape of the output waveform.

    摘要翻译： 具有反馈回路的测试系统，其根据改变的DUT / CUT参数，有助于将DUT / CUT（被测设备/待测电路）的输出测试波形实时调整。 该系统包括具有任意波形发生器（AWG）的测试器和监视DUT / CUT的状态的数据采集系统（DAS）。 AWG和DAS通过反馈回路连接到DUT / CUT，AWG将测试波形输出到DUT / CUT，DAS监视DUT / CUT参数，DAS分析并传送AWG的变化，以实现更改 输出波形。 AWG通过选择和校准过程组装在一起的小片（或片段）中构建输出波形。 反馈架构有助于输出波形的一些变化，包括预先组装的切片的原始顺序的改变以及输出波形的幅度/形状的变化。

    Method of providing an erase activation energy of a memory device
    12.
    发明授权
    Method of providing an erase activation energy of a memory device 有权
    提供存储器件的擦除激活能的方法

    公开(公告)号：US08098521B2

    公开(公告)日：2012-01-17

    申请号：US11095849

    申请日：2005-03-31

    申请人： Michael A. VanBuskirk ,  Colin S. Bill ,  Zhida Lan ,  Tzu-Ning Fang

    发明人： Michael A. VanBuskirk ,  Colin S. Bill ,  Zhida Lan ,  Tzu-Ning Fang

    IPC分类号： G11C11/34

    CPC分类号： G11C13/0014 ,  B82Y10/00

    摘要： A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.

    摘要翻译： 一次写入多次存储器件由第一和第二电极，第一和第二电极之间的无源层以及第一和第二电极之间的有源层组成。 通过从被动层提供带电物质到活性层来对存储器件进行编程。 存储器件可以被编程为使编程的存储器件具有第一擦除激活能量。 本方法为编程的存储器件提供大于第一擦除激活能量的第二擦除激活能量。

    Metal-insulator-metal (MIM) device and method of formation thereof
    13.
    发明申请
    Metal-insulator-metal (MIM) device and method of formation thereof 有权
    金属绝缘体金属（MIM）器件及其形成方法

    公开(公告)号：US20090109598A1

    公开(公告)日：2009-04-30

    申请号：US11980213

    申请日：2007-10-30

    申请人： Steven Avanzino ,  Tzu-Ning Fang ,  Swaroop Kaza ,  Dongxiang Liao ,  Wai Lo ,  Christie Marrian ,  Sameer Haddad

    发明人： Steven Avanzino ,  Tzu-Ning Fang ,  Swaroop Kaza ,  Dongxiang Liao ,  Wai Lo ,  Christie Marrian ,  Sameer Haddad

    IPC分类号： H01G4/002 ,  H01G7/00

    CPC分类号： H01L28/40 ,  H01G4/10 ,  H01G13/00 ,  H01L27/101 ,  H01L28/57 ,  Y10T29/435

    摘要： In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer. In alternative embodiments, the initially provided oxide layer may be eliminated, and spacers of insulating material may be provided in the opening.

    摘要翻译： 在制造金属 - 绝缘体 - 金属（MIM）器件的方法中，首先提供第一电极。 在第一电极上设置氧化物层，在氧化物层上设置保护层。 提供通过保护层的开口以暴露氧化物层的一部分，氧化层的暴露部分下方的第一电极的一部分被氧化。 提供与氧化物层的暴露部分接触的第二电极。 在替代实施例中，可以消除初始提供的氧化物层，并且可以在开口中提供绝缘材料的间隔物。

    METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMORY DEVICE
    16.
    发明申请
    METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMORY DEVICE 审中-公开
    提供存储器件的擦除活化能的方法

    公开(公告)号：US20120092924A1

    公开(公告)日：2012-04-19

    申请号：US13324310

    申请日：2011-12-13

    申请人： Michael A. VanBuskirk ,  Colin S. Bill ,  Zhida Lan ,  Tzu-Ning Fang

    发明人： Michael A. VanBuskirk ,  Colin S. Bill ,  Zhida Lan ,  Tzu-Ning Fang

    IPC分类号： G11C11/34 ,  G11C7/00

    CPC分类号： G11C13/0014 ,  B82Y10/00

    摘要： A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.

    摘要翻译： 一次写入多次存储器件由第一和第二电极，第一和第二电极之间的无源层以及第一和第二电极之间的有源层组成。 通过从被动层提供带电物质到活性层来对存储器件进行编程。 存储器件可以被编程为使编程的存储器件具有第一擦除激活能量。 本方法为编程的存储器件提供大于第一擦除激活能量的第二擦除激活能量。

    Using organic semiconductor memory in conjunction with a MEMS actuator for an ultra high density memory
    18.
    发明授权
    Using organic semiconductor memory in conjunction with a MEMS actuator for an ultra high density memory 有权
    将有机半导体存储器与用于超高密度存储器的MEMS致动器结合使用

    公开(公告)号：US07499309B1

    公开(公告)日：2009-03-03

    申请号：US10817186

    申请日：2004-04-02

    申请人： Colin Bill ,  Michael A. VanBuskirk ,  Tzu-Ning Fang

    发明人： Colin Bill ,  Michael A. VanBuskirk ,  Tzu-Ning Fang

    IPC分类号： G11C11/00

    CPC分类号： G11B9/04 ,  B82Y10/00 ,  G11B9/1436 ,  G11B9/149 ,  G11C11/5664 ,  G11C13/00 ,  G11C13/0014 ,  G11C13/0016 ,  G11C23/00

    摘要： A metal sulfide based non-volatile memory device is provided herein. The device is comprised of a substrate, a backplane, a planar memory media including a dense array of metal sulfide based memory cells, and a MEMS probe based actuator. The cells of the memory device are operative to be of two or more states corresponding to various levels of impedance. The MEMS actuator is operable to position micro/nano probes over the appropriate cells to enable reading, writing, and erasing the memory cells by applying a bias voltage.

    摘要翻译： 本文提供了基于金属硫化物的非易失性存储器件。 该器件由衬底，背板，包括基于金属硫化物的存储单元的密集阵列的平面存储介质和基于MEMS探针的致动器组成。 存储器件的单元可操作以对应于各种阻抗级别的两个或多个状态。 MEMS致动器可操作以将微/纳米探针定位在适当的单元上，以通过施加偏置电压来读取，写入和擦除存储器单元。

    Use of periodic refresh in medium retention memory arrays
    19.
    发明授权
    Use of periodic refresh in medium retention memory arrays 有权
    在介质保留存储器阵列中使用定期更新

    公开(公告)号：US07474579B2

    公开(公告)日：2009-01-06

    申请号：US11613832

    申请日：2006-12-20

    申请人： Colin S. Bill ,  Swaroop Kaza ,  Wei Daisy Cai ,  Tzu-Ning Fang ,  David Gaun ,  Eugen Gershon ,  Michael A. Van Buskirk ,  Jean Wu

    发明人： Colin S. Bill ,  Swaroop Kaza ,  Wei Daisy Cai ,  Tzu-Ning Fang ,  David Gaun ,  Eugen Gershon ,  Michael A. Van Buskirk ,  Jean Wu

    IPC分类号： G11C7/00

    CPC分类号： G11C11/406 ,  G11C11/40615 ,  G11C13/0033 ,  G11C13/0069 ,  G11C16/3431

    摘要： Systems and methods are disclosed that facilitate extending data retention time in a data retention device, such as a nanoscale resistive memory cell array, via assessing a resistance level in a tracking element associated with the memory array and refreshing the memory array upon a determination that the resistance of the tracking element has reached or exceeded a predetermined reference threshold resistance value. The tracking element can be a memory cell within the array itself and can have an initial resistance value that is substantially higher than an initial resistance value for a programmed memory cell in the array, such that resistance increase in the tracking cell will cause the tracking cell to reach the threshold value and trigger refresh of the array before data corruption/loss occurs in the core memory cells.

    摘要翻译： 公开了通过评估与存储器阵列相关联的跟踪元件中的电阻水平并在确定存储器阵列的情况下刷新存储器阵列时有助于在诸如纳米级电阻存储器单元阵列之类的数据保持装置中扩展数据保留时间的系统和方法 跟踪元件的电阻已达到或超过预定参考阈值电阻值。 跟踪元件可以是阵列本身内的存储器单元，并且可以具有基本上高于阵列中的编程存储器单元的初始电阻值的初始电阻值，使得跟踪单元中的电阻增加将导致跟踪单元 在核心存储器单元中发生数据损坏/丢失之前达到阈值并触发阵列刷新。

    Write-once read-many times memory
    20.
    发明申请
    Write-once read-many times memory 有权
    一次写入多次内存

    公开(公告)号：US20060221713A1

    公开(公告)日：2006-10-05

    申请号：US11095849

    申请日：2005-03-31

    申请人： Michael VanBuskirk ,  Colin Bill ,  Zhida Lan ,  Tzu-Ning Fang

    发明人： Michael VanBuskirk ,  Colin Bill ,  Zhida Lan ,  Tzu-Ning Fang

    IPC分类号： G11C7/10

    CPC分类号： G11C13/0014 ,  B82Y10/00

    摘要： A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.

    摘要翻译： 一次写入多次存储器件由第一和第二电极，第一和第二电极之间的无源层以及第一和第二电极之间的有源层组成。 通过从被动层提供带电物质到活性层来对存储器件进行编程。 存储器件可以被编程为使编程的存储器件具有第一擦除激活能量。 本方法为编程的存储器件提供大于第一擦除激活能量的第二擦除激活能量。