公开(公告)号：US10083888B2

公开(公告)日：2018-09-25

申请号：US15250713

申请日：2016-08-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Tsung Chiu ,  Meng-Jen Wang ,  Cheng-Hsi Chuang ,  Hui-Ying Hsieh ,  Hui Hua Lee

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/78 ,  H01L23/29 ,  H01L23/14 ,  H01L21/786 ,  H01L23/498 ,  H01L23/13 ,  H01L23/492 ,  H01L23/538 ,  H01L23/495 ,  H01L25/07 ,  H01L21/56

CPC classification number: H01L23/3121 ,  H01L21/561 ,  H01L21/78 ,  H01L21/786 ,  H01L23/13 ,  H01L23/14 ,  H01L23/142 ,  H01L23/29 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/315 ,  H01L23/492 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49575 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/49861 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/24 ,  H01L24/25 ,  H01L24/97 ,  H01L25/074 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24247 ,  H01L2224/2518 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/73267 ,  H01L2224/8385 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/15153 ,  H01L2224/83

Abstract: A semiconductor device package includes a conductive base, and a cavity defined from a first surface of the conductive base, the cavity having a bottom surface and a depth. A semiconductor die is disposed on the bottom surface of the cavity, the semiconductor die having a first surface and a second surface opposite the first surface. The second surface of the semiconductor die is bonded to the bottom surface of the cavity. A distance between the first surface of the semiconductor die and the first surface of the conductive base is about 20% of the depth of the cavity.

公开(公告)号：US12272671B2

公开(公告)日：2025-04-08

申请号：US18212158

申请日：2023-06-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chih-Ming Hung ,  Meng-Jen Wang ,  Tsung-Yueh Tsai ,  Jen-Kai Ou

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/544 ,  H01L27/146 ,  G06V40/13

Abstract: A semiconductor device includes: a substrate having a first surface and a second surface opposite to the first surface; an electronic component disposed on the first surface of the substrate; a sensor disposed adjacent to the second surface of the substrate; an electrical contact disposed on the first surface of the substrate; and a package body exposing a portion of the electrical contact.

公开(公告)号：US12068259B2

公开(公告)日：2024-08-20

申请号：US18121568

申请日：2023-03-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei Da Lin ,  Meng-Jen Wang ,  Hung Chen Kuo ,  Wen Jin Huang

IPC: H01L23/552 ,  H01L21/3213 ,  H01L21/56 ,  H01L23/04 ,  H01L23/31

CPC classification number: H01L23/552 ,  H01L21/32131 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L23/04 ,  H01L23/3114

Abstract: A semiconductor device package includes a substrate having a surface, a conductive element disposed on the surface of the substrate, and an encapsulant disposed on the surface of the substrate and covering the conductive element. The conductive element has an upper surface facing away from the substrate and exposed from the encapsulant. Further, a roughness of the upper surface of the conductive element is greater than a roughness of a side surface of the conductive element.

公开(公告)号：US12009313B2

公开(公告)日：2024-06-11

申请号：US17492493

申请日：2021-10-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Meng-Jen Wang ,  Chien-Yuan Tseng ,  Hung Chen Kuo ,  Ying-Hao Wei ,  Chia-Feng Hsu ,  Yuan-Long Chiao

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538

CPC classification number: H01L23/552 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/5389

Abstract: A selective EMI shielding structure for a semiconductor package and a method of fabrication thereof is disclosed. The semiconductor package, comprising: a substrate having a first face; at least one first electronic component mounted adjacent to a first region of the first face; a least one second electronic component mounted adjacent to a second region of the first face; and an encapsulant disposed over the first and the second electronic components, wherein the encapsulant covers directly over the first electronic component, and wherein the encapsulant covers the second electronic component through a layer of conductive material.

公开(公告)号：US11605598B2

公开(公告)日：2023-03-14

申请号：US16852256

申请日：2020-04-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei Da Lin ,  Meng-Jen Wang ,  Hung Chen Kuo ,  Wen Jin Huang

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/31 ,  H01L23/04 ,  H01L21/3213

Abstract: A semiconductor device package includes a substrate having a surface, a conductive element disposed on the surface of the substrate, and an encapsulant disposed on the surface of the substrate and covering the conductive element. The conductive element has an upper surface facing away from the substrate and exposed from the encapsulant. Further, a roughness of the upper surface of the conductive element is greater than a roughness of a side surface of the conductive element.

公开(公告)号：US20200251449A1

公开(公告)日：2020-08-06

申请号：US16779249

申请日：2020-01-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shang-Ruei Wu ,  Chien-Yuan Tseng ,  Meng-Jen Wang ,  Chen-Tsung Chang ,  Chih-Fang Wang ,  Cheng-Han Li ,  Chien-Hao Chen ,  An-Chi Tsao ,  Per-Ju Chao

IPC: H01L25/065 ,  H01L23/31 ,  H01L21/768 ,  H01L21/02

Abstract: A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the firs surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed from the first package body.

公开(公告)号：US20140252547A1

公开(公告)日：2014-09-11

申请号：US13790638

申请日：2013-03-08

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, Inc.

Inventor： Chien-Hua Chen ,  Meng-Jen Wang ,  Teck-Chong Lee ,  Pao-Nan Lee

IPC: H01L49/02

CPC classification number: H01L28/40 ,  H01L27/0805 ,  H01L27/12 ,  H01L2224/14 ,  H01L2224/16225 ,  H01L2224/17 ,  H01L2224/8112 ,  H01L2924/15311

Abstract: The present invention relates to a semiconductor device and a process for fabricating the same. In one embodiment, the semiconductor device includes a substrate and a plurality of integrated passive devices. The integrated passive devices are disposed on the substrate and include at least two capacitors which have different capacitance values.

Abstract translation: 半导体器件及其制造方法技术领域本发明涉及半导体器件及其制造方法。 在一个实施例中，半导体器件包括衬底和多个集成无源器件。 集成无源器件设置在衬底上并且包括具有不同电容值的至少两个电容器。