公开(公告)号：US11094535B2

公开(公告)日：2021-08-17

申请号：US15892728

申请日：2018-02-09

Applicant: ASM IP HOLDING B.V.

Inventor： Eva E. Tois ,  Suvi P. Haukka ,  Raija H. Matero ,  Elina Färm ,  Delphine Longrie ,  Hidemi Suemori ,  Jan Willem Maes ,  Marko Tuominen ,  Shaoren Deng ,  Ivo Johannes Raaijmakers ,  Andrea Illiberi

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/56 ,  H01L21/67 ,  H01L21/768 ,  H01L23/31 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L21/32 ,  H01L21/027 ,  H01L21/321 ,  H01L21/3105

Abstract: Methods for selective deposition, and structures thereof, are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. A passivation layer is selectively formed from vapor phase reactants on the first surface while leaving the second surface without the passivation layer. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the passivation layer. The first surface can be metallic while the second surface is dielectric, or the second surface is dielectric while the second surface is metallic. Accordingly, material, such as a dielectric, can be selectively deposited on either metallic or dielectric surfaces relative to the other type of surface using techniques described herein. Techniques and resultant structures are also disclosed for control of positioning and shape of layer edges relative to boundaries between underlying disparate materials.

公开(公告)号：US20200181766A1

公开(公告)日：2020-06-11

申请号：US16594365

申请日：2019-10-07

Applicant: ASM IP Holding B.V.

Inventor： Suvi P. Haukka ,  Raija H. Matero ,  Eva Tois ,  Antti Niskanen ,  Marko Tuominen ,  Hannu Huotari ,  Viljami J. Pore

IPC: C23C16/04 ,  C23C16/40 ,  C23C16/22 ,  C23C16/18 ,  H01L21/768 ,  H01L21/285 ,  C23C16/56 ,  C23C16/455 ,  C23C16/30 ,  C23C16/06 ,  C23C16/02

Abstract: Methods are provided for dual selective deposition of a first material on a first surface of a substrate and a second material on a second, different surface of the same substrate. The selectively deposited materials may be, for example, metal, metal oxide, or dielectric materials.

公开(公告)号：US10280519B2

公开(公告)日：2019-05-07

申请号：US15835262

申请日：2017-12-07

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01J37/32 ,  H01L21/3065 ,  H01L21/311

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：US20180350587A1

公开(公告)日：2018-12-06

申请号：US15971601

申请日：2018-05-04

Applicant: ASM IP Holding B.V.

Inventor： Lingyun Jia ,  Viljami J. Pore ,  Marko Tuominen ,  Sun Ja Kim ,  Oreste Madia ,  Eva Tois ,  Suvi Haukka ,  Toshiya Suzuki

IPC: H01L21/02 ,  H01L21/311

Abstract: Methods for depositing oxide thin films, such as metal oxide, metal silicates, silicon oxycarbide (SiOC) and silicon oxycarbonitride (SiOCN) thin films, on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a first reactant that comprises oxygen and a component of the oxide, and a second reactant comprising reactive species that does not include oxygen species. In some embodiments the plasma power used to generate the reactive species can be selected from a range to achieve a desired step coverage or wet etch rate ratio (WERR) for films deposited on three dimensional features. In some embodiments oxide thin films are selectively deposited on a first surface of a substrate relative to a second surface, such as on a dielectric surface relative to a metal or metallic surface.

公开(公告)号：US20180233350A1

公开(公告)日：2018-08-16

申请号：US15892728

申请日：2018-02-09

Applicant: ASM IP HOLDING B.V.

Inventor： Eva E. Tois ,  Suvi P. Haukka ,  Raija H. Matero ,  Elina Färm ,  Delphine Longrie ,  Hidemi Suemori ,  Jan Willem Maes ,  Marko Tuominen ,  Shaoren Deng ,  Ivo Johannes Raaijmakers ,  Andrea Illiberi

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/56 ,  H01L21/768 ,  H01L21/67 ,  H01L23/528 ,  H01L23/532 ,  H01L23/522 ,  H01L23/31

CPC classification number: H01L21/0228 ,  H01L21/02118 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/0272 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/32 ,  H01L21/321 ,  H01L21/56 ,  H01L21/67069 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76877 ,  H01L23/3171 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/53295

Abstract: Methods for selective deposition, and structures thereof, are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. A passivation layer is selectively formed from vapor phase reactants on the first surface while leaving the second surface without the passivation layer. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the passivation layer. The first surface can be metallic while the second surface is dielectric, or the second surface is dielectric while the second surface is metallic. Accordingly, material, such as a dielectric, can be selectively deposited on either metallic or dielectric surfaces relative to the other type of surface using techniques described herein. Techniques and resultant structures are also disclosed for control of positioning and shape of layer edges relative to boundaries between underlying disparate materials.

公开(公告)号：US09472757B2

公开(公告)日：2016-10-18

申请号：US14334566

申请日：2014-07-17

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Jan Willem Maes ,  Tom Blomberg ,  Marko Tuominen ,  Suvi Haukka ,  Robin Roelofs ,  Jacob Woodruff

IPC: H01L45/00 ,  H01L21/02 ,  H01L39/24

CPC classification number: H01L45/146 ,  H01L21/02175 ,  H01L21/0228 ,  H01L39/249 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/14 ,  H01L45/1616 ,  H01L45/1641

Abstract: The disclosed technology generally relates to the field of semiconductor processing and more particularly to resistive random access memory and methods for manufacturing such memory. In one aspect, a method of fabricating a memory cell includes providing a substrate and providing a first electrode on the substrate. The method additionally includes depositing, via atomic layer deposition, a resistive switching material on the first electrode, wherein the resistive switching material comprises an oxide comprising a pnictogen chosen from the group consisting of As, Bi, Sb, and P. The resistive switching material may be doped, e.g., with Sb or an antimony-metal alloy. A second electrode may be formed over and in contact with the resistive switching material.

Abstract translation: 所公开的技术通常涉及半导体处理领域，更具体地涉及电阻随机存取存储器以及用于制造这种存储器的方法。 一方面，一种制造存储单元的方法包括提供衬底并在衬底上提供第一电极。 该方法还包括通过原子层沉积沉积第一电极上的电阻式开关材料，其中电阻开关材料包括一种氧化物，该氧化物包括选自由As，Bi，Sb和P组成的组的pnictogen。电阻式开关材料 可以掺杂，例如用Sb或锑 - 金属合金。 第二电极可以形成在电阻开关材料之上并与电阻开关材料接触。

公开(公告)号：US20150021540A1

公开(公告)日：2015-01-22

申请号：US14334566

申请日：2014-07-17

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Jan Willem Maes ,  Tom Blomberg ,  Marko Tuominen ,  Suvi Haukka ,  Robin Roelofs ,  Jacob Woodruff

IPC: H01L45/00

CPC classification number: H01L45/146 ,  H01L21/02175 ,  H01L21/0228 ,  H01L39/249 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/14 ,  H01L45/1616 ,  H01L45/1641

Abstract: The disclosed technology generally relates to the field of semiconductor processing and more particularly to resistive random access memory and methods for manufacturing such memory. In one aspect, a method of fabricating a memory cell includes providing a substrate and providing a first electrode on the substrate. The method additionally includes depositing, via atomic layer deposition, a resistive switching material on the first electrode, wherein the resistive switching material comprises an oxide comprising a pnictogen chosen from the group consisting of As, Bi, Sb, and P. The resistive switching material may be doped, e.g., with Sb or an antimony-metal alloy. A second electrode may be formed over and in contact with the resistive switching material.

Abstract translation: 所公开的技术通常涉及半导体处理领域，更具体地涉及电阻随机存取存储器以及用于制造这种存储器的方法。 一方面，一种制造存储单元的方法包括提供衬底并在衬底上提供第一电极。 该方法还包括通过原子层沉积沉积第一电极上的电阻式开关材料，其中电阻开关材料包括一种氧化物，该氧化物包括选自由As，Bi，Sb和P组成的组的pnictogen。电阻式开关材料 可以掺杂，例如用Sb或锑 - 金属合金。 第二电极可以形成在电阻开关材料之上并与电阻开关材料接触。

公开(公告)号：US20250037970A1

公开(公告)日：2025-01-30

申请号：US18790894

申请日：2024-07-31

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi P. Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: H01J37/32 ,  C23F1/12 ,  C23G5/00 ,  H01L21/311 ,  H01L21/3213

Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.

公开(公告)号：US12136552B2

公开(公告)日：2024-11-05

申请号：US17457764

申请日：2021-12-06

Applicant: ASM IP HOLDING B.V.

Inventor： Andrea Illiberi ,  Varun Sharma ,  Michael Givens ,  Marko Tuominen ,  Shaoren Deng

IPC: H01L21/311 ,  C23C16/04 ,  C23C16/455 ,  C23C16/46 ,  C23C16/56 ,  H01L21/02

Abstract: The current disclosure generally relates to the manufacture of semiconductor devices. Specifically, the disclosure relates to methods of depositing a layer on a substrate comprising a recess. The method comprises providing the substrate comprising a recess in a reaction chamber, depositing inhibition material on the substrate to fill the recess with inhibition material, removing the inhibition material from the substrate for exposing a deposition area and depositing a layer on the deposition area by a vapor deposition process. A vapor deposition assembly for performing the method is also disclosed.

公开(公告)号：US12134108B2

公开(公告)日：2024-11-05

申请号：US18300748

申请日：2023-04-14

Applicant: ASM IP HOLDING B.V.

Inventor： Viljami J. Pore ,  Marko Tuominen ,  Hannu Huotari

IPC: C23C16/455 ,  B05D1/00 ,  H10K71/16

Abstract: Methods and apparatus for vapor deposition of an organic film are configured to vaporize an organic reactant at a first temperature, transport the vapor to a reaction chamber housing a substrate, and maintain the substrate at a lower temperature than the vaporization temperature. Alternating contact of the substrate with the organic reactant and a second reactant in a sequential deposition sequence can result in bottom-up filling of voids and trenches with organic film in a manner otherwise difficult to achieve.