公开(公告)号：US5372652A

公开(公告)日：1994-12-13

申请号：US76064

申请日：1993-06-14

申请人： Kris V. Srikrishnan ,  Jin J. Wu

发明人： Kris V. Srikrishnan ,  Jin J. Wu

IPC分类号： B08B5/02 ,  B08B7/00 ,  B08B7/02 ,  B24C1/00 ,  B24C3/22 ,  B24C3/32 ,  B24C5/04 ,  H01L21/00 ,  H01L21/304 ,  B08B5/00

CPC分类号： H01L21/67028 ,  B08B7/0092 ,  B08B7/02 ,  B24C1/003 ,  B24C3/22 ,  B24C3/322 ,  B24C5/04 ,  Y10S134/902

摘要： An aerosol cleaning apparatus for cleaning a substrate includes an aerosol producing means having a nozzle head. The nozzle head is positioned at a selected proximity and orientation to the substrate which is held by a rotatable holder. The aerosol spray dislodges particles from the substrate and the rotation of the substrate further assists in the removal of the loosened particles. A method of aerosol cleaning includes rotating a substrate at a preselected speed and spraying an aerosol jet in conjunction with the rotation to help in the removal of particles from the substrate.

摘要翻译： 用于清洁基板的气溶胶清洁装置包括具有喷嘴头的气溶胶产生装置。 喷嘴头位于与由可旋转的保持器保持的基板的选定的接近和定向。 气溶胶喷雾从基板上移除颗粒，并且基板的旋转进一步有助于去除松散的颗粒。 一种气溶胶清洗方法包括以预先选定的速度旋转基底并与旋转一起喷射气雾剂射流以有助于从基底去除颗粒。

公开(公告)号：US4493856A

公开(公告)日：1985-01-15

申请号：US359469

申请日：1982-03-18

申请人： Ananda H. Kumar ,  Kris V. Srikrishnan

发明人： Ananda H. Kumar ,  Kris V. Srikrishnan

IPC分类号： C23C14/04 ,  B23K35/00 ,  C04B41/51 ,  C04B41/88 ,  C04B41/90 ,  C23C28/00 ,  C23F1/00 ,  H01L21/48 ,  H01L23/12 ,  H05K1/09 ,  H05K3/02 ,  H05K3/04 ,  H05K3/14 ,  H05K3/24 ,  B05D3/00 ,  B05D3/02 ,  B05D3/12 ,  B05D5/00

CPC分类号： H01L21/48 ,  B23K35/001 ,  C04B41/51 ,  C04B41/88 ,  H05K3/246 ,  H05K1/0306 ,  H05K3/048 ,  H05K3/143 ,  H05K3/244

摘要： A method of coating or cladding existing metallurgical features of a dielectric substrate by sequentially blanket coating the substrate with two discrete levels of diverse metals having differential in melting point and forming a continuous series of alloy solid solutions whose solidus curve lies intermediate the melting points of the two component metals, with the metal having the lower melting point disposed adjacent said substrate, followed by heating of the substrate to a temperature slightly above melting point of the lower melting metal but not exceeding the liquidus temperature of a completely homogenized alloy corresponding to amounts of the metals deposited, with cooling of the substrate to delaminate the metal coatings on the bare surface areas of said substrate, and mechanically removing said delaminated metal coatings to retain a bonded cladding comprised of said metals on said metallurgical features.

摘要翻译： 一种通过用熔点不同的两种不同金属的不同金属层叠基板来涂覆或包覆电介质基板的现有冶金特征的方法，并形成连续的一系列合金固溶体，其固相线曲线位于 两种组分金属，其中具有较低熔点的金属与所述衬底相邻地设置，随后将衬底加热至略低于较低熔点金属熔点的温度，但不超过完全均质化合金的液相线温度， 所述金属沉积在衬底的冷却下以使所述衬底的裸露表面区域上的金属涂层分层，并机械地去除所述分层金属涂层，以将由所述金属组成的结合包层保持在所述冶金特征上。

公开(公告)号：US07491588B2

公开(公告)日：2009-02-17

申请号：US11598507

申请日：2006-11-13

申请人： John E. Campbell ,  William T. Devine ,  Kris V. Srikrishnan

发明人： John E. Campbell ,  William T. Devine ,  Kris V. Srikrishnan

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L29/78648 ,  H01L21/743 ,  H01L21/76251 ,  H01L21/84 ,  H01L27/10832 ,  H01L27/10873 ,  H01L27/11803 ,  H01L27/1203 ,  H01L29/66772 ,  H01L29/78606 ,  H01L29/78612 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is provided in which for fabricating a complementary metal oxide semiconductor (CMOS) circuit on a semiconductor-on-insulator (SOI) substrate. A plurality of field effect transistors (FETs) are formed, each having a channel region disposed in a common device layer within a single-crystal semiconductor layer of an SOI substrate. A gate of the first FET overlies an upper surface of the common device layer, and a gate of the second FET underlies a lower surface of the common device layer remote from the upper surface. The first and second FETs share a common diffusion region disposed in the common device layer and are conductively interconnected by the common diffusion region. The common diffusion region is operable as at least one of a source region or a drain region of the first FET and is simultaneously operable as at least one of a source region or a drain region of the second FET.

摘要翻译： 提供了一种用于在绝缘体上半导体（SOI）衬底上制造互补金属氧化物半导体（CMOS）电路的方法。 形成多个场效应晶体管（FET），每个具有设置在SOI衬底的单晶半导体层内的公共器件层中的沟道区。 第一FET的栅极覆盖在公共器件层的上表面，第二FET的栅极位于远离上表面的公共器件层的下表面。 第一和第二FET共享设置在公共器件层中的公共扩散区域，并通过公共扩散区域导电互连。 公共扩散区域可操作为第一FET的源极区域或漏极区域中的至少一个，并且可以同时工作为第二FET的源极区域或漏极区域中的至少一个。

公开(公告)号：US07141853B2

公开(公告)日：2006-11-28

申请号：US10832894

申请日：2004-04-27

申请人： John E. Campbell ,  William T. Devine ,  Kris V. Srikrishnan

发明人： John E. Campbell ,  William T. Devine ,  Kris V. Srikrishnan

IPC分类号： H01L27/01

CPC分类号： H01L29/78648 ,  H01L21/743 ,  H01L21/76251 ,  H01L21/84 ,  H01L27/10832 ,  H01L27/10873 ,  H01L27/11803 ,  H01L27/1203 ,  H01L29/66772 ,  H01L29/78606 ,  H01L29/78612 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and structure for fabricating an electronic device using an SOI technique that results in formation of a buried oxide layer. The method includes fabricating at least one first component of the electronic device and fabricating at least one second component of the electronic device, wherein the first component and the second component are on opposite sides of the buried oxide layer, thereby causing the buried oxide layer to perform a function within the electronic device.Entire circuits can be designed around this technique.

公开(公告)号：US5485032A

公开(公告)日：1996-01-16

申请号：US355206

申请日：1994-12-08

申请人： Dominic J. Schepis ,  Kris V. Srikrishnan ,  Seshadri Subbanna ,  Manu J. Tejwani

发明人： Dominic J. Schepis ,  Kris V. Srikrishnan ,  Seshadri Subbanna ,  Manu J. Tejwani

IPC分类号： H01L21/82 ,  H01L21/768 ,  H01L23/525 ,  H01L29/00

CPC分类号： H01L23/5254 ,  H01L21/76888 ,  H01L21/76894 ,  H01L23/5252 ,  H01L2924/0002 ,  Y10S438/933

摘要： A programmable antifuse element comprising adjacent bodies of germanium and aluminum or aluminum allow form a low resistance connection of good mechanical and thermal properties when heated to a temperature where alloying of the aluminum and germanium occurs. Heating for the purpose of programming the antifuse element can be done by electrical resistance heating in the-germanium, which may be doped to achieve a desired resistance value, or by laser irradiation. Due to the high resistance of intrinsic or lightly doped germanium, a resistance change ratio of greater than 10,000:1 is achieved.

摘要翻译： 包括锗和铝或铝的相邻体的可编程反熔丝元件在加热到发生铝和锗的合金化的温度时形成良好机械和热性能的低电阻连接。 用于编程反熔丝元件的加热可以通过锗中的电阻加热来实现，其可以被掺杂以实现期望的电阻值，或通过激光照射。 由于本征或轻掺杂锗的高电阻，实现了大于10,000:1的电阻变化率。

公开(公告)号：US5469981A

公开(公告)日：1995-11-28

申请号：US323196

申请日：1994-10-14

申请人： Kris V. Srikrishnan ,  James F. White ,  Jer-Ming Yang

发明人： Kris V. Srikrishnan ,  James F. White ,  Jer-Ming Yang

IPC分类号： H01L23/525 ,  H01L23/538 ,  H05K1/02 ,  H01B13/00

CPC分类号： H01L23/5256 ,  H01L23/5382 ,  H01L2924/0002 ,  H05K1/0263

摘要： An electrically blowable fuse structure usable with organic insulators in microelectronic parts is provided. The fuse structure is made of a first heat resistant member, a fusing element and a second heat resistant member. The heat resistant members are in substantial contact with the fuse and thermally insulate the fuse from the organic insulator. The ends of each fuse are electrically connected to a pair conductors.A process for fabricating an electrically blowable fuse structure usable with an organic insulator is provided. A substrate with an organic insulator coating and containing electrically conductive features with exposed contacts is provided. A heat shield layer and a fuse layer are deposited sequentially and patterned by subtractive etching. Plurality of conductors are formed over so as to electrically connect each fuse element to a pair of conductors. A second heat resistant member is formed over the fuse area and the substrate is subsequently quoted with an organic insulator.

摘要翻译： 提供了可用于微电子部件中的有机绝缘体的可电熔熔融结构。 熔丝结构由第一耐热构件，定影元件和第二耐热构件制成。 耐热构件与保险丝基本接触，并将保险丝与有机绝缘体热绝缘。 每个保险丝的端部电连接到一对导体。 提供了一种用于制造可用于有机绝缘体的电可熔融熔丝结构的工艺。 提供了具有有机绝缘体涂层并且包含具有暴露触点的导电特征的衬底。 依次沉积热屏蔽层和熔丝层，并通过减去蚀刻图案化。 形成多个导体以便将每个熔丝元件电连接到一对导体。 在保险丝区域上形成第二耐热构件，随后用有机绝缘体引用衬底。

公开(公告)号：US5314840A

公开(公告)日：1994-05-24

申请号：US996767

申请日：1992-12-18

申请人： Dominic J. Schepis ,  Kris V. Srikrishnan ,  Seshardi Subbanna ,  Manu J. Tijwani

发明人： Dominic J. Schepis ,  Kris V. Srikrishnan ,  Seshardi Subbanna ,  Manu J. Tijwani

IPC分类号： H01L21/82 ,  H01L21/768 ,  H01L23/525 ,  H01L21/44 ,  H01L21/48

CPC分类号： H01L23/5254 ,  H01L21/76888 ,  H01L21/76894 ,  H01L23/5252 ,  H01L2924/0002 ,  Y10S438/933

摘要： A programmable antifuse element comprising adjacent bodies of germanium and aluminum or aluminum alloy form forming a low resistance connection of good mechanical and thermal properties when heated to a temperature where alloying of the aluminum and germanium occurs. Heating for the purpose of programming the antifuse element can be done by electrical resistance heating in the germanium, which may be doped to achieve a desired resistance value, or by laser irradiation. Due to the high resistance of intrinsic or lightly doped germanium, a resistance change ratio of greater than 10,000:1 is achieved.

摘要翻译： 一种可编程反熔丝元件，其包括锗和铝或铝合金形式的相邻体，当加热到铝和锗的合金化的温度时，形成具有良好机械和热性能的低电阻连接。 用于编程反熔丝元件的加热可以通过锗中的电阻加热来实现，其可以被掺杂以实现期望的电阻值，或通过激光照射。 由于本征或轻掺杂锗的高电阻，实现了大于10,000:1的电阻变化率。

公开(公告)号：US4839715A

公开(公告)日：1989-06-13

申请号：US87478

申请日：1987-08-20

申请人： Joseph J. Gajda ,  Kris V. Srikrishnan ,  Paul A. Totta ,  Francis G. Trudeau

发明人： Joseph J. Gajda ,  Kris V. Srikrishnan ,  Paul A. Totta ,  Francis G. Trudeau

IPC分类号： H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522

CPC分类号： H01L21/76897 ,  H01L23/4855 ,  H01L2924/0002

摘要： An integrated circuit chip including a first and a higher second surface levels with an abrupt sidewall step transition therebetween, and having a first layer of a first conductive material disposed over the first surface level and over the second surface level, but terminating on the first surface level in a first end portion which extends up to but does not touch the sidewall. This end portion comprises a conductive material which has been converted to an insulator. A second layer of a second conductive material is disposed on top of the first conductive layer with essentially no conductive material conversion to insulator therein adjacent to the abrupt sidewall transition. In a preferred embodiment, the conductive material is an alloy of aluminum and the end portion is aluminum oxide.

公开(公告)号：US4471405A

公开(公告)日：1984-09-11

申请号：US538618

申请日：1983-10-03

申请人： James K. Howard ,  Kris V. Srikrishnan

发明人： James K. Howard ,  Kris V. Srikrishnan

IPC分类号： H01G4/008 ,  H01G4/08 ,  H01G1/01 ,  B05D5/12 ,  H01L29/78

CPC分类号： H01G4/008 ,  H01G4/08

摘要： A thin film capacitor having a dual bottom electrode is provided. The bottom electrode includes a first layer of metal and a second layer of platinum, the metal of the first layer having the characteristic of forming a stable intermetallic phase with platinum during heat treatment. The first layer metal may be selected from the group consisting of Hf, Zr and Ta. The thin film capacitor may be employed as a decoupling capacitor in VLSI devices.

摘要翻译： 提供具有双底电极的薄膜电容器。 底部电极包括第一金属层和第二层铂，第一层的金属具有在热处理期间与铂形成稳定的金属间相的特性。 第一层金属可以选自Hf，Zr和Ta。 薄膜电容器可以用作VLSI器件中的去耦电容器。