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公开(公告)号：US20180350028A1
公开(公告)日：2018-12-06
申请号：US15989404
申请日：2018-05-25
Applicant: Apple Inc.
Inventor： Kelvin C. Chiu , Charles Brissart , Gokhan Avkarogullari , Lloyd A. Cunningham , Rahul U. Joshi
Abstract: The disclosed concepts provide a method to generate and use a compound shader object. A compound shader object includes a shader's intermediate representation (IR) and one or more binary modules; each binary module configured to execute on one type of graphics processing unit (GPU) with a specific input state. One method includes receiving, through a public application programming interface (API), a request to execute a shader from an user-level application. At the framework level, if the request corresponds to one of the prior compiled binary modules, that module may be passed to a GPU for immediate execution via a system private interface. If the request does not correspond to one of the binary modules, the shader's IR module may returned to the requesting user-level application (which module would then have to be compiled before it may be sent to the GPU).
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公开(公告)号：US20180181491A1
公开(公告)日：2018-06-28
申请号：US15389153
申请日：2016-12-22
Applicant: Apple Inc.
Inventor： Anthony P. DeLaurier , Luc R. Semeria , Gokhan Avkarogullari , David A. Gotwalt , Robert S. Hartog , Michael J. Swift
IPC: G06F12/0891 , G06F12/0895
CPC classification number: G06F12/0891 , G06F12/0811 , G06F12/084 , G06F12/0864 , G06F12/0895 , G06F12/1063 , G06F12/109 , G06F2212/1024 , G06F2212/302 , G06F2212/455 , G06F2212/60 , G06F2212/657
Abstract: Techniques are disclosed relating to flushing cache lines. In some embodiments, a graphics processing unit includes a cache and one or more storage elements configured to store a plurality of command buffers that include instructions executable to manipulate data stored in the cache. In some embodiments, ones of the cache lines in the cache are configured to store data to be operated on by instructions in the command buffers and a first tag portion that identifies a command buffer that has stored data in the cache line. In some embodiments, the graphics processing unit is configured to receive a request to flush cache lines that store data of a particular command buffer, and to flush ones of the cache lines having first tag portions indicating the particular command buffer as having data stored in the cache lines while maintaining data stored in other ones of the cache lines as valid.
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公开(公告)号：US20170358055A1
公开(公告)日：2017-12-14
申请号：US15587063
申请日：2017-05-04
Applicant: Apple Inc.
Inventor： Michael J. Swift , Michael Imbrogno , Gokhan Avkarogullari
CPC classification number: G06T1/60 , G06T1/20 , G06T15/005
Abstract: One disclosed embodiment includes memory allocation methods for use by a graphics processing unit in rendering graphics data for display. The method includes receiving a buffer attachment associated with a first rendering pass. The hardware prerequisites for operation of the first rendering pass is determined. The method also includes receiving an indication to not allocate system memory for the received buffer attachment. Thereafter, it may be determined whether the received buffer attachment will be loaded from or stored to by the subsequent rendering passes. If it is determined that the buffer attachment will be accessed by the subsequent rendering passes, an error message may be generated indicating that system memory must be allocated. If it is determined that the buffer attachment will not be accessed by the subsequent rendering passes, the buffer attachment is rendered without allocating system memory.
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公开(公告)号：US20150347105A1
公开(公告)日：2015-12-03
申请号：US14448927
申请日：2014-07-31
Applicant: Apple Inc.
Inventor： Gokhan Avkarogullari , Alexander K. Kan , Kelvin C. Chiu
CPC classification number: G06F8/4441 , G06F9/445 , G06F9/44505
Abstract: Methods, systems and devices are disclosed to examine developer supplied graphics code and attributes at run-time. The graphics code designed for execution on a graphics processing unit (GPU) utilizing a coding language such as OpenCL or OpenGL which provides for run-time analysis by a driver, code generator, and compiler. Developer supplied code and attributes can be analyzed and altered based on the execution capabilities and performance criteria of a GPU on which the code is about to be executed. In general, reducing the number of developer defined work items or work groups can reduce the initialization cost of the GPU with respect to the work to be performed and result in an overall optimization of the machine code. Manipulation code can be added to adjust the supplied code in a manner similar to unrolling a loop to improve execution performance.
Abstract translation: 披露方法，系统和设备，以在运行时检查开发人员提供的图形代码和属性。 设计用于使用诸如OpenCL或OpenGL的编码语言在图形处理单元（GPU）上执行的图形代码，其提供由驱动程序，代码生成器和编译器进行的运行时分析。 开发人员提供的代码和属性可以根据代码即将执行的GPU的执行能力和性能标准进行分析和更改。 通常，减少开发者定义的工作项或工作组的数量可以降低GPU相对于要执行的工作的初始化成本，并导致机器代码的整体优化。 可以添加操作代码以类似于展开循环的方式调整提供的代码，以提高执行性能。
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公开(公告)号：US20150074435A1
公开(公告)日：2015-03-12
申请号：US14021945
申请日：2013-09-09
Applicant: Apple Inc.
Inventor： Jason Jane , Gokhan Avkarogullari , Eric Sunalp
IPC: G06F1/32
CPC classification number: G06F1/324 , G06F1/3206 , Y02D10/126
Abstract: Techniques are provided for managing the power consumption and performance of a processing device. Power consumption and utilization ratios for a processing device may be continuously measured. The measured power consumption and utilization ratios may be compared to target power consumption and utilization ratios to adjust an operating frequency of the processing device. In one implementation a power controller may take the target and measured power consumption as inputs to generate a power output and a utilization controller may take the target and measured utilization ratios as inputs to generate a utilization output. The lower of the power output and the utilization output may be selected and used to adjust the operating frequency of the processing device. The power and utilization controllers may implement a proportional-integral control scheme.
Abstract translation: 提供了用于管理处理设备的功耗和性能的技术。 可以连续地测量处理装置的功耗和利用率。 可以将测量的功率消耗和利用率与目标功耗和利用率进行比较，以调整处理设备的工作频率。 在一个实现中，功率控制器可以将目标和测量的功率消耗作为输入以产生功率输出，并且利用控制器可以将目标和测量的利用率作为输入以产生利用率输出。 可以选择功率输出和利用率输出的较低者来调整处理装置的工作频率。 电力和利用控制器可以实现比例积分控制方案。
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Patent Agency Ranking
公开(公告)号：US11257278B2
公开(公告)日：2022-02-22
申请号：US16953021
申请日：2020-11-19
Applicant: Apple Inc.
Inventor： Anthony P. DeLaurier , Michael J. Swift , Michal Valient , Robert S. Hartog , Tyson J. Bergland , Gokhan Avkarogullari
IPC: G06F12/1009 , G06T1/60 , G06T15/04 , G06F9/38 , G06T15/00 , G06F12/0811 , G06F9/50 , G06T11/00
Abstract: Techniques are disclosed relating to memory allocation for graphics surfaces. In some embodiments, graphics processing circuitry is configured to access a graphics surface based on an address in a surface space assigned to the graphics surface. In some embodiments, first translation circuitry is configured to translate address information for the surface space to address information in the virtual space based on one or more of the translation entries. In some embodiments, the graphics processing circuitry is configured to provide an address for the access to the graphics surface based on translation by the first translation circuitry and second translation circuitry configured to translate the address in the virtual space to an address in a physical space of a memory configured to store the graphics surface. The disclosed techniques may allow sparse allocation of large graphics surfaces, in various embodiments.
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公开(公告)号：US11094036B2
公开(公告)日：2021-08-17
申请号：US16850101
申请日：2020-04-16
Applicant: Apple Inc.
Inventor： Michal Valient , Sean P. James , Gokhan Avkarogullari , Alexander K. Kan , Michael Imbrogno
Abstract: The disclosure pertains to techniques for operation of graphics systems and task execution on a graphics processor. One such technique comprises a computer-implemented method for task execution on a graphics processor, the method comprising creating a data structure for grouping data resources, populating the data structure with two or more data resources for encoding into a graphics processing language by an encoding object, passing the data structure to a first programming interface command, the first programming interface command configured to access the data structure's data resources, triggering execution of a first function on a graphics processer in response to passing the data structure to the first programming interface command, passing the data structure to a second programming interface command, the second programming interface command configured to access the data structure's data resources, and triggering execution of a second function on the graphics processer in response to passing the data structure to the second programming interface command.
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公开(公告)号：US10664943B2
公开(公告)日：2020-05-26
申请号：US15989404
申请日：2018-05-25
Applicant: Apple Inc.
Inventor： Kelvin C. Chiu , Charles Brissart , Gokhan Avkarogullari , Lloyd A. Cunningham , Rahul U. Joshi
Abstract: The disclosed concepts provide a method to generate and use a compound shader object. A compound shader object includes a shader's intermediate representation (IR) and one or more binary modules; each binary module configured to execute on one type of graphics processing unit (GPU) with a specific input state. One method includes receiving, through a public application programming interface (API), a request to execute a shader from an user-level application. At the framework level, if the request corresponds to one of the prior compiled binary modules, that module may be passed to a GPU for immediate execution via a system private interface. If the request does not correspond to one of the binary modules, the shader's IR module may returned to the requesting user-level application (which module would then have to be compiled before it may be sent to the GPU).
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公开(公告)号：US20200104180A1
公开(公告)日：2020-04-02
申请号：US16145573
申请日：2018-09-28
Applicant: Apple Inc.
Inventor： Kutty Banerjee , Benjamin Bowman , Terence M. Potter , Tatsuya Iwamoto , Gokhan Avkarogullari
Abstract: In general, embodiments are disclosed for tracking and allocating graphics processor hardware resources. More particularly, a graphics hardware resource allocation system is able to generate a priority list for a plurality of data masters for graphics processor based on a comparison between a current utilizations for the data masters and a target utilizations for the data masters. The graphics hardware resource allocation system designate, based on the priority list, a first data master with a higher priority to submit work to the graphics processor compared to a second data master. The graphics hardware resource allocation system determines a stall counter value for the data master and generates a notification to pause work for the second data master based on the stall counter value.
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公开(公告)号：US10319068B2
公开(公告)日：2019-06-11
申请号：US15587063
申请日：2017-05-04
Applicant: Apple Inc.
Inventor： Michael J. Swift , Michael Imbrogno , Gokhan Avkarogullari
Abstract: One disclosed embodiment includes memory allocation methods for use by a graphics processing unit in rendering graphics data for display. The method includes receiving a buffer attachment associated with a first rendering pass. The hardware prerequisites for operation of the first rendering pass is determined. The method also includes receiving an indication to not allocate system memory for the received buffer attachment. Thereafter, it may be determined whether the received buffer attachment will be loaded from or stored to by the subsequent rendering passes. If it is determined that the buffer attachment will be accessed by the subsequent rendering passes, an error message may be generated indicating that system memory must be allocated. If it is determined that the buffer attachment will not be accessed by the subsequent rendering passes, the buffer attachment is rendered without allocating system memory.
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