公开(公告)号：US20230187370A1

公开(公告)日：2023-06-15

申请号：US18075141

申请日：2022-12-05

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Giorgio CELLERE ,  Diego TONINI ,  Vincent DICAPRIO ,  Kyuil CHO

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L25/10 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/24 ,  H05K1/02 ,  H01L21/50 ,  H01L21/768 ,  H01L25/065 ,  H01L27/06

CPC classification number: H01L23/5389 ,  H01L21/486 ,  H01L21/4864 ,  H01L23/13 ,  H01L23/147 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/5384 ,  H01L23/5386 ,  H01L25/105 ,  H01L23/66 ,  H01Q1/2283 ,  H01Q1/243 ,  H05K1/0243 ,  H01L21/50 ,  H01L21/76802 ,  H01L23/5385 ,  H01L25/0657 ,  H01L27/0688 ,  H01L2225/1035 ,  H01L2225/107 ,  H01L2021/60007

Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.

公开(公告)号：US20230070053A1

公开(公告)日：2023-03-09

申请号：US17886102

申请日：2022-08-11

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31

Abstract: The present disclosure relates to semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to semiconductor package devices having a stiffener framed formed thereon. The incorporation of the stiffener frame improves the structural integrity of the semiconductor package devices to mitigate warpage and/or collapse while simultaneously enabling utilization of thinner core substrates for improved signal integrity and power delivery between packaged devices.

公开(公告)号：US20220157740A1

公开(公告)日：2022-05-19

申请号：US17098597

申请日：2020-11-16

Applicant: Applied Materials, Inc.

Inventor： Steven VERHAVERBEKE ,  Han-Wen CHEN ,  Giback PARK ,  Chintan BUCH

IPC: H01L23/552 ,  H01L23/538 ,  H01L25/065 ,  H01L23/532

Abstract: The present disclosure relates to thin-form-factor semiconductor packages with integrated electromagnetic interference (“EMI”) shields and methods for forming the same. The packages described herein may be utilized to form high-density semiconductor devices. In certain embodiments, a silicon substrate is laser ablated to include one or more cavities and a plurality of vias surrounding the cavities. One or more semiconductor dies may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. A plurality of conductive interconnections are formed within the vias and may have contact points redistributed to desired surfaces of the die-embedded substrate assembly. Thereafter, an EMI shield is plated onto a surface of the die-embedded substrate assembly and connected to ground by at least one of the one or more conductive interconnections. The die-embedded substrate assembly may then be singulated and/or integrated with another semiconductor device.

公开(公告)号：US20210288027A1

公开(公告)日：2021-09-16

申请号：US16814785

申请日：2020-03-10

Applicant: Applied Materials, Inc.

Inventor： Kurtis LESCHKIES ,  Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Kyuil CHO ,  Jeffrey L. FRANKLIN ,  Wei-Sheng LEI

IPC: H01L25/065 ,  H05K1/14 ,  H01L25/00 ,  H01L23/495 ,  H01L23/522

Abstract: The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.

公开(公告)号：US20210234060A1

公开(公告)日：2021-07-29

申请号：US17227763

申请日：2021-04-12

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK

IPC: H01L31/18

Abstract: The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier.

公开(公告)号：US20210222291A1

公开(公告)日：2021-07-22

申请号：US16096665

申请日：2016-05-24

Applicant: Applied Materials, Inc.

Inventor： Xi HUANG ,  Fei PENG ,  Kiran KRISHNAPUR ,  Ruiping WANG ,  Jrjyan Jerry CHEN ,  Steven VERHAVERBEKE ,  Robert Jan VISSER

IPC: C23C16/04 ,  C23C16/44 ,  H01L51/52 ,  H01L51/56

Abstract: A mask assembly (100) includes a mask frame (102) and a mask screen (104), both of the mask frame (102) and the mask screen (104) made of a metallic material, and a metal coating (125) disposed on exposed surfaces of one or both of the mask frame (102) and the mask screen (104).

公开(公告)号：US20200243345A1

公开(公告)日：2020-07-30

申请号：US16849604

申请日：2020-04-15

Applicant: Applied Materials, Inc.

Inventor： Jean DELMAS ,  Steven VERHAVERBEKE ,  Kurtis LESCHKIES

IPC: H01L21/324 ,  H01L21/67

Abstract: Disclosed herein is an apparatus and method for annealing semiconductor substrates. In one example a temperature-controlled fluid circuit includes a condenser configured to fluidly connect to an internal volume of a processing chamber. The processing chamber has a body, the internal volume is within the body. The condenser is configured to condense a processing fluid into liquid phase. A source conduit includes a first terminal end that couples to a first port on the body of the processing chamber. The source conduit includes a second terminal end. The first terminal end couples to a gas panel. The gas panel is configured to provide a processing fluid into the internal volume of the processing chamber. A gas conduit includes a first end. The first end couples to the condenser and a second end. The second end is configured to couple to a second port on the body of the processing chamber.

公开(公告)号：US20200234973A1

公开(公告)日：2020-07-23

申请号：US16842605

申请日：2020-04-07

Applicant: Applied Materials, Inc.

Inventor： Jean DELMAS ,  Steven VERHAVERBEKE ,  Kurtis LESCHKIES

IPC: H01L21/324 ,  H01L21/67

Abstract: Disclosed herein is an apparatus and method for annealing semiconductor substrates. In one example the method of annealing substrates in a processing chamber includes loading a plurality of substrates into an internal volume of the processing chamber. The method includes flowing a processing fluid through a gas conduit into the internal volume. The method further includes measuring a temperature of the gas conduit at one or more position utilizing one or more temperature sensors. The processing fluid in the gas conduit and the internal volume are maintained at a temperature above a condensation point of the processing fluid.

公开(公告)号：US20190057885A1

公开(公告)日：2019-02-21

申请号：US15681317

申请日：2017-08-18

Applicant: Applied Materials, Inc.

Inventor： Jean DELMAS ,  Steven VERHAVERBEKE ,  Kurtis LESCHKIES

IPC: H01L21/67 ,  H01L21/324 ,  F27B9/36

Abstract: Embodiments of the disclosure relate to an apparatus and method for annealing one or more semiconductor substrates. In one embodiment, a processing chamber is disclosed. The processing chamber includes a chamber body enclosing an internal volume, a substrate support disposed in the internal volume and configured to support a substrate during processing, a gas panel configured to provide a processing fluid into the internal volume, and a temperature-controlled fluid circuit configured to maintain the processing fluid at a temperature above a condensation point of the processing fluid. The temperature-controlled fluid circuit includes a gas conduit fluidly coupled to a port on the chamber body at a first end and to the gas panel at a second end.

公开(公告)号：US20180374718A1

公开(公告)日：2018-12-27

申请号：US15840900

申请日：2017-12-13

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Roman GOUK ,  Guan Huei SEE ,  Yu GU ,  Arvind SUNDARRAJAN ,  Kyuil CHO ,  Colin Costano NEIKIRK ,  Boyi FU

IPC: H01L21/56 ,  H01L23/31

Abstract: Embodiments of the present disclosure generally describe methods for minimizing the occurrence and the extent of die shift during the formation of a reconstituted substrate in fan-out wafer level packaging processes. Die shift is a process defect that occurs when a die (device) moves from its intended position within a reconstituted substrate during the formation thereof. Generally, the methods disclosed herein include depositing a device immobilization layer and/or a plurality of device immobilization beads over and/or adjacent to a plurality of singular devices (individual dies), and the carrier substrate they are positioned on, before forming a reconstituted substrate with an epoxy molding compound. The device immobilization layer and/or the plurality of device immobilization beads immobilize the plurality of singular devices and prevents them from shifting on the carrier substrate during the molding process.