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    Sigma-delta modulator with SAR ADC and truncater having order lower than order of integrator and related sigma-delta modulation method
    12.
    发明授权
    Sigma-delta modulator with SAR ADC and truncater having order lower than order of integrator and related sigma-delta modulation method 有权
    具有SAR ADC和截断器的Σ-Δ调制器具有低于积分器的阶数和相关的Σ-Δ调制方法

    公开(公告)号：US08344921B2

    公开(公告)日：2013-01-01

    申请号：US13072797

    申请日：2011-03-28

    申请人： Yu-Hsin Lin ,  Hung-Chieh Tsai ,  Sheng-Jui Huang

    发明人： Yu-Hsin Lin ,  Hung-Chieh Tsai ,  Sheng-Jui Huang

    IPC分类号： H03M3/00

    CPC分类号： H03M3/30 ,  H03M3/412 ,  H03M3/426 ,  H03M7/3042

    摘要： A sigma-delta modulator includes a processing circuit, a quantizer, a truncater and a feedback circuit. The processing circuit receives an input signal and an analog information and generates an integrated signal by perform an integration upon a difference between the input signal and the analog information. The quantizer includes a successive approximation register (SAR) analog-to-digital converter (ADC) for receiving the integrated signal and generating a digital information according to the integrated signal. The truncater receives the digital information and generates a truncated information according to the digital information. The feedback circuit generates the analog information to the processing circuit according to the truncated information, wherein an order of the truncater is lower than an order of the integration.

    摘要翻译： Σ-Δ调制器包括处理电路，量化器，截短器和反馈电路。 处理电路接收输入信号和模拟信息，并通过根据输入信号和模拟信息之间的差进行积分来产生积分信号。 量化器包括用于接收积分信号并根据积分信号产生数字信息的逐次逼近寄存器（SAR）模拟 - 数字转换器（ADC）。 截断器接收数字信息并根据数字信息产生截断的信息。 反馈电路根据截断的信息向处理电路生成模拟信息，其中截断器的顺序低于积分的顺序。

    Method for fabricating a surface acoustic wave device
    13.
    发明授权
    Method for fabricating a surface acoustic wave device 有权
    声表面波装置的制造方法

    公开(公告)号：US08028389B2

    公开(公告)日：2011-10-04

    申请号：US11944207

    申请日：2007-11-21

    申请人： Jyh-Shin Chen ,  Sheng-Wen Chen ,  Hui-Ling Kao ,  Yu-Sheng Kung ,  Yu-Hsin Lin ,  Yi-Chiuen Hu

    发明人： Jyh-Shin Chen ,  Sheng-Wen Chen ,  Hui-Ling Kao ,  Yu-Sheng Kung ,  Yu-Hsin Lin ,  Yi-Chiuen Hu

    IPC分类号： H04R17/10 ,  B44C1/22

    CPC分类号： H03H9/02622 ,  H03H3/08 ,  Y10T29/42 ,  Y10T29/49155

    摘要： A novel surface acoustic wave device with a decreased velocity dispersion and a low insertion loss as well as the fabrication method therefore is provided. The surface acoustic wave device includes a substrate, an insulating layer with an indentation on the substrate, a silicon layer divided by an etched window with a first portion on the insulating layer and a second portion suspended above the indentation, a piezoelectric layer on the first and the second portions of the silicon layer, and at least an electrode on the piezoelectric layer.

    摘要翻译： 提供了一种具有降低的速度色散和低插入损耗的新型弹性表面波器件及其制造方法。 表面声波装置包括基板，在基板上具有凹陷的绝缘层，由蚀刻窗口分隔的硅层，绝缘层上具有第一部分，第二部分悬置在凹陷部分上，第一部分上的压电层 和硅层的第二部分，以及压电层上的至少一个电极。

    TRACK AND HOLD CIRCUIT AND RELATED RECEIVING DEVICE WITH TRACK AND HOLD CIRCUIT EMPLOYED THEREIN
    14.
    发明申请
    TRACK AND HOLD CIRCUIT AND RELATED RECEIVING DEVICE WITH TRACK AND HOLD CIRCUIT EMPLOYED THEREIN 有权
    跟踪和保持电路跟踪和相关接收设备跟踪并保持已使用的电路

    公开(公告)号：US20110181334A1

    公开(公告)日：2011-07-28

    申请号：US12695164

    申请日：2010-01-28

    申请人： Hung-Chieh Tsai ,  Yu-Hsin Lin ,  Chi-Lun Lo ,  Jong-Woei Chen

    发明人： Hung-Chieh Tsai ,  Yu-Hsin Lin ,  Chi-Lun Lo ,  Jong-Woei Chen

    IPC分类号： H03L5/00

    CPC分类号： H03G3/3052 ,  H03G1/0088

    摘要： An operational circuit includes: a gain control circuit arranged to provide a gain value upon an input signal according to a set of control signals, wherein the gain control circuit includes a first resistor-based network and a second resistor-based network; an operational amplifier coupled to the gain control circuit and arranged to generate an output signal according to the input signal and the gain value; and a first capacitor coupled to the operational amplifier and arranged to hold the output signal between a first input terminal and a first output terminal of the operational amplifier, wherein when the operational circuit is operating, a first terminal of the first capacitor is consistently coupled to the first input terminal of the operational amplifier, and a second terminal of the first capacitor is consistently coupled to the first output terminal of the operational amplifier.

    摘要翻译： 运算电路包括：增益控制电路，被配置为根据一组控制信号在输入信号上提供增益值，其中所述增益控制电路包括第一电阻器网络和第二电阻器网络; 运算放大器，耦合到所述增益控制电路并被布置成根据所述输入信号和所述增益值产生输出信号; 以及耦合到所述运算放大器并被布置成将所述输出信号保持在所述运算放大器的第一输入端和所述第一输出端之间的第一电容器，其中当所述运算电路运行时，所述第一电容器的第一端始终耦合到 运算放大器的第一输入端和第一电容器的第二端一致地耦合到运算放大器的第一输出端。

    BANDGAP REFERENCE CIRCUIT WITH LOW OPERATING VOLTAGE
    17.
    发明申请
    BANDGAP REFERENCE CIRCUIT WITH LOW OPERATING VOLTAGE 有权
    具有低工作电压的带宽参考电路

    公开(公告)号：US20090237150A1

    公开(公告)日：2009-09-24

    申请号：US12051989

    申请日：2008-03-20

    申请人： Hung-Chieh Tsai ,  Yu-Hsin Lin

    发明人： Hung-Chieh Tsai ,  Yu-Hsin Lin

    IPC分类号： G05F1/10 ,  H03F3/16

    CPC分类号： H03F3/45183 ,  G05F3/30 ,  H03F3/345 ,  H03F2200/456

    摘要： A bandgap reference circuit comprising a current mirror, an operational amplifier, first and second BJT transistors is disclosed. The current mirror comprises a first input terminal, a second input terminal and at least one output terminal. The operational amplifier is coupled to the current mirror, wherein a first transistor and a second transistor respectively coupled to the first and the second input terminals have a zero or near zero threshold voltage. The first and second BJT transistors are coupled to two input terminals of the operational amplifier respectively, wherein at least one of the first and second BJT transistors is coupled to the output terminal of the current mirror through a conductive path.

    摘要翻译： 公开了一种带隙参考电路，其包括电流镜，运算放大器，第一和第二BJT晶体管。 电流镜包括第一输入端，第二输入端和至少一个输出端。 运算放大器耦合到电流镜，其中分别耦合到第一和第二输入端的第一晶体管和第二晶体管具有零或接近零的阈值电压。 第一和第二BJT晶体管分别耦合到运算放大器的两个输入端，其中第一和第二BJT晶体管中的至少一个通过导电路径耦合到电流镜的输出端。

    REFERENCE BUFFER
    18.
    发明申请
    REFERENCE BUFFER 审中-公开
    参考缓冲区

    公开(公告)号：US20090195302A1

    公开(公告)日：2009-08-06

    申请号：US12025085

    申请日：2008-02-04

    申请人： Yu-Hsin Lin ,  Hsueh-Kun Liao

    发明人： Yu-Hsin Lin ,  Hsueh-Kun Liao

    IPC分类号： G05F3/02

    CPC分类号： H03F3/505 ,  H03F2200/453 ,  H03F2203/5036

    摘要： A reference buffer is disclosed. The reference buffer includes a main source follower stage, a replica source follower stage, and a low-pass filter. The main source follower stage provides a first main voltage according to a first driving voltage. The replica source follower stage duplicates the first main voltage to generate a first reference voltage. The low-pass filter is coupled between the main source follower stage and the replica source follower stage.

    摘要翻译： 公开了一种参考缓冲器。 参考缓冲器包括主源跟随器级，副源级跟随器级和低通滤波器。 主源极跟随器级根据第一驱动电压提供第一主电压。 复制源极跟随器级复制第一主电压以产生第一参考电压。 低通滤波器耦合在主源跟随器级和复制源跟随器级之间。

    LEVEL SHIFTING CIRCUIT
    19.
    发明申请
    LEVEL SHIFTING CIRCUIT 审中-公开
    水平移位电路

    公开(公告)号：US20090066396A1

    公开(公告)日：2009-03-12

    申请号：US11853053

    申请日：2007-09-11

    申请人： Yu-Hsin Lin ,  Hsueh-Kun Liao

    发明人： Yu-Hsin Lin ,  Hsueh-Kun Liao

    IPC分类号： H03K3/012

    CPC分类号： H03K3/356113 ,  H03K3/012 ,  H03K3/0375

    摘要： A level shifting circuit is provided. Thin oxide devices are utilized to reduce the threshold, and thick oxide devices are utilized to protect the thin oxides from breakdown. An input voltage input voltage swings between a low supply voltage and ground. An output voltage swings between a high supply voltage and the ground. An inverter with input connected to the input voltage, outputs an inverted input voltage. The input voltage is subsequently between 0.5V to 2.5V, and the output voltage is subsequently between 3V to 10V.

    摘要翻译： 提供电平移位电路。 利用薄氧化物器件来降低阈值，并且使用厚氧化物器件来保护薄氧化物不被击穿。 输入电压输入电压在低电源电压和地之间摆动。 输出电压在高电源电压和地之间摆动。 输入端连接到输入电压的逆变器输出反相输入电压。 输入电压随后在0.5V至2.5V之间，输出电压随后在3V至10V之间。