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公开(公告)号：US09134047B2
公开(公告)日：2015-09-15
申请号：US13863218
申请日：2013-04-15
Applicant: D-Wave Systems Inc.
Inventor： Randall C. Black , Jeremy P. Hilton , Geordie Rose
CPC classification number: F25B9/12 , F25B9/10 , G06F1/20 , G06F2200/201 , H01L39/02 , H05K7/20372
Abstract: Cryogenic refrigeration employs a pulse tube cryo-cooler and a dilution refrigerator to provide very low temperature cooling, for example, to cool superconducting processors. Continuous cryogenic cycle refrigeration may be achieved using multiple adsorption pumps. Various improvements may include multiple distinct thermal-linking points, evaporation pots with cooling structures, and/or one or more gas-gap heat switches which may be integral to an adsorption pump. A reservoir volume may provide pressure relief when the system is warmed above cryogenic temperature, reducing the mass of the system. Additional heat exchangers and/or separate paths for condensation and evaporation may be provided. Multi-channel connectors may be used, and/or connectors formed of a regenerative material with a high specific heat capacity at cryogenic temperature. Flexible PCBs may provide thermal links to components that embody temperature gradients. Various components may be pre-cooled, for example via a switchable thermalization system.
Abstract translation: 低温制冷采用脉冲管冷冻机和稀释冰箱来提供极低温度的冷却，例如冷却超导处理器。 可以使用多个吸附泵实现连续低温循环制冷。 各种改进可以包括多个不同的热连接点，具有冷却结构的蒸发罐，和/或可以与吸附泵成一体的一个或多个气隙热交换器。 当系统温度超过低温温度时，储存器容积可以提供压力释放，从而减小系统的质量。 可以提供用于冷凝和蒸发的附加热交换器和/或单独路径。 可以使用多通道连接器，和/或由在低温下具有高比热容的再生材料形成的连接器。 柔性PCB可以提供体现温度梯度的部件的热连接。 可以例如经由可切换热化系统预先冷却各种部件。
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12.发明申请公开(公告)号：US20150187840A1
公开(公告)日：2015-07-02
申请号：US14589574
申请日：2015-01-05
Applicant: D-Wave Systems Inc.
Inventor： Eric Ladizinsky , Geordie Rose , Jeremy P. Hilton , Eugene Dantsker , Byong Hyop Oh
CPC classification number: H01L27/18 , B82Y10/00 , G06N99/002 , H01L28/24 , H01L39/025 , H01L39/223 , H01L39/2406 , H01L39/2493 , Y10S977/707 , Y10S977/723 , Y10S977/943
Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
Abstract translation: 各种技术和设备允许制造超导电路和结构，例如约瑟夫逊结，其可以例如在量子计算机中有用。 例如，可以制造具有插入在能够超导的两个元件或层之间的电介质结构或层的低磁通量噪声三层结构。 超导通孔可以直接覆盖约瑟夫逊结。 诸如约瑟夫逊结的结构可以承载在平坦化的电介质层上。 可以使用翅片来除去结构中的热量。 能够超导的通孔可以具有小于约1微米的宽度。 该结构可以例如通过通孔和/或带连接器耦合到电阻器。
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公开(公告)号：US20130231249A1
公开(公告)日：2013-09-05
申请号：US13863218
申请日：2013-04-15
Applicant: D-WAVE SYSTEMS INC.
Inventor： Randall C. Black , Jeremy P. Hilton , Geordie Rose
CPC classification number: F25B9/12 , F25B9/10 , G06F1/20 , G06F2200/201 , H01L39/02 , H05K7/20372
Abstract: Cryogenic refrigeration employs a pulse tube cryo-cooler and a dilution refrigerator to provide very low temperature cooling, for example, to cool superconducting processors. Continuous cryogenic cycle refrigeration may be achieved using multiple adsorption pumps. Various improvements may include multiple distinct thermal-linking points, evaporation pots with cooling structures, and/or one or more gas-gap heat switches which may be integral to an adsorption pump. A reservoir volume may provide pressure relief when the system is warmed above cryogenic temperature, reducing the mass of the system. Additional heat exchangers and/or separate paths for condensation and evaporation may be provided. Multi-channel connectors may be used, and/or connectors formed of a regenerative material with a high specific heat capacity at cryogenic temperature. Flexible PCBs may provide thermal links to components that embody temperature gradients. Various components may be pre-cooled, for example via a switchable thermalization system.
Abstract translation: 低温制冷采用脉冲管冷冻机和稀释冰箱来提供极低温度的冷却，例如冷却超导处理器。 可以使用多个吸附泵实现连续低温循环制冷。 各种改进可以包括多个不同的热连接点，具有冷却结构的蒸发罐，和/或可以与吸附泵成一体的一个或多个气隙热交换器。 当系统温度超过低温温度时，储存器容积可以提供压力释放，从而减小系统的质量。 可以提供用于冷凝和蒸发的附加热交换器和/或单独路径。 可以使用多通道连接器，和/或由在低温下具有高比热容的再生材料形成的连接器。 柔性PCB可以提供体现温度梯度的部件的热连接。 可以例如经由可切换热化系统预先冷却各种部件。
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公开(公告)号：US20200006421A1
公开(公告)日：2020-01-02
申请号：US16569221
申请日：2019-09-12
Applicant: D-WAVE SYSTEMS INC.
Inventor： Eric Ladizinsky , Geordie Rose , Jeremy P. Hilton , Eugene Dantsker , Byong Hyop Oh
Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
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公开(公告)号：US10467543B2
公开(公告)日：2019-11-05
申请号：US14920235
申请日：2015-10-22
Applicant: D-Wave Systems Inc.
Inventor： William G. Macready , Mani Ranjbar , Firas Hamze , Geordie Rose , Suzanne Gildert
Abstract: Quantum processor based techniques minimize an objective function for example by operating the quantum processor as a sample generator providing low-energy samples from a probability distribution with high probability. The probability distribution is shaped to assign relative probabilities to samples based on their corresponding objective function values until the samples converge on a minimum for the objective function. Problems having a number of variables and/or a connectivity between variables that does not match that of the quantum processor may be solved. Interaction with the quantum processor may be via a digital computer. The digital computer stores a hierarchical stack of software modules to facilitate interacting with the quantum processor via various levels of programming environment, from a machine language level up to an end-use applications level.
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Patent Agency Ranking
公开(公告)号：US10453894B2
公开(公告)日：2019-10-22
申请号：US15956404
申请日：2018-04-18
Applicant: D-Wave Systems Inc.
Inventor： Eric Ladizinsky , Geordie Rose , Jeremy P. Hilton , Eugene Dantsker , Byong Hyop Oh
Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
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公开(公告)号：US20190087385A1
公开(公告)日：2019-03-21
申请号：US16173846
申请日：2018-10-29
Applicant: D-WAVE SYSTEMS INC.
Inventor： Alexander Maassen van den Brink , Peter Love , Mohammad H.S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul I. Bunyk , Andrew J. Berkley
Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
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公开(公告)号：US09978809B2
公开(公告)日：2018-05-22
申请号：US15289782
申请日：2016-10-10
Applicant: D-Wave Systems Inc.
Inventor： Eric Ladizinsky , Geordie Rose , Jeremy P. Hilton , Eugene Dantsker , Byong Hyop Oh
CPC classification number: H01L27/18 , B82Y10/00 , G06N99/002 , H01L28/24 , H01L39/025 , H01L39/223 , H01L39/2406 , H01L39/2493 , Y10S977/707 , Y10S977/723 , Y10S977/943
Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
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公开(公告)号：US09665539B1
公开(公告)日：2017-05-30
申请号：US15419083
申请日：2017-01-30
Applicant: D-Wave Systems Inc.
Inventor： William G. Macready , Geordie Rose , Thomas F.W. Mahon , Peter Love , Marshall Drew-Brook
CPC classification number: G06F17/505 , B82Y10/00 , G06F17/11 , G06N99/002
Abstract: Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a Boolean logic circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A quantum processor may include multiple sets of qubits, each set coupled to respective annealing signal lines such that dynamic evolution of each set of qubits is controlled independently from the dynamic evolutions of the other sets of qubits.
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公开(公告)号：US09594726B2
公开(公告)日：2017-03-14
申请号：US15190608
申请日：2016-06-23
Applicant: D-Wave Systems Inc.
Inventor： William G. Macready , Geordie Rose , Thomas F. W. Mahon , Peter Love , Marshall Drew-Brook
CPC classification number: G06F17/505 , B82Y10/00 , G06F17/11 , G06N99/002
Abstract: Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a Boolean logic circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A quantum processor may include multiple sets of qubits, each set coupled to respective annealing signal lines such that dynamic evolution of each set of qubits is controlled independently from the dynamic evolutions of the other sets of qubits.
Abstract translation: 解决计算问题可能包括生成计算问题的逻辑电路表示，将逻辑电路表示编码为离散优化问题，以及使用量子处理器来解决离散优化问题。 可以钳位逻辑电路表示的输出，使得解决方案涉及有效地执行逻辑电路表示，以确定对应于被钳位的输出的输入。 该表示可以是布尔逻辑电路。 离散优化问题可以由一组微型优化问题组成，其中每个微型优化问题从逻辑电路表示编码相应的逻辑门。 量子处理器可以包括多组量子位，每组量子位耦合到相应的退火信号线，使得每组量子位的动态演化独立于其他量子位集合的动态演化被控制。
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